Abstract: A method and apparatus for enabling a Software Transactional Memory (STM) with precompiled binaries is herein described. Upon encountering an access operation in a transaction, an annotation field associated with a memory location referenced by the access is checked. In response to the memory location representing a previous similar access within the transaction, the access is performed without access barriers. However, if the annotation field is in a default state representing no previous access during a pendancy of the transaction, then a mode of the processor is determined. If the processor mode is in implicit mode, an access handler/barrier is asynchronously executed. Conversely, in an explicit mode, a flag is set instead of asynchronously executing the handler. In addition, during compilation convert explicit and convert implicit instructions are inserted to intelligently convert modes for precompiled and newly compiled binaries.

Abstract: Unique context-based code enhancement of the core functionality of standard source code objects is performed at any position in the code. Desired insertion/replacement position(s) input by a user trigger the generation of a unique context for an enhancement. The unique context is based on characteristics of the code in the standard source code objects, such as the statements proximate to the insertion/replacement position(s). The unique context is associated with one or more extension source code objects that, when integrated into the existing source code at the insertion/replacement position(s), will provide the enhancement. At compile-time, the unique context used to unambiguously locate the insertion/replacement position(s). The extension source code objects can include industry or customer extensions, add-ons, plug-ins, and the like.

Abstract: A method, apparatus and program product are provided for parallelizing analysis and optimization in a compiler. A plurality of basic blocks and a subset of data points of a computer program is prepared for processing by a main thread selected from a plurality of hardware threads. The plurality of prepared basic blocks and subset of data points are placed in a shared data structure by the main thread. A prepared basic block of the plurality of prepared basic blocks and/or a tuple associated with the subset of data points is concurrently retrieved from the shared data structure by a work thread selected from the plurality of hardware threads. A compiler analysis or optimization is performed on the prepared basic block or tuple by the work thread.

Abstract: A system and method for executing a user agent in an electronic device. Upon each startup of the user agent, the electronic device loads binary code of a base version of the user agent into memory, and determines whether a binary patch has previously been downloaded. If the patch has been downloaded, it is applied to the base version and the updated base version is executed. The binary patch may be downloaded from a server, which compiles the binary patch on the basis of stored source code of the base version and stored source code of one or more enhancements selected by the electronic device.

Abstract: A compiled program has an advanced-load instruction and a load-checking atomic section. The load-checking atomic section follows the advanced-load instruction in the compiled program. The advanced-load instruction, when executed, loads a value from a shared memory address. The load-checking atomic section includes a check instruction for checking the validity of the shared memory address.

Abstract: Methods, systems, computer-readable media, and apparatus for determining function side effects of a program function are disclosed. Source code of one or more prototype functions that is configured to simulate the function side-effect behaviors of a program function can be provided, and the compiler can determine the functional side effects of the program function in various specific program contexts based on the source code of the prototype functions rather than the source code of the program function. Optimization procedures can be performed based on the function side effects of the program function derived from the prototype functions and the program contexts.

Abstract: Method, apparatus and system embodiments provide support for multiple SoEMT software threads on multiple SMT logical thread contexts. A sleep state mechanism maintains a current value of an element of architecture state for each physical thread. The current value corresponds to an active virtual thread currently running on the physical thread. The sleep state mechanism also maintains sleep values of the architecture state element for each inactive thread. The active and inactive values may be maintained in a cross-bar configuration. Upon a read of the architecture state element, simplified mux logic selects among the current values to provide the current value for the appropriate active thread. Upon a thread switch, control logic associated with the sleep state mechanism swaps the active state value for the current thread with the inactive state value for the new thread.

Abstract: A high level shader language compiler incorporates transforms to optimize shader code for graphics processing hardware. An instruction reordering transform determines instruction encapsulations of dependent instructions that reduce concurrent register usage by the shader. A phase pulling transform re-organizes the shader's instructions into phases that reduce a measure of depth of texture loads. A register assigning transform assigns registers to lower register usage by the shader.

Abstract: A technique includes providing first objects that are associated with an application session and in a processor-based system, identifying second objects in another application session corresponding to the first objects based at least in part on a comparison of the second objects to matching rules associated with the first objects.

Abstract: A compiler includes a register allocator for allocating registers for instructions in a program to be compiled, and a code generator for generating object code based on the register allocation results performed by the register allocator. The register allocator allocates logical registers for instructions in the program to be compiled. The register allocation further allocates, to physical registers, the logical registers that are allocated to the instructions of the program, so that the physical registers that are live at a procedure call in the program to be compiled are allocated from the bottom of the register stack.

Abstract: A compiler implemented by a computer performs optimized division of work across heterogeneous processors. The compiler divides source code into code sections and characterizes each of the code sections based on pre-defined criteria. Each of the code sections is characterized as at least one of: allocate to a main processor, allocate to a processing element, allocate to one of a parameterized main processor and a parameterized processing element, and indeterminate. The compiler analyzes side-effects and costs of executing the code sections on allocated processors, and transforms the code sections based on results of the analyzing. The transforming includes re-characterizing the code sections for alternate execution in a runtime environment.

Abstract: When compiling high level, graphical code (e.g. LabVIEW™ code) representative of a design, parts of the code that do not depend on external input data may be executed during the compilation process. Specific variables and/or value traces of specific variables in the program, e.g. constant values and/or repeating patterns may be recorded then analyzed, and certain transformations may be applied in the compilation process according to the results of the analysis, thereby optimizing the design. In one approach, the graph may be dynamically stepped through one node at a time, and it may be determined whether all inputs to the stepped-through node are known. If those inputs are known, type conversion and the operation corresponding to the stepped-through node may be dynamically performed. In another approach, a subset of the graphical code not depending on external data may be compiled and executed, thereby obtaining the same results as described above.

Abstract: A system and method for automated determination of quasi-identifiers for sensitive data fields in a dataset are provided. In one aspect, the system and method identifies quasi-identifier fields in the dataset based upon a static analysis of program statements in a computer program having access to—sensitive data fields in the dataset. In another aspect, the system and method identifies quasi-identifier fields based upon a dynamic analysis of program statements in a computer program having access to—sensitive data fields in the dataset. Once such quasi-identifiers have been identified, the data stored in such fields may be anonymized using techniques such as k-anonymity. As a result, the data in the anonymized quasi-identifiers fields cannot be used to infer a value stored in a sensitive data field in the dataset.

Abstract: A system and method for deploying one or more graphical programs on a personal digital assistant (PDA). One or more selected graphical programs may be programmatically converted to an executable format that can be executed by the portable computing device. For example, the graphical programs may be initially represented as a plurality of data structures that define or specify the operation of the respective graphical programs, and conversion software program may operate to access these data structures from memory and convert the data structures to an executable format suitable for the portable computing device. The executable may be transferred to the portable computing device for execution.

Abstract: In one embodiment, symbolically executing a software module having a number of execution paths; and losslessly reducing the number of execution paths during the symbolic execution of the software module.

Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive one or more risk factors, receive one or more contexts, identify one or more context relationships and associate the one or more contexts with the one or more risk factors. Additionally, the programming instructions are operable to map the one or more risk factors for an associated context to a software defect related risk consequence to determine a risk model and execute a risk-based testing based on the risk model to determine a defect related risk evaluation for a software development project.

Abstract: Technologies are generally described for runtime optimization adjusted dynamically according to changing costs of one or more system resources. Multicore systems may encounter dynamic variations in performance associated with the relative cost of related system resources. Furthermore, multicore systems can experience dramatic variations in resource availability and costs. A dynamic registry of system resource costs can be utilized to guide dynamic optimization. The relative scarcity of each resource can be updated dynamically within the registry of system resource costs. A runtime code generating loader and optimizer may be adapted to adjust optimization according to the resource cost registry. Information regarding system resource costs can support optimization tradeoffs based on resource cost functions.

Abstract: Building binary packages for software products, particularly large-scale software products, is a highly computation intensive process. Thus, it is desirable to distribute the workload over a large number of computing nodes so as to have the build process complete in an optimal period of time. One environment providing compute resources that can be utilized for a highly available and dynamically scalable distributed build process is an elastic compute cloud. In such an environment, virtual machines can be instantiated and destroyed as the resource requirements of the build process dictate. This has the advantage that dedicated hardware is unneeded, and excess capacity on the hardware employed can be employed for other computation tasks when the build process is idle. Presented herein are systems, methods and computer storage media for distributing a highly available and scalable build service, suitable for use in an elastic compute environment or other distributed environment.

Abstract: Technologies are generally described for parallel dynamic optimization using multicore processors. A runtime compiler may be adapted to generate multiple instances of executable code from a portable intermediate software module. The various instances of executable code may be generated with variations of optimization parameters such that the code instances each express different optimization attempts. A multicore processor may be leveraged to simultaneously execute some, or all, of the various code instances. Preferred optimization parameters may be determined from the executable code instances that may correctly complete in the least time, or may use the least amount of memory, or that may prove superior according to some other fitness metric. Preferred optimization parameters may be used to seed future optimization attempts. Output generated from the preferred instances may be used as soon as the first instance correctly completes block.

Abstract: An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes operations that have an unknown stride by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including operations with unknown strides. The substituted instructions result in strength reduction in the computer program.

Abstract: An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes conditional operations by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including conditional operations. The substituted instructions result in strength reduction in the computer program.

Abstract: An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes operations that have an unknown stride by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including operations with unknown strides. The substituted instructions result in strength reduction in the computer program.

Abstract: Embodiments of methods and systems for managing translation of a source code of a computer application, at a processing device, are described. A pre-translation analysis of the source code may be performed to determine a plurality of look-alike code snippets. Thereafter, a report may be generated for indicating at least one parameter associated with the plurality of look-alike code snippets. Subsequently, at least one of the plurality of look-alike code snippets may be modified with at least one pre-stored code snippet, based on the at least one parameter.

Abstract: A processor performance profiler is enabled to for identify specific instructions causing performance issues within a program being executed by a microprocessor through random sampling to find the worst-case offenders of a particular event type such as a cache miss or a branch mis-prediction. Tracking all instructions causing a particular event generates large data logs, creates performance penalties, and makes code analysis more difficult. However, by identifying and tracking the worst offenders within a random sample of events without having to hash all events results in smaller memory requirements for the performance profiler, lower performance impact while profiling, and decreased complexity to analyze the program to identify major performance issues, which, in turn, enables better optimization of the program in shorter developer time.

Abstract: Method to prevent the effect of web application injection attacks, such as SQL injection and cross-site scripting (XSS), which are major threats to the security of the Internet. Method using complementary character coding, a new approach to character level dynamic tainting, which allows efficient and precise taint propagation across the boundaries of server components, and also between servers and clients over HTTP. In this approach, each character has two encodings, which can be used to distinguish trusted and untrusted data. Small modifications to the lexical analyzers in components such as the application code interpreter, the database management system, and (optionally) the web browser allow them to become complement aware components, capable of using this alternative character coding scheme to enforce security policies aimed at preventing injection attacks, while continuing to function normally in other respects.

Abstract: Detecting optimization opportunities is enabled by utilizing a trace of a target concurrent computer program and determining a relation between data objects accessed during the tracked execution. The relation may be stored in a Temporal Relation Graph (TRG), in an extended-TRG or another data structure. The relation may be affected by temporally-adjacent accesses to data objects. The relation may further be affected by accesses to data objects performed during critical sections of the target program.

Abstract: A method of determining which computer program functions are changed by a source code modification to a computer program's source code. The method includes compiling the computer program's source code, using a compiler that generates a relocation entry for each program access to a program function or a program data item. The method further includes compiling source code resulting from modifying the computer program's source code with the source code modification, using a compiler that generates a relocation entry for each program access to a program function or a program data item The method further includes constructing a list of object code differences by comparing the compiled source code, and excluding from the list specified object code differences.

Abstract: A method, system and article of manufacture are disclosed for registering and deregistering memory pages in a computer system. The method comprises the steps of hoisting register and deregister calls in a given routine where temporal locality is present to overlap computation and communication; using software pipelined registration and deregistration where spatial locality is observed; and using intra-procedural and inter-procedural analysis by a compiler of the computer system to deregister dynamically allocated buffers. The preferred embodiment of the invention is based on an optimizing compiler. The compiler is used to extract information such as addresses of buffers which are being reused repeatedly (temporal locality), preferably in a loop. The compiler may also find information about spatial locality, such as arrays whose indexes are used in a well-defined manner in a series of messages, for example, array pages being accessed in a pre-defined pattern in a loop.

Abstract: Methods and apparatuses for compiler-created helper thread for multi-threading are described herein. In one embodiment, exemplary process includes identifying a region of a main thread that likely has one or more delinquent loads, the one or more delinquent loads representing loads which likely suffer cache misses during an execution of the main thread, analyzing the region for one or more helper threads with respect to the main thread, and generating code for the one or more helper threads, the one or more helper threads being speculatively executed in parallel with the main thread to perform one or more tasks for the region of the main thread. Other methods and apparatuses are also described.

Abstract: In an embodiment, a technique that may be used to identify a pattern with respect to accessing a data store in a model. The pattern may be a desirable, undesirable, anomalous or some other type of pattern with respect to accessing the data store. The technique may include generating an execution control graph that represents an execution of the model. The execution control graph may be analyzed to identify the pattern. Analysis may include generating an expression based on the execution control graph and a condition to test for and determining, based on the expression, if the condition is met. If the condition is met, the pattern may be said to exist in the model. A result may generated based on the analysis and the result may be output.

Abstract: Various technologies and techniques are disclosed that provide software transactional protection of managed pointers. A software transactional memory system interacts with and/or includes a compiler. At compile time, the compiler determines that there are one or more reference arguments in one or more code segments being compiled whose source cannot be recovered. The compiler executes a procedure to select one or more appropriate techniques or combinations thereof for communicating the sources of the referenced variables to the called code segments to ensure the referenced variables can be recovered when needed. Some examples of these techniques include a fattened by-ref technique, a static fattening technique, a dynamic ByRefInfo type technique, and others. One or more combinations of these techniques can be used as appropriate.

Abstract: A capability for limited customization that utilizes existing virtual dispatch table technology and allows selective customization is provided. Such a capability combines the usage of virtual dispatch tables with both customized and non-customized code to reduce, or even eliminate over-customization. Further, such a capability may employ a runtime system that decides what methods to customize based on several factors including, but not limited to the size of a class hierarchy, the amount of available space for compiled code, and the amount of available time for compilation.

Abstract: Methods and apparatus are provided for implementing a programmable chip using a high-level language. Code sequences such as high-level language software critical loops are converted into read/transform/write (RXW) processes with buffer based flow control between the processes. Having separate read and write processes allows an arbitrary number of sequential reads/writes to occur in any order, subject to buffer size, allowing bursting/sequential transactions that are more efficient than random accesses.

Abstract: Simplifying determination of whether application specific parameters are setup for optimal performance of associated applications. In an embodiment, a monitor program associated with an application specific parameter is identified and executed to cause retrieval of a current value of the parameter. The retrieved current value is then compared with a recommended value for the parameter to determine whether the parameter is setup for optimal performance of the application. The result of comparison may be displayed to the user. Another aspect provides for downloading of the recommended values and the monitor programs associated with application specific parameters from an external system (such as a vendor system). One more aspect enables the user to execute a correction program to correct the value of the parameter for optimal performance of the application.

Abstract: The automated identification of open types of a multi-function input program. The automated identification of open types is performed without annotations in the input program, but rather by identifying a set of invading types of the program, with each of the invading types being an open type. The identification of invading types may be performed iteratively until the set of invading types no longer grows. The set of open types may be used for any purpose such as perhaps the de-virtualization of an input program during compilation.

Abstract: An embodiment includes a computer-implemented method of managing access control policies on a computer system having two high-level programming language environments. The method includes managing, by the computer system, a structured language environment. The method further includes managing, by the computer system, a dynamic language environment within the structured language environment. The method further includes receiving a policy. The policy is written in a dynamic language. The method further includes storing the policy in the dynamic language environment. The method further includes converting the policy from the dynamic language environment to the structured language environment. The method further includes generating a runtime in the structured language environment that includes the policy.

Abstract: Methods, systems, apparatus, and computer-readable media for validating components of a dynamic user interface in an on-demand multi-tenant service environment are disclosed. Organizations corresponding to tenants in the on-demand multi-tenant service environment are identified. A multi-tenant database system residing on multiple servers is provided for each of the identified organizations. Dynamic user interface pages associated with the organizations are identified. First and second compilation outputs based upon respective first and second invocations of a compiler configured to compile the one or more dynamic user interface pages are produced with reference to respective first and second builds of computer program code. Differences between the first and second compilation outputs are identified and presented in a user interface on a display device of the multi-tenant service environment.

Abstract: Methods, apparatuses, and computer readable media for unreachable code identification and removal. A method includes generating a Use Graph for a program. Generating the Use Graph includes identifying global identifiers within the program, creating a node in the Use Graph for each of the global identifiers, traversing the program to identify each use of a global identifier, and creating edges in the Use Graph corresponding to each identified use of a global identifier. The method includes storing usee global identifiers identified from the Use Graph, and determining unused global identifiers corresponding to identified global identifiers that are not usee global identifiers. The method includes removing unreachable software code associated with the unused global identifiers from the program to produce a revised program and storing the revised program.

Abstract: A method, tangible computer-readable medium and apparatus for concurrently executing subsystems in a graphical model is provided. An embodiment can transform a conventional graphical model supporting single threaded execution into a model supporting multi-threaded execution through the replacement of a single block. The transformed model may support concurrent execution of a plurality of subsystems using a plurality of threads when the graphical model executes. An embodiment provides a user interface that allows a user to intuitively configure a model for current execution of the subsystems.

Abstract: Some embodiments provide a system that executes a native code module. During operation, the system obtains the native code module. Next, the system loads the native code module into a secure runtime environment. Finally, the system safely executes the native code module in the secure runtime environment by using a set of software fault isolation (SFI) mechanisms that constrain store instructions in the native code module. The SFI mechanisms also maintain control flow integrity for the native code module by dividing a code region associated with the native code module into equally sized code blocks and data blocks and starting each of the data blocks with an illegal instruction.

Abstract: A system, method and computer program product are provided. In use, execution of a portion of internal code of an interface is identified. Further, in response to the execution of the portion of internal code, at least one aspect of an invocation of the interface is monitored and/or analyzed.

Abstract: A software compiler is provided that is operable for generating an executable that comprises instructions for a plurality of different instruction sets as may be employed by different processors in a multi-processor system. The compiler may generate an executable that includes a first portion of instructions to be processed by a first instruction set (such as a first instruction set of a first processor in a multi-processor system) and a second portion of instructions to be processed by a second instruction set (such as a second instruction set of a second processor in a multi-processor system). Such executable may be generated for execution on a multi-processor system that comprises at least one host processor, which may comprise a fixed instruction set, such as the well-known x86 instruction set, and at least one co-processor, which comprises dynamically reconfigurable logic that enables the co-processor's instruction set to be dynamically reconfigured.

Abstract: A device identifies array accesses of variables in a program code that includes multiple arrays, and identifies array access patterns for one of the array accesses. The device also determines an order of the array access patterns identified for the array accesses, and calculates, based on the order, distances between the array access patterns. The device further shares address calculations amongst the array accesses associated with array access patterns with one or more of the distances that are equivalent.

Abstract: A system and method for efficient compilation and invocation of function type calls in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). The system comprises a virtual machine for executing a software application; a memory space for the application byte code comprising callsites generated using a function type carrier; a bytecode to machine code compiler which performs MethodHandle invocation optimizations; a memory space for the compiled machine code; and a memory space for storing software objects as part of the software application. The system enables carrying the function type from the original MethodHandle to a callsite in the generated bytecode, including maintaining generics information for a function type acquired from a target function, and generating a callsite based on the generics information for the function object invocation.

Abstract: A computer-implemented method, apparatus, and computer program product to manage variable assignments in a program. The process identifies a set of variable assignments that is live on a portion of paths to form a set of identified variable assignments. Each of the set of identified variable assignments assign a value to at least one variable of a set of variables. The process determines a set of program points at which the set of identified variable assignments is live on all paths. The process also moves the set of identified variable assignments to the set of program points in response to determining that the set of identified variable assignments is movable to the set of program points.

Abstract: A mechanism for performing register allocation based on priority spills and assignments is disclosed. A method of embodiments of the invention includes repetitively detecting fat points during a compilation process of a software program running on a virtual machine of a computer system, each fat point representing a program point having a high register pressure, the high register pressure occurs when a number of live program variables of the software program living at a given program point of the software program is greater than a number of available processor registers of the computer system. The method further includes choosing a fat point with a highest register pressure, selecting a live program variable having a lowest priority at the chosen fat point, and spilling the lowest priority live program variable to memory of the computer system.

Abstract: Methods, software tools and systems for analyzing software applications, e.g., Web applications, are described. A software application to be analyzed is transformed into an abstract representation which preserves its information flow properties. The abstract interpretation is evaluated to identify vulnerabilities using, for example, type qualifiers to associate security levels with variables and/or functions in the application being analyzed and typestate checking. Runtime guards are inserted into the application to secure identified vulnerabilities.

Abstract: Detecting localizable native methods may include statically analyzing a native binary file of a native method. For each function call invoked in the native binary, it is checked whether resources accessed through the function call is locally available or not. If all resources accessed though the native method is locally available, the method is annotated as localizable.

Abstract: Detection of redundant or duplicate method calls in a running program is provided. One or more methods can be selectively called when a program is running. Specified data is collected each time that a call to a given one of the methods occurs, wherein a given call to the given method is associated with a set of arguments comprising one or more particular argument values for the given method. The collected data includes an element uniquely identifying each of the particular argument values. The collected data is stored at a selected location, and a call threshold is selected for the given method, wherein the call threshold comprises a specified number of occurrences of the given call to the given method. The collected data is selectively analyzed at the storage location, to determine whether an occurrence of the given call to the given method has exceeded the call threshold.

Abstract: Idle processor cores can be used to compile methods that are likely to be executed by a program based on profile data that is captured during one or more previous executions. Methods that are determined by the profile data to be likely to be used can be compiled eagerly on one or more background threads. Transparency can be achieved by ensuring that module load order is not altered because of the background threads by recording the state of loaded modules after each profiled compilation, persisting that data, and waiting to eagerly compile a method until the method to be compiled and all its dependencies has been loaded by the executing program.