Including Analysis Of Program Patents (Class 717/154)
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Patent number: 8201159Abstract: An information handling system (IHS) employs a compiler methodology that seeks to improve the efficiency of code that executes in a multi-core processor. The compiler receives source code and converts the source code for execution using data parallel select operations that perform well in a single instruction multiple data (SIMD) environment. The compiler of the IHS may apply one or several optimization processes to the code to increase execution efficiency in a parallel processing environment.Type: GrantFiled: August 4, 2006Date of Patent: June 12, 2012Assignee: International Business Machines CorporationInventor: Michael Karl Gschwind
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Patent number: 8196125Abstract: Methods, systems, and machine-readable media are disclosed for improving the efficiency of policy enforcement. According to one embodiment, a method for improving efficiency during enforcement of a policy can comprise determining a topology for the policy. A plurality of equivalent topologies for the policy can then be determined. A cost function can be applied to each of the plurality of equivalent topologies and one of the plurality of equivalent topologies can be selected based on the cost function.Type: GrantFiled: February 21, 2007Date of Patent: June 5, 2012Assignee: Oracle International CorporationInventor: Stephane H. Maes
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Patent number: 8196127Abstract: An information handling system (IHS) employs a compiler methodology that seeks to improve the efficiency of code that executes in a multi-core processor. The compiler receives source code and converts the source code for execution using data parallel select operations that perform well in a single instruction multiple data (SIMD) environment. The compiler of the IHS may apply one or several optimization processes to the code to increase execution efficiency in a parallel processing environment.Type: GrantFiled: August 4, 2006Date of Patent: June 5, 2012Assignee: International Business Machines CorporationInventor: Michael Karl Gschwind
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Patent number: 8191055Abstract: The present invention is related to a method and a software program for optimizing the positioning of software functions in a memory of a computing device. The present invention hereby comprises the steps of identifying each of a number of software functions and the respective number of calls between the identified software functions; positioning the two software functions sharing the highest number of calls next to each other to form a group of software functions and updating the number of calls between the newly formed group and the other software functions, and repeating the positioning step and the updating step for the software functions and/or groups of software functions sharing the respective highest number of calls in the next calculation step and so forth until all software functions are positioned in a sequential order.Type: GrantFiled: August 30, 2006Date of Patent: May 29, 2012Assignee: Sony Ericsson Mobile Communications ABInventors: Tobias Ritzau, Rickard Moller
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Patent number: 8185881Abstract: Pointer analysis is used for different applications, e.g., compilers, debugging tools and programs understanding tools, each having different requirements. A framework for pointer analysis is provided that defines a multidimensional space, for example a three-dimensional space, containing an order sensitivity dimension, a predicate sensitivity dimension and a value persistence dimension. A point in the three-dimensional space is identified. This point yields values for order sensitivity, predicate sensitivity and value persistence. Pointer analysis is then conducted on a computer program in accordance with the identified values for order sensitivity, predicate sensitivity and value persistence.Type: GrantFiled: June 19, 2007Date of Patent: May 22, 2012Assignee: International Business Machines CorporationInventors: Daniel Brand, Marcio Buss, Vugranam C Sreedhar
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Patent number: 8181170Abstract: Analyzing a first binary version of a program and unwind information associated with the first binary version of the program, performing optimization on the first binary version of the program to produce a second binary version of the program based at least in part on the results of the analysis, and generating new unwind information for the second binary version of the program based at least in part on the results of the analysis and at least in part on the optimization performed.Type: GrantFiled: January 16, 2009Date of Patent: May 15, 2012Assignee: Intel CorporationInventors: Harish G. Patil, Robert Muth, Geoff Lowney
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Patent number: 8176477Abstract: A method, system and program product for optimizing emulation of a suspected malware. The method includes identifying, using an emulation optimizer tool, whether an instruction in a suspected malware being emulated by an emulation engine in a virtual environment signifies a long loop and, if so, generating a first hash for the loop. Further, the method includes ascertaining whether the first hash generated matches any long loop entries in a storage and, if so calculating a second hash for the long loop. Furthermore, the method includes inspecting any long loop entries ascertained to find an entry having a respective second hash matching the second hash calculated. If an entry matching the second hash calculated is found, the method further includes updating one or more states of the emulation engine, such that, execution of the long loop of the suspected malware is skipped, which optimizes emulation of the suspected malware.Type: GrantFiled: September 14, 2007Date of Patent: May 8, 2012Assignee: International Business Machines CorporationInventor: Ji Yan Wu
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Patent number: 8166462Abstract: A data space profiler may include a graphical user interface (GUI) for sorting, aggregating and displaying profile data associated with runtime events of a profiled software application. This profile data may include costs associated with events as well as extended address elements and other code behavior attributes associated with them. The GUI may include means for selecting a perspective from which cost data is to be presented as well as presentation options for displaying the data. The presentation options may include panning and zooming options, which may determine how the data is sorted and/or aggregated for display. The GUI may also include means for specifying filter criteria, which may be used to determine which data to display. By providing means to alternate the display of profile data according to different perspectives and filtering criteria, the GUI may facilitate identification of performance bottlenecks of the profiled application and the causes thereof.Type: GrantFiled: September 7, 2006Date of Patent: April 24, 2012Assignee: Oracle America, Inc.Inventors: Nicolai Kosche, Arpana Jayaswal, Martin S. Itzkowitz
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Publication number: 20120096444Abstract: The various embodiments of the invention relate generally to computer software, computer program architecture, software development, and computer programming languages, and more specifically, to techniques for analyzing control flow in COBOL-sourced programs to facilitate optimized conversions to object-oriented program structures. For example, a compiler can include a global optimizer configured to analyze execution flow for a range of blocks of source code in the memory to determine flow-affected code. Also, the compiler can include a native code generator configured to generate native code based on representations of the native code as functions of the source code. The native code is configured to execute on a virtual machine.Type: ApplicationFiled: September 19, 2011Publication date: April 19, 2012Applicant: Micro Focus (US), Inc.Inventors: Jeremy Wright, Robert Sales
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Patent number: 8161470Abstract: Automated injection of Java bytecode instructions for Java load time optimization via runtime checking with upcasts. Exemplary embodiments include a method including generating a stack for each of a plurality of bytecodes, generating a subclass configured to keep a history of instructions that have modified the stack, statically scanning a plurality of Java classes associated with the plurality of bytecodes to locate class file configurations and bytecode patterns that cause loading of additional classes to complete a verification of each of the classes in the plurality of Java classes, rewriting the bytecodes to delay the loading of the additional classes until required at a runtime, recording modifications that have been made to the stack by the instructions, and applying the modifications to each of the bytecodes in the plurality of bytecodes.Type: GrantFiled: August 31, 2007Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: T. Mark W. Bottomley, Nicholas J. Doyle, Aleksandr V. Kennberg, Orlando E. Marquez, Amey A. Shirodkar
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Patent number: 8161467Abstract: A compiler includes a register allocator for allocating registers for instructions in a program to be compiled, and a code generator for generating object code based on the register allocation results performed by the register allocator. The register allocator allocates logical registers for instructions in the program to be compiled. The register allocation further allocates, to physical registers, the logical registers that are allocated to the instructions of the program, so that the physical registers that are live at a procedure call in the program to be compiled are allocated from the bottom of the register stack.Type: GrantFiled: October 31, 2007Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: Akira Koseki, Mikio Takeuchi, Hideaki Komatsu
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Patent number: 8156481Abstract: A device generates code with a technical computing environment (TCE) based on a model and information associated with a target processor, registers an algorithm with the TCE, automatically sets optimization parameters applied during generation of the code based on the algorithm, executes the generated code, receives feedback based on execution of the generated code, and uses the feedback to automatically update the optimization parameters and to automatically regenerate the code with the TCE until an optimal code is achieved for the target processor.Type: GrantFiled: October 5, 2007Date of Patent: April 10, 2012Assignee: The Mathworks, Inc.Inventors: David Koh, Murat Belge, Pieter J. Mosterman
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Patent number: 8156484Abstract: A system in which a plurality of performance objects are stored in computer memory, where each performance objects contains at least one input template and a corresponding optimized code path program product. A template matcher intercepts an input set destined to a directory server, and then determines a match between the intercepted input set and one of the templates. A code path selector then retrieves the corresponding optimized code path program product stored in a performance object associated with the matched template. Finally, a code processor executes the retrieved optimized code path program product on the intercepted input set, and stores the result in a tangible computer media through alteration of a physical property of the media.Type: GrantFiled: August 22, 2007Date of Patent: April 10, 2012Assignee: International Business Machines CorporationInventor: Richard J. Smith
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Patent number: 8156483Abstract: A method and system of detecting vulnerabilities in source code. Source code is parsed into an intermediate representation. Models (e.g., in the form of lattices) are derived for the variables in the code and for the variables and/or expressions used in conjunction with routine calls. The models are then analyzed in conjunction with pre-specified rules about the routines to determine if the routine call posses one or more of pre-selected vulnerabilities.Type: GrantFiled: June 27, 2008Date of Patent: April 10, 2012Assignee: International Business Machines CorporationInventors: Ryan J. Berg, Larry Rose, John Peyton, John J. Danahy, Robert Gottlieb, Chris Rehbein
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Patent number: 8151255Abstract: A method for detecting a dependence violation in an application that involves executing a plurality of sections of the application in parallel, and logging memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, where the plurality of logs is compared while executing the plurality of sections to determine whether the dependence violation exists.Type: GrantFiled: June 26, 2006Date of Patent: April 3, 2012Assignee: Oracle America, Inc.Inventors: Phyllis E. Gustafson, Miguel Angel Lujan Moreno, Michael H. Paleczny, Christopher A. Vick, Olaf Manczak, Jay R. Freeman
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Patent number: 8145992Abstract: Systems and methods are described that facilitate validating electronic document conversion chain design in real time, as a designer edits a conversion chain that converts a document collection between formats. Waypoints are inserted into the document conversion chain by associating validation specifications with selected conversion components in the chain. AS the conversion chain is executed on a document collection, the validation specification is executed on all documents in the collection when a selected conversion component is executed. Validation results are returned to indicate to the designer which documents were successfully converted by the component and which were not. The designer can then modify the conversion chain, which is re-executed, and validation results are again presented to the designer for comparison to the pre-modification validation results. The designer can then approve or reject the modification(s) depending on whether document validation is improved thereby.Type: GrantFiled: June 30, 2008Date of Patent: March 27, 2012Assignee: Xerox CorporationInventors: Thierry Jacquin, Jean-Pierre Chanod
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Patent number: 8146068Abstract: A computer implemented method, system and computer program product for managing heuristic properties for controlling an optimization transformation in a compiler or in other heuristically controlled software in a data processing system. A computer implemented method for controlling an optimization transformation in heuristically controlled software includes defining at least one heuristic property for controlling a behavior of an optimization transformation, and creating at least one heuristic property modifier for each desired change in the behavior of the optimization transformation. At least one of the at least one heuristic property is then modified using the at least one heuristic property modifier for achieving each desired change in the behavior of the optimization transformation.Type: GrantFiled: May 29, 2008Date of Patent: March 27, 2012Assignee: International Business Machines CorporationInventor: Arie Tal
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Patent number: 8141054Abstract: A method, an information processing system, and a computer readable medium, are used to detect atomic-set serializability violations in an execution of a program. A set of classes associated with a program to be analyzed is identified. The set of classes include a set of fields. At least one subset of fields in the set of fields in the identified classes is selected. A set of code fragments associated with an execution of the program is selected. Data accesses in the selected set of code fragments are observed. It is determined if the selected set of code fragments is serializable for each selected subset of fields.Type: GrantFiled: August 8, 2007Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Julian T. Dolby, Christian J. Hammer, Frank Tip, Mandana Vaziri-Farahani
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Patent number: 8141064Abstract: A method for analyzing a program is provided. The method includes, determining an object type that may exist at an execution point of the program, wherein this enables determination of possible virtual functions that may be called; creating a call graph at a main entry point of the program; and recording an outgoing function call within a main function. The method also includes analyzing possible object types that may occur at any given instruction from any call path for virtual calls, wherein possible object types are determined by tracking object types as they pass through plural constructs; and calling into functions generically for handling specialized native runtime type information.Type: GrantFiled: December 11, 2008Date of Patent: March 20, 2012Assignee: Lantronix, Inc.Inventor: Timothy Chipman
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Patent number: 8141163Abstract: In a system where an indirect control flow instruction requires a CPU to consult a first memory address, in addition to what is encoded in the instruction itself, for program execution, a method is provided to determine if the first memory address contains a valid or plausible value. The first memory address is compared to an expected or predicted memory address. A difference between the expected or predicted memory address and the first memory address causes an evaluation of any program code about to be executed. The evaluation of code determines whether or not a malicious attack is occurring, or being attempted, that might affect proper operation of the system or program.Type: GrantFiled: May 21, 2008Date of Patent: March 20, 2012Assignee: VMware, Inc.Inventor: Geoffrey Pike
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Patent number: 8141063Abstract: Exemplary embodiments of the present invention comprise an algorithm described herein that utilizes a technique to shrink a set of potentially reachable elements to a close approximation of the actually reachable elements within a software application by closely approximating how the application executes at runtime. The algorithm attempts to identify all of the reachable elements of an object-oriented software application by starting with the entry points into the application and thereafter progressively determining all of the software elements within the application that are reachable. The algorithm instantiates application objects in the same way they would be instantiated at runtime and passes references to these objects from one method and field to the next; emulating as closely as possible object instantiation performed by the application at runtime.Type: GrantFiled: August 30, 2007Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventor: Sean C. Foley
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Patent number: 8141068Abstract: A computer program consisting of a compiler for compiling source code programs into executable code. The compiler is suited to achieving high efficiency on a processor that can process many instructions at once but the instructions have dependency constraints and the processor has no internal mechanism for dealing with these constraints, such as the Itanium class of processors. As each instruction is considered for addition to a group of instructions for a single cycle, dependencies are checked to determine whether the entire group can be scheduled in any possible order. Once all the instructions of the group have been selected, the instructions are then reordered for placement in a reservation table. For implementation in the Itanium class of processors, detailed requirements of the processor are accommodated with a structure that can be adjusted for any processor in the class. The structure can also be adjusted for other classes of processors.Type: GrantFiled: June 18, 2002Date of Patent: March 20, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventor: Carol L. Thompson
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Patent number: 8141061Abstract: A compiler utility assigns memory locations to alias-free variables within a computer program. The compiler utility allocates memory keys for the alias-free variables, such that access to the memory locations of the alias-free variables is granted to blocks of code that have knowledge of the memory keys. In response to a command by the user, the compiler generates code to detect violations of alias assumptions during execution of the computer program. During the compiling process, the compiler adds the generated code for detecting violations of alias assumptions to the compiled computer program.Type: GrantFiled: November 13, 2006Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Francis M. Bartucca, Billy R. Robinson, Punit B. Shah, Carlos P. Sosa
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Patent number: 8132162Abstract: A runtime machine manages a selected disk space allocated to the runtime machine by the operating system and manages a separate method cache within the selected virtual disk space. The runtime machine controls caching within the method cache of a separate result of at least one method of the application marked as cache capable. For a next instance of the method detected by the runtime machine, the runtime machine accesses the cached separate result of the method in lieu of executing the method again. The runtime machine marks a method as cache capable by analyzing the types of objects within the argument object graph and result object graph of a method. If the runtime machine detects only primitive type objects, then the runtime machine marks the method so that the result of the method will be stored in the method cache.Type: GrantFiled: July 5, 2007Date of Patent: March 6, 2012Assignee: International Business Machines CorporationInventor: Robert R. Peterson
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Patent number: 8132150Abstract: A method and computer readable medium for automatic replacement of object classes in a library with custom classes to improve program efficiency. The method begins with static analysis preformed on a program containing a plurality of objects in order to determine type-correctness constraints and to detect unused functionality in one or more of the objects to be replaced. The plurality of objects is instrumented to detect usage patterns of functionality in one or more objects. Customized classes are generated based upon the static analysis and usage patterns detected. Bytecode is rewritten which is used for generating classes. The present invention provides transparency in the replacement of the objects.Type: GrantFiled: February 20, 2008Date of Patent: March 6, 2012Assignee: International Business Machines CorporationInventors: Bjorn De Sutter, Julian Dolby, Frank Tip
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Patent number: 8120610Abstract: A system traverses a directed cyclic graph to discover a relationship between a first object and a second object, and creates an alias. The alias represents the second object. The system replaces the relationship between the first object and the second object with the created alias, and creates a reference from the first object to the alias.Type: GrantFiled: March 15, 2006Date of Patent: February 21, 2012Assignee: Adobe Systems IncorporatedInventor: Norman A. Stratton
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Patent number: 8122430Abstract: A method and computer readable medium for automatic replacement of object classes in a library with custom classes to improve program efficiency. The method begins with static analysis preformed on a program containing a plurality of objects in order to determine type-correctness constraints and to detect unused functionality in one or more of the objects to be replaced. The plurality of objects is instrumented to detect usage patterns of functionality in one or more objects. Customized classes are generated based upon the static analysis and usage patterns detected. Bytecode is rewritten which is used for generating classes. The present invention provides transparency in the replacement of the objects.Type: GrantFiled: October 29, 2007Date of Patent: February 21, 2012Assignee: International Business Machines CorporationInventors: Bjorn De Sutter, Julian Dolby, Frank Tip
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Patent number: 8117605Abstract: In a multi-threaded computer system that uses transactional memory, object fields accessed by only one thread are accessed by regular non-transactional read and write operations. When an object may be visible to more than one thread, access by non-transactional code is prevented and all accesses to the fields of that object are performed using transactional code. In one embodiment, the current visibility of an object is stored in the object itself. This stored visibility can be checked at runtime by code that accesses the object fields or code can be generated to check the visibility prior to access during compilation.Type: GrantFiled: December 19, 2005Date of Patent: February 14, 2012Assignee: Oracle America, Inc.Inventors: Yosef Lev, Jan-Willem Maessen, Mark S. Moir
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Patent number: 8108850Abstract: The present invention discloses a power-aware compiling method, wherein the power model of an application program are established via building and analyzing the control flow chart and the data flow chart of the application program; each functional unit of the application program is assigned a power mode; a judgment is undertaken to determine whether the idle functional units are independent; if none dependency exists between those idle function units, the program codes of the same idle function units are merged into a new basic block, and the idle functional units are turned off for saving power; each new basic block is assigned an appropriate power mode; the basic blocks with the same power modes are merged to reduce the transitions between different power modes; thus, the power consumed by changing voltage or frequency can be decreased.Type: GrantFiled: December 5, 2006Date of Patent: January 31, 2012Assignee: National Chung Cheng UniversityInventors: Rong-Guey Chang, Tzong-Yen Lin
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Patent number: 8104030Abstract: A computer implemented method, computer usable program code, and a system for parallelizing a loop. A parameter that will be used to limit parallelization of the loop is identified to limit parallelization of the loop. The parameter specifies a minimum number of loop iterations that a thread should execute. The parameter can be adjusted based on a parallel performance factor. A parallel performance factor is a factor that influences the performance of parallel code. A number of threads from a plurality of threads is selected for processing iterations of the loop based on the parameter. The number of threads is selected prior to execution of the first iteration of the loop.Type: GrantFiled: December 21, 2005Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Raul Esteban Silvera, Priya Unnikrishnan, Guansong Zhang
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Patent number: 8104028Abstract: Repetitive synchronization in program code is optimized through lock coarsening that is performed subject to a number of constraints. Using a forward pass over the program code followed by a backward pass, region extent bits may be determined that identify the points in the program where object locking can be coarsened. The program code may then be modified to realize coarsened locking regions determined based on the region extent bits. Alternatively, previously determined value numbers may provide much of the information collected by the two passes. In such a case, a single pass over the program code may locate features that limit lock coarsening opportunities. A set of synchronization operations that can be removed may then be determined and used when modifying the program code to coarsen locking regions.Type: GrantFiled: March 31, 2009Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Mark Graham Stoodley, Vijay Sundaresan
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Patent number: 8099725Abstract: Methods, computer program products, and system for generating code for an extract, transform, and load (ETL) data flow are provided. In one implementation, the method includes receiving an ETL data flow representing a logical transformation and flow of data, placing a staging table at a pre-determined location in the ETL data flow to reduce a total number of staging tables required by the transformation, and generating code for the transformation based on the ETL data flow including the staging table placed at the pre-determined location.Type: GrantFiled: October 11, 2006Date of Patent: January 17, 2012Assignee: International Business Machines CorporationInventors: Qi Jin, Hui Liao, Lin Xu
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Patent number: 8099726Abstract: A software transactional memory system is described which utilizes decomposed software transactional memory instructions as well as runtime optimizations to achieve efficient performance. The decomposed instructions allow a compiler with knowledge of the instruction semantics to perform optimizations which would be unavailable on traditional software transactional memory systems. Additionally, high-level software transactional memory optimizations are performed such as code movement around procedure calls, addition of operations to provide strong atomicity, removal of unnecessary read-to-update upgrades, and removal of operations for newly-allocated objects. During execution, multi-use header words for objects are extended to provide for per-object housekeeping, as well as fast snapshots which illustrate changes to objects. Additionally, entries to software transactional memory logs are filtered using an associative table during execution, preventing needless writes to the logs.Type: GrantFiled: March 23, 2006Date of Patent: January 17, 2012Assignee: Microsoft CorporationInventor: Timothy Lawrence Harris
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Patent number: 8091071Abstract: A method and a system for template-based code generation. The method easily renders executable code using reusable customizable templates. The method further checks the templates for syntax errors prior to use. The system provides a memory and a processor for implementing template-based code generation.Type: GrantFiled: August 21, 2006Date of Patent: January 3, 2012Assignee: SAP, AGInventor: Efstratios Tsantilis
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Patent number: 8087012Abstract: A technique is provided for eliminating maximum and minimum expressions within loop bounds are provided. A loop in a code is identified. The loop is determined to meet conditions, which require an upper loop bound and a lower loop bound to contain maximum and minimum expressions, loop-invariant operands, a predetermined size for a code size, and a total number of instructions to be greater than a predetermined constant. A profitability of loop versioning is determined based on a performance gain of a fast version of the loop, a probability of executing the fast version of the loop at runtime, and an overhead for performing loop versioning. A pair of lower loop bound and upper loop bound values resulting in a constant number is identified. A loop iteration value is checked to be a non-zero constant. Branches are identified, and loop versioning is performed to generate a versioned loop.Type: GrantFiled: August 21, 2007Date of Patent: December 27, 2011Assignee: International Business Machines CorporationInventor: Edwin Chan
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Patent number: 8065670Abstract: A system that reduces overly optimistic program execution. During operation, the system encounters a bounded-execution block while executing a program, wherein the bounded execution block includes a primary path and a secondary path. Next, the system executes the bounded execution block. After executing the bounded execution block, the system determines whether executing instructions on the primary path is preferable to executing instructions on the secondary path based on information gathered while executing the bounded-execution block. If not, the system dynamically modifies the instructions of the bounded-execution block so that during subsequent passes through the bounded-execution block, the instructions on the secondary path are executed instead of the instructions on the primary path.Type: GrantFiled: October 3, 2006Date of Patent: November 22, 2011Assignee: Oracle America, Inc.Inventors: Tycho G. Nightingale, Wayne Mesard
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Patent number: 8065665Abstract: Correlating profile data facilitates sophisticated code optimization. Going beyond one to one relationships between code execution hindrances and single code behavior attributes provides insight into code behavior at a finer level of granularity. The capability to aggregate profile data based on multiple code behavior attributes and filter based on instances thereof, allows code optimization decisions to be made based on presentation of profile data from various perspectives. Profile data, which includes code behavior attributes correlated with code execution hindrances, is aggregated based at least in part on a first code behavior attribute. Code behavior attributes include one or more of memory references, memory reference objects, functions, time ranges, processors, processes, threads, and source-level data objects. The aggregated profile data is filtered based on an instance of the first code behavior attribute.Type: GrantFiled: May 6, 2004Date of Patent: November 22, 2011Assignee: Oracle America, Inc.Inventors: Nicolai Kosche, Brian J. Wylie, Christopher P. Aoki, Martin S. Itzkowitz
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Publication number: 20110283095Abstract: Mechanisms are provided for offloading a workload from a main thread to an assist thread. The mechanisms receive, in a fetch unit of a processor of the data processing system, a branch-to-assist-thread instruction of a main thread. The branch-to-assist-thread instruction informs hardware of the processor to look for an already spawned idle thread to be used as an assist thread. Hardware implemented pervasive thread control logic determines if one or more already spawned idle threads are available for use as an assist thread. The hardware implemented pervasive thread control logic selects an idle thread from the one or more already spawned idle threads if it is determined that one or more already spawned idle threads are available for use as an assist thread, to thereby provide the assist thread. In addition, the hardware implemented pervasive thread control logic offloads a portion of a workload of the main thread to the assist thread.Type: ApplicationFiled: May 12, 2010Publication date: November 17, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ronald P. Hall, Hung Q. Le, Raul E. Silvera, Balaram Sinharoy
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Patent number: 8056060Abstract: A software product is tested by first obtaining a performance matrix for the software product, the performance matrix containing the profile results of a plurality of tests on the software product, and an expected result vector for the plurality of tests. A test sequence is then executed for the software product, the sequence comprising selecting a subset of the plurality of tests, running the test subset to obtain a new result vector for the test subset, comparing the new result vector entry with the expected result vector entry for the same test, selecting a test (which may be one of the subset or may be a new test) according to the outcome of the result vector comparison and the performance matrix, and running the selected test under profile.Type: GrantFiled: June 5, 2007Date of Patent: November 8, 2011Assignee: International Business Machines CorporationInventors: Richard Michael Bicheno, Kevin Anthony Braithwaite, Marc Stanley Carter, Tim Dunn, Michael George Taylor
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Patent number: 8056065Abstract: Mechanisms for stable transitions in the presence of conditionals for an advanced dual-representation polyhedral loop transformation framework are provided. The mechanisms of the illustrative embodiments address the weaknesses of the known polyhedral loop transformation based approaches by providing mechanisms for performing code generation transformations on individual statement instances in an intermediate representation generated by the polyhedral loop transformation optimization of the source code. These code generation transformations have the important property that they do not change program order of the statements in the intermediate representation. This property allows the result of the code generation transformations to be provided back to the polyhedral loop transformation mechanisms in a program statement view, via a new re-entrance path of the illustrative embodiments, for additional optimization.Type: GrantFiled: September 26, 2007Date of Patent: November 8, 2011Assignee: International Business Machines CorporationInventors: Alexandre E. Eichenberger, John K. P. O'Brien, Kathryn M. O'Brien, Nicolas T. Vasilache
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Patent number: 8056055Abstract: A mechanism controls disposition of a candidate object in an object-oriented programming environment. The mechanism identifies cyclic information related to an object being considered for destruction and determines based on that information whether the candidate object is externally unreachable and can therefore be destroyed. The cyclic information may be stored for repeated use.Type: GrantFiled: June 9, 2008Date of Patent: November 8, 2011Assignee: The MathWorks, Inc.Inventor: David A. Foti
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Patent number: 8056067Abstract: Data processing delay is reduced during data processing, using compiler optimization. Blocks of code are scanned in an order from blocks recurring most often to blocks recurring least often. In an order from blocks recurring most often to block recurring least often, shifts are inserted before arithmetic references, such that a previous use of the arithmetic reference does not require a shift, shifts are inserted after each memory use such that the next use of the memory does not require a shift, and shifts are inserted after each arithmetic reference such that the next use of the arithmetic reference requires no shift. In addition, if there is a mismatch between the last shifted amount of any one block and the required initial shifted amount in any of its successors, shifts are inserted to make up for the mismatch.Type: GrantFiled: September 29, 2006Date of Patent: November 8, 2011Assignee: International Business Machines CorporationInventors: Michael Fulton, Allan Kielstra, Vijay Sundaresan
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Patent number: 8037456Abstract: A program execution device is provided which, even when a currently executed application (program) abnormally terminates, can prevent the application from becoming unusable, and thereby improve user convenience. An MA management unit includes: an MA management unit main for receiving an instruction from an initialization subprogram and controlling the other constituent elements in the MA management unit; an XAIT obtainment analysis unit for analyzing an XAIT sent from the head end; an MA selection unit A for selecting a program to be activated, according to the XAIT analysis result; an MA activation unit for activating of the specified program; an MA monitoring unit for monitoring the operational state of the specified program and notifying when an abnormal termination has occurred; and an MA selection unit B for selecting an alternative program.Type: GrantFiled: April 4, 2005Date of Patent: October 11, 2011Assignee: Panasonic CorporationInventors: Yoshio Kawakami, Yuki Horii
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Patent number: 8037462Abstract: A method for providing parallel processing capabilities including: performing scalar and array privatization analysis via a compiler; checking whether an assignment statement is reducible; recognizing reduction patterns through a pattern matching algorithm; classifying a reduction type of each of the reduction patterns; and performing transformations and code generation for each reduction the reduction type of each of the reduction patterns.Type: GrantFiled: August 2, 2006Date of Patent: October 11, 2011Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Yaoqing Gao, Zhixing Ren, Raul E. Silvera
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Patent number: 8032875Abstract: A system and method for profiling a software application may include means for defining a custom cost metric that includes a cost metric identifier and a cost function. The cost function may apply a mathematical formula to data extracted from an event set to calculate a respective cost metric value for each of one or more events in the event set. The data extracted from the event set may include one or more respective profiling object identifiers and one or more other respective costs associated with each of the one or more events. A cost associated with an event in the event space may be associated with a function or basic block of instructions. The cost function may include a distribution formula for attributing at least a portion of the cost associated with a function or basic block to each of the instructions comprising the function or basic block.Type: GrantFiled: November 28, 2006Date of Patent: October 4, 2011Assignee: Oracle America, Inc.Inventors: Nicolai Kosche, Kenneth Tracton
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Publication number: 20110239197Abstract: Dynamic determination of affinity between fields of structure may be determined based on accesses to the same instance. The affinity may be utilized in determining a data layout of a structure so as to optimize performance of a target program. The affinity determination may be an estimation based upon a trace of an execution of the target program. Access relation between proximate accesses to fields of the same instance may be utilized to estimate an optimized data layout of the structure.Type: ApplicationFiled: March 23, 2010Publication date: September 29, 2011Applicant: International Business Machines CorporationInventors: Alon Dayan, David Joel Edelsohn, Olga Golovanevsky, Ayal Zaks
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Patent number: 8028163Abstract: A hierarchical digital signature method is provided by which different levels of data elements of a data entry are processed in turn to derive function values (for example hash function values) for data elements in the level which are to form part of the digital signature. All function values for one level are combined in a further function to provide an additional function value, and the additional function value is used in the processing of data elements in the next level nearer to the root. This provides a digital signature which can use only selected data elements of a data entry, and which is not sensitive to the ordering of the data entry structure.Type: GrantFiled: July 26, 2006Date of Patent: September 27, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark Henry Butler, Scott Alan Stanley
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Publication number: 20110225572Abstract: A compiler and method for compiling source code comprising: a library of code patterns and control flow information for each code pattern, wherein each code pattern comprises one or more variable; and a processor arranged to: evaluate the control flow of an expression in the source code, wherein the expression comprises one or more variable, match the expression to one of the code patterns in the library based on the evaluated control flow information, assign value numbers to the one or more variable within the expression, determine if the expression and the matched code pattern are equivalent based on the assigned value numbers, and replace the expression in the source code with a replacement expression if the expression and the matched code pattern are equivalent.Type: ApplicationFiled: December 17, 2008Publication date: September 15, 2011Inventors: Mihai Emanuel Stoicescu, Bogdan Florin Ditu, Mihail Popa
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Patent number: 8020154Abstract: Precise exception handling relies on a precise subject state including an accurate program counter and register values of a subject processor. Subject code (17) is translated into target code (21) executable by a target processor (13). The generated target code (17) includes counterpart target instructions (214) associated with fault-vulnerable subject code instructions (174). Further, each of the counterpart target code instruction (214) is associated with recovery information (195). When an exception (e.g. a fault) occurs, the recovery information (195) is retrieved and used to recover a precise subject state, in particular by taking account of optimizations to generate the common-case target code (21). The precise subject state is then used to precisely handle the exception.Type: GrantFiled: November 14, 2005Date of Patent: September 13, 2011Assignee: International Business Machines CorporationInventors: Gavin Barraclough, Kit Man Wan, Abdul Rahman Hummaida
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Patent number: 8015556Abstract: A method of data reshaping for multidimensional dynamic array objects in the presence of multiple object instantiations. The method includes collecting all alias information using interprocedural point escape analysis, and collecting all shape information using interprocedural shape analysis. The method progresses with selecting the candidate dynamic objects based on alias and shape analysis, and determining the types of data reshaping for the candidate dynamic objects. The method further includes creating objects for selected dynamic objects with multiple object instantiations. The method proceeds by updating the memory allocation operations for the selected dynamic objects and inserting statements to initialize object descriptors. The method further includes creating the copy of the object descriptors for selected dynamic object assignments. The method concludes by replacing the object references by array-indexed references for selected dynamic objects using object descriptors.Type: GrantFiled: October 12, 2006Date of Patent: September 6, 2011Assignee: International Business Machines CorporationInventors: Shimin Cui, Raul E. Silvera