Abstract: A process scheduling method includes executing a plurality of symmetric schedulers on respective processors of a multiprocessing system. Each scheduler periodically accesses a shared lock to obtain exclusive access to a shared scheduling data structure including (a) process information identifying the processes, and (b) scheduling information reflecting the executability and priorities of the processes. After obtaining the lock, each scheduler performs a scheduling routine including (a) utilizing the scheduling information and a scheduling algorithm to identify a next executable process, and (b) (1) activating the identified process to begin executing on the processor on which the scheduler is executing, and (2) updating the scheduling information to reflect the activation of the identified process. The scheduler then accesses the lock to relinquish exclusive access to the scheduling data structure.

Abstract: In a parallel computing environment comprising a network of SMP nodes each having at least one processor, a parallel-aware co-scheduling method and system for improving the performance and scalability of a dedicated parallel job having synchronizing collective operations. The method and system uses a global co-scheduler and an operating system kernel dispatcher adapted to coordinate interfering system and daemon activities on a node and across nodes to promote intra-node and inter-node overlap of said interfering system and daemon activities as well as intra-node and inter-node overlap of said synchronizing collective operations. In this manner, the impact of random short-lived interruptions, such as timer-decrement processing and periodic daemon activity, on synchronizing collective operations is minimized on large processor-count SPMD bulk-synchronous programming styles.

Abstract: Method, apparatus and system embodiments to provide user-level creation, control and synchronization of OS-invisible “shreds” of execution via an abstraction layer for a system that includes one or more sequencers that are sequestered from operating system control. For at least one embodiment, the abstraction layer provides sequestration logic, proxy execution logic, transition detection and shred suspension logic, and sequencer arithmetic logic. Other embodiments are also described and claimed.

Abstract: Method, system and means are provided for simultaneous activation/deactivation of a set of tasks by a processor, each of the tasks normally executed in a sequential fashion by one or more processors. A list of tasks to be activated/deactivated is stored, including the timing relationship for the activation process. The list is then implemented as frame numbers for activation and requested state in the actual task list. The executing processor compares the requested state to the actual state for each task, and if different, compares the value of the activation frame with the current frame. If the current frame equals or exceeds the activation frame, then the requested active state is transferred to the actual state.

Abstract: A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing migration among different levels of processor architecture. The method utilizes a “processor compatibility register” (PCR) that controls the level of the architecture that the processor appears to support. In one embodiment, the PCR is accessible only to super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program was designed.

Abstract: A method and apparatus for enabling a general purpose operating system to maximize the probability of time-sensitive threads, e.g., multimedia threads, gaining access to CPU resources quickly enough to meet the demands of time-sensitive tasks while allowing time-insensitive threads to meet the demands of time-insensitive tasks, is disclosed. The priorities of time-sensitive threads in an operating system are adjusted so that the time-sensitive threads have a high probability of gaining access to CPU resources quickly enough to meet the demands of time-sensitive tasks while allowing time-insensitive threads to meet the demands of time-insensitive tasks. A system responsiveness cell (SRC) value is used to determine how quickly the operating system needs to respond to time-sensitive threads and time-insensitive threads. Priorities of threads are dynamically changed according to the relative CPU resource access requirements of system profile tasks.

Abstract: A technique provides a dedicated software thread for communicating backup history to clients of a storage system during backup operations. Illustratively, an operating system of the storage system may execute one or more “session” (e.g., backup) threads and a “worker” (e.g., backup history) thread. In particular, the one or more session threads are each configured to backup stored data for a corresponding client to a backup storage device and to generate backup history of data backed up to the backup storage device. Also, the worker thread is configured to obtain the backup history from the one or more session threads, and transmit the backup history to the corresponding client of each of the one or more session threads. In this manner, the worker thread may wait for a response from the corresponding clients, while the one or more corresponding session threads continue to backup the stored data and generate backup history.

Abstract: A method, apparatus, and computer instructions for executing a handler in a multi-threaded process handling a number of threads in a manner that avoids deadlocks. A value equal to the number of threads executing in the data processing system is set. The value is decremented each time a lock count for a thread within the number of threads is zero. A thread within the number of threads is suspended if the thread requests a lock and has a lock count of zero. A procedure, such as a handler, is executed in response to all of the threads within the number of threads having no locks.

Abstract: Systems and methods are disclosed in which the software license for server partitions are flexible in that, as between two (or more, if desired) partitions the software licensed resources assigned to one partition can be used by the other partitions, providing a total number of resources do not exceeded the software license limit. In one embodiment, a workload manager monitors workload utilization to be sure that the total number of CPUs working on the application does not exceed the maximum under the software license. Users are notified when the workload's policy is about to be exceeded. In one embodiment, this could be a warning while in another embodiment additional software licenses can be activated, or a limit can be placed on the CPU use.

Abstract: Partition migrations are scheduled between virtual partitions of a virtually partitioned data processing system. The virtually partitioned data processing system is a tickless system in which a periodic timer interrupt is not guaranteed to be sent to the processor at a defined time interval. A request is received for a partition migration. Gaps between scheduled timer interrupts are identified. The partition migration is then scheduled to occur within the largest gap.

Abstract: A software framework for implementing distributed applications is provided. An implementer's client-specific code functions through the framework's client-side software. The implementer's server-specific code contains system-specific business logic and functions within the framework's server-side software. Communication is provided by the framework between each instance of implementer's client-specific code through an instance of client-side software to implementer's server-specific code through the server side software over at least one communication link. Multi-threaded communication is achievable over a single communications link, even where the implementer writes single-threaded code. The client-side software is able to process synchronous and asynchronous messages received from the server-side software while simultaneously sending additional messages to the server-side software, which can be processed concurrently by said server-side software.

Abstract: A static partition scheduling timeline is generated by identifying a plurality of partitions for scheduling, the partitions associated with a operating system that executes on a processing unit. A first plurality of Activation Frames for a first partition of said plurality of partitions is defined, a second plurality of Activation Frames for a second partition of said plurality of partitions is defined, a first plurality of slices within at least one Activation Frame of said first plurality of Activation Frames is defined, and a second plurality of slices within at least one Activation Frame of said second plurality of Activation Frames is defined. The static partition scheduling timeline comprises the first plurality of Activation Frames, the second plurality of Activation Frames, the first plurality of slices, and the second plurality of slices. The operating system is configured to use the generated static partition scheduling timeline.

Abstract: A method for inserting an object into a concurrent set including obtaining a key associated with the object, traversing the concurrent set using a first thread containing the key, identifying a first insertion point while traversing the concurrent set, where the first insertion point is before a current node and after a predecessor node, obtaining a first lock for the predecessor node after identifying the first insertion point, validating the predecessor node and the current node after obtaining the lock, inserting a new node into the concurrent set after validating, where the new node is associated with the object, and releasing the first lock after inserting the new node.

Abstract: Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Abstract: A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.

Abstract: The present invention provides a task selection assistance apparatus, and a task selection assistance method, which enable burdens on a user to be alleviated in selecting a task for solving a problem. A domain candidate determining portion 210 determines domain candidates to be presented to the user from among domains stored in a task model DB 102, and a domain candidate transmitting portion 201 transmits the domain candidates to a portable terminal 101. A user selected domain obtaining portion 203 obtains a domain, which has been selected by the user, from the portable terminal 101, and the task candidate determining portion 211 determines task candidates to be presented to the user from among tasks stored in the task model DB 102 based on the domain selected by the user.

Abstract: A system and method of improved task switching in a data processing system. First, a first-level cache memory casts out an invalidated page table entry and an associated first page directory base address to a second-level cache memory. Then, the second-level cache memory determines if a task switch has occurred. If a task switch has not occurred, first-level cache memory sends the invalidated page table entry to a current running task directory. If a task switch has occurred, first-level cache memory loads from the second-level cache directory a collection of page table entries related to a new task to enable improved task switching without requiring access to a page table stored in main memory to retrieve the collection of page table entries.

Abstract: Described herein are techniques for adaptively managing timers that are used in various layers of a node. In many cases, the number of timers that occur in the system is reduced by proactively and reactively adjusting values of the timers based on conditions affecting the system, thereby making such a system to perform significantly better and more resiliently than otherwise.

Abstract: A thread scheduling mechanism is provided that flexibly enforces performance isolation of multiple threads to alleviate the effect of anti-cooperative execution behavior with respect to a shared resource, for example, hoarding a cache or pipeline, using the hardware capabilities of simultaneous multi-threaded (SMT) or multi-core processors. Given a plurality of threads running on at least two processors in at least one functional processor group, the occurrence of a rescheduling condition indicating anti-cooperative execution behavior is sensed, and, if present, at least one of the threads is rescheduled such that the first and second threads no longer execute in the same functional processor group at the same time.

Abstract: A method, apparatus and program storage device for managing buffers during online reorganization. An adaptive buffer is provided having a dynamically adjustable boundary, the adaptive buffer processes log records and pointers associated with the log records during online reorganization of a database. Adaptive switching is provided between a first and a second task during the processing of data log records and index log records during the online reorganization of the database.

Abstract: The present invention relates to computers executing in time-share mode, under the control of their operating systems, a number of separate and independent application programs. The present invention relates in particular to the networks of onboard computer networks of IMA type executing application programs written independently of the hardware specifications of the computers and not permanently resident in the computers. The method of the present invention associates with the digital core of each computer of the network a monitoring state machine operating independently and in having the monitoring state machine monitor the correct observance by the associated computer of the time sequencing of the tasks and memory partition allocations. Furthermore, the monitoring state machines can be configured to execute monitoring service applications of time-out or watchdog type to which the application programs executed by the computers of the network can subscribe.

Abstract: Systems and methods are provided that determine the actual amount of time a processor consumes in executing a code portion. The actual execution time of a code portion may be accurately determined by taking into consideration context switches and/or overhead time corresponding to the code portion. Determining the actual execution time of a code portion may include recording context switches and time values that occur during the execution of the code portion. This information along with overhead measurements may be used to generate the actual execution time of a code portion, as will be described in more detail below. For example, the switched-out intervals resulting from the context switches and the overhead time associated with the time measurements may be subtracted from the elapsed time to produce the actual execution time of a code portion.

Abstract: Various new and non-obvious systems and methods for ensuring within a multi-threaded environment that object fields hold legal values are disclosed. One of the disclosed embodiments is a method for a thread locking the top object of an object hierarchy. The thread then gains ownership of the locked object and any children of the locked object, by successively unpacking child objects, allowing the thread to write to any unpacked object field. By owning the top hierarchical object, the thread also achieves transitive ownership to any descendants of the object, allowing the thread to read any object fields which it transitively owns. When a thread locks an object within this exemplary embodiment all other threads are denied access to the locked object and to any descendants of the locked object.

Abstract: A real-time operating system (RTOS) for use with minimal-memory controllers has a kernel for managing task execution, including context switching, a plurality of defined tasks, individual ones of the tasks having subroutines callable in nested levels for accomplishing tasks. In the RTOS context switching is constrained to occur only at task level, and cannot occur at any lower sub-routine level. This system can operate with a single call . . . return stack, saving memory requirement. The single stack can be implemented as either a general-purpose stack or as a hardware call . . . return stack. In other embodiments novel methods are taught for generating return addresses, and for using timing functions in a RTOS.

Abstract: One embodiment of the present invention provides a system that facilitates bulk lock-unbiasing for objects within an object-based computing system. The system maintains an epoch, which is a field containing a timestamp, for a biasable object class and each instance of the biasable object class. If the epoch for the biasable object class matches the epoch for a specific instance of the biasable object class, the system knows that any bias for that specific instance is currently valid. When the system receives a signal to perform a bulk lock-unbiasing operation for instances of the biasable object class, it responds by stopping all threads in the object-based computing system at a safe point. Then, the system performs a bulk lock-unbiasing operation for unlocked instances of the biasable object class by incrementing the epoch for the biasable object class and by incrementing corresponding epochs for locked instances of the biasable object class.

Abstract: According to some embodiments, a multithreaded microcontroller includes a thread control unit comprising thread control hardware (logic) configured to perform a number of multithreading system calls essentially in real time, e.g. in one or a few clock cycles. System calls can include mutex lock, wait condition, and signal instructions. The thread controller includes a number of thread state, mutex, and condition variable registers used for executing the multithreading system calls. Threads can transition between several states including free, run, ready and wait. The wait state includes interrupt, condition, mutex, I-cache, and memory substates. A thread state transition controller controls thread states, while a thread instructions execution unit executes multithreading system calls and manages thread priorities to avoid priority inversion. A thread scheduler schedules threads according to their priorities.

Abstract: A method and system for regulating tasks of background processes so as to reduce interference with foreground processes. The progress rate of a background task (e.g., amount of work performed per unit time) is measured and evaluated against a target amount. If the progress rate appears degraded, the background task is suspended for a computed time interval so as to back off from its interference with a foreground process. Each time the progress rate appears degraded, the time interval is exponentially increased from its previous value up to a maximum, however if the performance appears normal, the time interval is reset to a minimum. Evaluation of the work is statistically based so as to eliminate variations in measurements, and automatic calibration of the target amount is provided, as is a mechanism for prioritizing multiple background tasks.

Abstract: A method for providing access arbitration for an integrated circuit in a wireless device is provided. The method includes receiving a command from a processing element coupled to the integrated circuit. A preempt signal associated with the command is generated. The preempt signal is operable to identify a priority for the command as one of high and low. The preempt signal is provided to an access arbiter for use in providing access arbitration for the command.

Abstract: A plurality of sub-processors and a management processor process the first task. A graphic processor unit executes image processing corresponding to the first task processed by the management processor. One of the sub-processors performs a second task different from the first task. An image process related to the first task and originated in the sub-processor is accepted by the graphic processor unit and associated first rendering data is transferred to the graphic processor unit. Meanwhile, when the need arises in the one of the sub-processors for a second image process related to the second task, the one of the sub-processor saves second rendering data for the second image process in a main memory. Subsequently, when the graphic processor unit starts the second image process corresponding to the second task, the second rendering data is transferred from the main memory to a graphic memory.

Abstract: A simulator simulates interaction between a surgical tool and biological tissue, providing real time visual and/or haptic feedback. The simulator receives tool input device information representative of a user's movement of a physical tool. The simulator simulates, based on the tool input device information, an interaction between the simulated tool and simulated biological tissue. The simulator uses multiple computational threads, some of which provide their calculations to interrelated threads for use. The simulator displays a visual representation of the simulated interaction between the simulated tool and the simulated biological tissue and provides haptic feedback to the user. The threads may operate asynchronously and have different spatial and/or temporal resolutions. Threads may be selectively activated and deactivated. Threads may move their spatial coverage.

Abstract: The present invention comprises: a unit time calculating unit for calculating, as a unit time, the greatest common denominator of the individual operating cycles of a plurality of programs; an allocating unit for allocating the individual operating cycles of the plurality of programs into each of a plurality of continuous base periods that each have their respective unit times, in sequence beginning with the shortest operating cycle, and for allocating the operating cycles of remaining programs for which the operations have not been completed during one of the plurality of base periods into remaining base periods, in sequence beginning with the shortest operating cycles; and an operating unit for running the plurality of programs that are allocated to operating times.

Abstract: Administration of locks for critical sections of computer programs in a computer that supports a multiplicity of logical partitions that include determining by a thread executing on a virtual processor executing in a time slice on a physical processor whether an expected lock time for a critical section of the thread exceeds a remaining entitlement of the virtual processor in the time slice and deferring acquisition of a lock if the expected lock time exceeds the remaining entitlement.

Abstract: A general purposed operating system is modified to support hard real-time processing of hard real-time tasks. At least one processing unit in the operating system is designated as a hard real-time processing unit to process hard real-time tasks, and at least one processing unit in the operating system is designated as a non-hard real-time processing unit to process non-hard real-time tasks and designated non-deterministic processing steps. Hard real-time tasks assigned to the non-hard real-time processing unit may be transferred to the hard real-time processing unit, and tasks assigned to the hard real-time processing unit that are about to execute a non-deterministic processing step may be transferred to the non-hard real-time processing unit.

Abstract: To perform economics management, data relating to reservoir-related services is received from a plurality of data sources. The received data is mapped into a cube-based data structure. In response to a query, data is retrieved from the cube-based data structure.

Abstract: Visibility profiles associated with a substantially real time messaging environment are disclosed. Additionally, techniques for managing visibility profiles are disclosed, which include automatically associating a first profile with a first situation, automatically associating a second profile with a second situation, and where the first and second profiles are associated with visibility. Visibility profiles may be used to manage the appearance of a user to other users/friends for communication using applications such as instant messaging, electronic mail, web-based mail programs, or other types of data communication exchange applications.

Abstract: Preemption techniques are disclosed which permit multiple high-priority packets to preempt a single low-priority packet. In one aspect, a first device is configured for communication with a second device via an interface bus. The first device comprises interface circuitry configured to receive from the second device a start indicator of a first type and a start indicator of a second type, and to allow at least one data segment associated with the start indicator of the second type to preempt at least one data segment associated with the start indicator of the first type. The start indicator of the second type may have a longer pulse width than that of the start indicator of the first type, such as a double-length pulse width. The first and second devices may comprise physical layer and link layer devices of a communication system.

Abstract: A method of assigning task management blocks for first type tasks to time slot information on a one-by-one basis, assigning a plurality of task management blocks for second type tasks to time slot information, selecting a task management block according to a priority classification when switching to the time slot of the time slot information, and switching to the time slot except the time slot information. Additionally, a task switching apparatus selects the task management block assigned to the time slot and executes the task.

Abstract: Transactional Lock Elision (TLE) may allow threads in a multi-threaded system to concurrently execute critical sections as speculative transactions. Such speculative transactions may abort due to contention among threads. Systems and methods for managing contention among threads may increase overall performance by considering both local and global execution data in reducing, resolving, and/or mitigating such contention. Global data may include aggregated and/or derived data representing thread-local data of remote thread(s), including transactional abort history, abort causal history, resource consumption history, performance history, synchronization history, and/or transactional delay history. Local and/or global data may be used in determining the mode by which critical sections are executed, including TLE and mutual exclusion, and/or to inform concurrency throttling mechanisms. Local and/or global data may also be used in determining concurrency throttling parameters (e.g.

Abstract: The subject matter disclosed herein provides methods and apparatus, including computer program products for rules-based processing. In one aspect there is provided a method. The method may include, for example, evaluating rules to determine whether to enable or disable one or more actions in a ready set of actions. Moreover, the method may include scheduling the ready set of actions, each of which is scheduled for execution and executed, the execution of each of the ready set of actions using a separate, concurrent thread, the concurrency of the actions controlled using a control mechanism. Related systems, apparatus, methods, and/or articles are also described.

Abstract: A method and a controller are provided for controlling the execution of a computer program having multitasking capability on a computing element of a controller for controlling and/or regulating a system. The system may take up various possible system states.

Abstract: A scheduler schedules a plurality of periodic events. Each periodic event has an associated periodic interval of time and an associated set of services. The scheduler determines when one of the plurality of periodic events occurs and distributes the execution of the services associated with that periodic event during a next periodic interval of time associated with that periodic event following the occurrence of that periodic event. The services can be enabled and disabled. This allows the services to be executed, for example, in one-shot, burst, and continuous modes.

Abstract: A computer application program executing on a computer, such as a portable computer, is selected for termination by first identifying computer application programs executing on the computer. A priority value is assigned to each of the identified computer applications. The priority value is based on multiple characteristics of the identified computer application programs. The computer application program with the smallest priority value is automatically terminated. If the computer application program with the smallest priority value is in a modal state in which it waits for a response from a user, then a default response is provided to the application prior to terminating the computer application program. The characteristics associated with the computer application programs may include average launch times, average memory usages, a class or type of application, frequencies of usage, and an amount of data stored on the computer by the computer application program.

Abstract: A method of providing media content (e.g., audio and/or video) and processing data received over a network. Received data may be processed at a reduced rate while at least one media application is running. Received packets may be processed in batches, and media data may be processed in between processing the batches. The method may provide for reducing or eliminating glitches in the media content caused by receiving data over a network while providing the media content.

Abstract: A method of managing processor usage time includes: associating each application with a slice of the processor time and with a first or second class; and managing the processor time as a function of the processor time slices and classes. The processor time slice associated with an application of the first class is reserved for the application even if the application does not use it fully. An application of the second class has priority for using the processor during its associated time slice, wherein if part of the associated time slice is not used by the application, the unused part may be used by another application of the second class, the application being able to use more than its associated time slice by using an unused part of a time slice associated with another application of the second class or a part of a time slice associated with no application.

Abstract: A method and system for regulating tasks of background processes so as to reduce interference with foreground processes. The progress rate of a background task (e.g., amount of work performed per unit time) is measured and evaluated against a target amount. If the progress rate appears degraded, the background task is suspended for a computed time interval so as to back off from its interference with a foreground process. Each time the progress rate appears degraded, the time interval is exponentially increased from its previous value up to a maximum, however if the performance appears normal, the time interval is reset to a minimum. Evaluation of the work is statistically based so as to eliminate variations in measurements, and automatic calibration of the target amount is provided, as is a mechanism for prioritizing multiple background tasks.

Abstract: A method for scheduling tasks in a computer operating system comprises a background task creating at least one registered service. The background task provides an execution presence and a data present to a registered service and ranks the registered services according to the requirements of each registered service. The background task also allocates an execution presence and a data presence according to each of the registered services such that each of the registered services is given an opportunity to be scheduled in the dedicated pre-assigned time slice.

Abstract: A memory management apparatus and a memory management method may divide an external memory area assigned to a task into a first area and a second area, and load data stored in the first area into an internal memory of a processor while the task is performed by the processor.

Abstract: A system and method is disclosed for synchronizing certain periodic activities and/or processes in a computer system or device. The synchronization allows more efficient use of the computer system's or device's processing capabilities, and may result in conservation of electrical power. In one example embodiment, a periodic scheduler is implemented to periodically verify the continued existence of critical processes operating in the computer system or device. Corrective, or other appropriate, action may be taken in the event of a failure of a critical process. A schedule list, which may be a linked list, may be used to track the periodic processes that are to occur. Upon registration of a critical process, the schedule list may be modified to synchronize the new periodic process with the existing schedule list.

Abstract: A computer system of a multi-operation-system (multi-OS) has a main memory having a memory area for a first OS and a memory area for a second OS, both the areas being independent from each other, and a plurality of I/O devices divisionally allocated to the first OS and the second OS. The first OS is loaded in the first OS memory area, and thereafter when the first OS is operated, the second OS is loaded in the second OS memory area and initialized. When the first OS is operated, the first OS hardware resources and the second OS hardware resources are registered by the first OS. Thereafter when the first OS is operated, the first OS inhibits the registration of an interrupt number already allocated to the second OS I/O device. In response to an interrupt request from a second OS I/O device, the second OS starts operating.

Abstract: In a cellular phone applicable to an information processing apparatus according to the present invention, a CPU of a main control unit executes monitor threads 1 to 3, monitors groups including a plurality of threads set with priority by executing a keep-alive operation to a plurality of monitor threads that monitor operations of threads in the groups, determines whether there is a monitor thread without a response to the keep-alive operation based on responses from the plurality of monitor threads, and terminates delivery of events to the groups with priority higher than the group monitored by the monitor thread without a response to the keep-alive operation if it is determined that there is a monitor thread without a response to the keep-alive operation