Abstract: Improving the performance of multitasking processors are provided. For example, a subset of M processors within a Symmetric Multi-Processing System (SMP) with N processors is dedicated for a specific task. The M (M>0) of the N processors are dedicate to a task, thus, leaving (N?M) processors for running normal operating system (OS). The processors dedicated to the task may have their interrupt mechanism disabled to avoid interrupt handler switching overhead. Therefore, these processors run in an independent context and can communicate with the normal OS and cooperation with the normal OS to achieve higher network performance.

Abstract: This invention provides a method for multi-tasking on a media player in a time-slice-circular manner. The method comprises the step of: dividing each of different functions of the media player to a plurality of tasks by a controller unit; setting a priority to each of the tasks by the controller unit; checking the priority of said each of the tasks, and changing a state of a task from “READY” to “EXECUTING” according to the priority of the task by the controller unit; and executing the tasks alternately by using time slices associated therewith by the controller unit. Since all the tasks are executed within a short time, from the user's point of view, all the tasks are executed simultaneously. Thus, multi-tasking on the media player is achieved.

Abstract: A graphics processing unit (“GPU”) is configured to interrupt processing of a first context and to initiate processing of a second context upon command. A command processor communicates an interrupt signal on a communication path from to a plurality of pipeline processing blocks in a graphics pipeline. A token, which corresponds to an end of an interrupted context, is forwarded from the command processor to a first pipeline processing block and subsequently to other pipeline blocks in the graphics pipeline. Each pipeline processing block discards contents of associated memory units upon receipt of the interrupt signal until the token is reached. The token may be forwarded to one or more additional pipeline processing blocks and memory units so that the token is communicated throughout the graphics pipeline to flush data associated with the first context. Data associated with the second context may follow behind the token through graphics pipeline.

Abstract: A graphics processing unit (“GPU”) is configured to interrupt processing of a first context and to initiate processing of a second context upon command so that multiple programs can be executed by the GPU. The CPU creates and the GPU stores a run list containing a plurality of contexts for execution, where each context has a ring buffer of commands and pointers for processing. The GPU initiates processing of a first context in the run list and retrieves memory access commands and pointers referencing data associated with the first context. The GPU's pipeline processes data associated with first context until empty or interrupted. If emptied, the GPU switches to a next context in the run list for processing data associated with that next context. When the last context in the run list is completed, the GPU may switch to another run list containing a new list of contexts for processing.

Abstract: A computer-based system for updating interdependent tasks in a multi-task environment is provided. The system includes one or more processors for processing processor-executable code and an input/output interface communicatively linked to at least one processor. The system further includes a brokering module configured to execute on the at least one processor. The brokering module can be configured to interconnect a plurality of event-responsive interdependent tasks in response to an event generated while one of the tasks is being processed. Different tasks can be provided by different applications. The brokering module is configured to initiate an asynchronous updating of the tasks, wherein the asynchronous updating comprises a background process of the multi-task environment preformed for each task not being currently processed and wherein the updating is performed while the one task is being processed.

Abstract: A multitask execution system executes a plurality of tasks in parallel. The multitask execution system includes an encryption processor configured to generate a key stream unique to each task, by using key data, a task ID for identifying each task, and an output value, the number of the key data being smaller than the number of the plurality of tasks, the output value being output from a monotonic incremental counter when each task is generated, a value of the monotonic incremental counter configured to continue to be increased without being decreased, and to encrypt data stored in a protected area in a memory space for each task by using the generated key stream.

Abstract: A renderfarm monitoring system collects and aggregates comprehensive renderfarm information from a distributed scheduling system. Listener modules interface with dispatcher modules. The dispatcher modules queue jobs and tasks and request processing for those tasks in which the required input data is available. The listener modules receive streams of events from dispatcher modules indicating the status of all associated jobs and tasks. The listener modules also receive system status information from renderfarm and user computers. Renderfarm usage information, such as jobs, tasks, and system status, is aggregated by a database system. Client applications can access renderfarm usage information from the database system and use this information to monitor, analyze, visualize, and control renderfarm activities. Additionally, renderfarm usage information associated with tasks can be used to prioritize the jobs, improving overall renderfarm efficiency.

Abstract: A database system with methodology for parallel schedule generation in a query optimizer is described. In one embodiment, for example, in a database system, a method is described for parallel optimization of a query, the method comprises steps of: generating a plurality of parallel plans for obtaining data requested by the query, the parallel plans including parallel operators for executing portions of the query in parallel; adjusting parallel operators of each parallel plan if necessary based on resources available for executing the query; creating a schedule for each parallel plan indicating a sequence for execution of operators of each parallel plan; determining execution cost of each parallel plan based on its schedule; and selecting a particular parallel plan having lowest execution cost for obtaining data requested by the query.

Abstract: A method and apparatus for implementing out-of-order memory transactions in a multithreaded, multicore processor. In the present invention, circular queue comprising a plurality of queue buffers is used to store load data returned by a memory unit in response to a request issued by a processing module, such as a stream processing unit, in a processing core. As requests are issued, a destination queue buffer ID tag is transmitted as part of the request. When the request is returned, that destination number is reflected back and is used to control which queue within the circular queue will be used to store the retuned load data. Separate pointers are used to indicate the order of the queues to be read and the order of the queues to be written. The method and apparatus implemented by the present invention allows out-of-order data to be processed efficiently, thereby improving the performance of a fine grain multithreaded, multi-core processor.

Abstract: A platform supporting reconfigurable computing, enabling the introduction of reconfigurable hardware into portable devices is described. Dynamic hardware/software multitasking methods for a reconfigurable computing platform including reconfigurable hardware devices such as gate arrays, especially FPGA's, and software, such as dedicated hardware/software operating systems and middleware, adapted for supporting the methods, especially multitasking, are described. A computing platform, which is a heterogeneous multi-processor platform, containing one or more instruction set processors (ISP) and a reconfigurable matrix (for instance a gate array, especially an FPGA), adapted for (dynamic) hardware/software multitasking is described.

Abstract: A parallel task scheduling system in a multi-threaded computing environment includes a plurality of parallel task queues. Each task queue is associated with a respective worker thread from a plurality of worker threads. Each new task is assigned to one of the task queues. That assignment process including selecting a random queue and, from that starting point, locating an empty queue (if one exists). The task is then placed on that empty queue for processing. Typically, the worker thread associated with the identified task queue will process the queued task. If the worker thread is busy processing another task, the queued task may be stolen by a free thread. A waiting task, can thus be processed in an efficient manner.

Abstract: The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparation are preferably instrumented (701) into the current job and executed (702), whenever possible, in parallel with the instructions of the current job. The integrated job start preparation may include table look-ups, register file updating, instruction fetching and preparation. If the scheduled job order is allowed to change during execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution of the next job and take appropriate actions (704; 705, 706) depending on the outcome of the test.

Abstract: A system and method for allowing jobs originating from different partitions to simultaneously utilize different hardware threads on a processor by concatenating partition identifiers with virtual page identifiers within a processor's translation lookaside buffer is presented. The device includes a translation lookaside buffer that translates concatenated virtual addresses to system-wide real addresses. The device generates concatenated virtual addresses using a partition identifier, which corresponds to a job's originating partition, and a virtual page identifier, which corresponds to the executing instruction, such as an instruction address or data address. In turn, each concatenated virtual address is different, which translates in the translation lookaside buffer to a unique system-wide real address. As such, jobs originating from different partitions are able to simultaneously execute on the device and, therefore, fully utilize each of the device's hardware threads.

Abstract: The image sensing/playback apparatus has an image sensing device that senses an image of an object and obtains electrical image data, an input/output I/F that inputs/outputs image data from/to an external storage medium, and a system controller that sequentially performs a plurality of tasks, exclusively controlling the input/output I/F and having respective priorities decided in advance, while giving an opportunity to switch between the plurality of tasks after processing of one unit data amount of data. The one unit data amount is one of the first unit data amount that is large and the second unit data amount that is smaller than the first unit data amount.

Abstract: Methods, systems, and computer program products for preventing concurrent execution of conflicting software operations on the same and different storage processors while avoiding the deadlocks are disclosed. According to one method, first and second instances of a first software utility for respectively executing on the first and second storage processors having access to a storage medium are provided. First and second instances of the second software utility for respectively executing on the first and second storage processors are also provided. A lock is provided to instances of the first utility. The lock makes exclusive the operations of checking for an activity query from instances of the second utility and receiving a query from instances of the second utility. A first operation implemented by the first utility may fail if the activity query has been received when the checking occurs.

Abstract: A method and apparatus for speculatively executing a single threaded program within a multi-core processor which includes identifying an idle core within the multi-core processor, performing a look ahead operation on the single thread instructions to identify speculative instructions within the single thread instructions, and allocating the idle core to execute the speculative instructions.

Abstract: A method includes receiving at least one process control value from a deterministic process control environment according to an execution cycle of the deterministic process control environment. The method also includes providing the at least one process control value to a non-deterministic process according to an execution cycle of the non-deterministic process. The execution cycle of the non-deterministic process does not correspond to the execution cycle of the deterministic process control environment.

Abstract: Programmable architecture for implementing a message processing system using an integrated circuit is described. In an example, configurable logic of an integrated circuit is configured to have a plurality of thread circuits and a memory. Messages are received to the integrated circuit for storage in the memory. The memory is accessed with the plurality of threads to concurrently process a plurality of the messages.

Abstract: Printing systems and methods are described in which the priorities of print jobs are programmable. A scheduler component oversees print job management and scheduling, and works in concert with components called prioritizers, to provide for ease of programming and customization. In at least some embodiments, an interface to the system is provided to allow prioritizers to be programmed and inserted to customize the behavior of the scheduler according to different print job properties. In at least some embodiments, the system utilizes a model for the relative prioritization of print queues in the system to enforce a fair to balancing of system resources between print queues. In at least some embodiments, the system can independently schedule the rendering and printing operations when printing a job and can use a heuristic known as “starvation risk” to help ensure that throttling rendering in the system does not result in device starvation.

Abstract: A data processing device includes an instruction executing part executing a normal task and a management task scheduling an execution order of the normal task with switching the normal task and the management task, a counter measuring an execution state of the normal task being executed in the instruction executing part, and a state controller controlling the counter based on the normal task being executed in the instruction executing part. The instruction executing part determines whether the normal task to be executed next of a plurality of normal tasks scheduled by the management task is a measurement object or not, and outputs an operation signal notifying the state controller of the determination result. The state controller operates the counter in accordance with the branch operation.

Abstract: A graphics processing unit (“GPU”) is configured to receive an interrupt command from a CPU or internal interrupt event while the GPU is processing a first context. The GPU saves the first context to memory and records a precise processing position for the first context corresponding to the point interrupted. Thereafter, the GPU loads a second context to the processing portion of the GPU from memory and begins executing instructions associated with the second context. After the second context is complete of if an interrupt command directs restoration of the first context, the GPU's processor switches to the first context for continued processing. The first context is retrieved from memory and restored to the precise processing position where previously interrupted. The GPU then processes a remainder portion of the first context from the precise processing point to an end of the first context.

Abstract: Computer apparatus for use with a database management system and database, the apparatus comprising a CPU and a memory, the apparatus configured to provide at least two task processes each process being apportioned a section of the memory when is use, wherein in response to the database management system or apparatus being instructed to carry out a first task, such as reading, and a second task, such as decryption, on a section of data in series, a first task process is configured to begin the first task on a first part of the section of data in the database and (after a the first process on the first part of the section of the data is complete); a second task process is instructed to carry out the first task on a second part of the section of data which begins where the first part ends, and when the first task is complete and the first task process switched to carry out the second task on data on which the first task has already been carried out, or the second process is instructed to carry out the second ta

Abstract: An exemplary embodiment provides methods, systems and mediums for executing arithmetic expressions that represent elementwise operations. An exemplary embodiment provides a computing environment in which elementwise expressions may be executed in parallel by multiple execution units. In an exemplary embodiment, multiple execution units may reside on a network.

Abstract: A system and method are presented for converting a multi-boot computer to a virtual machine. Existing boot images on a multi-boot computer are identified and converted into virtual machine instances. Each virtual machine instance represents an operating system and is capable of running at the same time. Finally, a new hosting operating system is installed. The new hosting operating system launches and manages the converted virtual machine instances.

Abstract: An apparatus and method capable of performing multiple tasks in a portable terminal are provided, in which menu functions of the portable terminal can be implemented while continuing to play the music. The multi-tasking apparatus includes a controller for performing controlling to implement at least one menu function while playing a music file and a display unit for displaying an indication that the music file is being played during the implementation of the menu function.

Abstract: Methods and circuitry for processing a shadow scan instruction in a multi-threaded microprocessing environment include a bit sequence having a thread identifier, core identifiers and a shadow scan instruction. The core identifiers are assigned a state to identify microprocessor cores of a multi-core structure and are processed combinationally to determine if the shadow scan instruction is to be processed through a thread of the identified core. The processing of the shadow scan instruction through the thread of each of the identified cores is accomplished by a single load operation of the shadow scan instruction into the JTAG TAP controller.

Abstract: The present invention relates to a method for measuring a quantity of usage of a CPU, in particular to a method for measuring a quantity of usage of a CPU which is capable of getting a credible quantity of usage of a CPU without amending an algorithm in order to adapt it to the an operating system, e.g., MS-Windows System, or requiring a complicated code. The method uses various algorithms provided by the operating system on the behalf of a registry storing a quantity of usage of a CPU inside a system. Accordingly the present invention can measure a quantity of usage of a CPU easily without lowering a performance of the operating system.

Abstract: Information processing apparatus, including occurrence number counter counting events that occurred in each of a plurality of CPUs. Apparatus performs functions of; storing accumulated occurrence number of events, which occurred while the thread is being executed by each of the CPUs, in a thread storage area of the thread associating accumulated occurrence number with CPU; storing, in the thread storage area, a value of occurrence number counter of the CPU, the value having been counted before the thread is resumed by the CPU; and adding, to accumulated occurrence number which has been stored in accumulated number storing unit while corresponding to the CPU, a difference value obtained by subtracting a counter value, which has been stored in the start-time number storing unit of the thread, from a counter value of the occurrence number counter of the CPU, in a case where the CPU terminates an execution of the thread.

Abstract: Provided are a method, system, and article of manufacture for recovery of application faults in a mirrored application environment. Application events are recorded at a primary system executing an instruction for an application. The recorded events are transferred to a buffer. The recorded events are transferred from the buffer to a secondary system, wherein the secondary system implements processes indicated in the recorded events to execute the instructions indicated in the events. An error is detected at the primary system. A determination is made of a primary order in which the events are executed by processes in the primary system. A determination is made of a modified order of the execution of the events comprising a different order of executing the events than the primary order in response to detecting the error. The secondary system processes execute the instructions indicated in the recorded events according to the modified order.

Abstract: According to an embodiment of the invention, a computer readable storage medium that stores a software program causing a computer system to perform a scheduling process for executing a plurality of application programs in every processor cycles, the scheduling process includes: allocating, during a current processor cycle, processor times of a next processor cycle to each of the application programs to be executed in the next processor cycle; storing the allocated processor times of the next processor cycle; determining whether or not the application programs executed in the current processor cycle include an uncompletable application program; calculating processor idle time of the next processor cycle; and allocating an additional processor time of the next processor cycle to the uncompletable application program, the additional processor time being set not to exceed the calculated processor idle time of the next processor cycle.

Abstract: A method and system providing switching between a plurality of installed programs in a computer system. Embodiments include a jump function comprising the steps: (1) determining a jump program that is to be the next program to be run, possibly from a plurality of possible choices: (2) creating input data for the jump program based on data in the current program; (3) storing the program state of the currently running program into a context packet and saving the context packet to memory; (4) releasing temporary memory that is used by the program, so as to allow other programs to use the memory; (5) calling the jump program with the created input data as input and terminating the currently running program.

Abstract: A method for designing a time-sliced and multi-threaded architecture comprises the steps of conducting a thorough analysis of a range of applications and building a specific processor to accommodate the range of applications. In one embodiment, the thorough analysis includes extracting real time aspects from each application, determining optimal granularity in the architecture based on the real time aspects of each application, and adjusting the optimal granularity based on acceptable context switching overhead.

Abstract: The performance of an executing computer program is dynamically enhanced by creating one or more additional threads of execution and then intercepting function calls generated by the executing computer program and executing such function calls within one of the one or more additional threads. Each thread may be associated with a different processing resource, thereby allowing for concurrent execution of the multiple threads. This technique may be used, for example, to improve the performance of a single-threaded computer program, such as a single-threaded video game program, by allowing multi-threaded techniques to be used to execute the computer program even though the computer program was not designed to use such techniques.

Abstract: In one embodiment, a system for managing semantic locks and semantic lock requests for a resource is provided. Access to the resource is controlled such that compatible lock requests can access the resource and incompatible lock requests are queued.

Abstract: A background memory manager (BMM) for managing a memory in a data processing system has circuitry for transferring data to and from an outside device and to and from a memory, a memory state map associated with the memory, and a communication link to a processor. The BMM manages the memory, determining if each data structure fits into the memory, deciding exactly where to place the data structure in memory, performing all data transfers between the outside device and the memory, and maintaining the memory state map according to memory transactions made, and informing the processor of new data and its location. In preferred embodiments the BMM, in the process of storing data structures into the memory, provides an identifier for each structure to the processor. The system is particularly applicable to Internet packet processing in packet routers.

Abstract: A computer application program executing on a computer, such as a portable computer, is selected for termination by first identifying computer application programs executing on the computer. A priority value is assigned to each of the identified computer applications. The priority value is based on multiple characteristics of the identified computer application programs. The computer application program with the smallest priority value is automatically terminated. If the computer application program with the smallest priority value is in a modal state in which it waits for a response from a user, then a default response is provided to the application prior to terminating the computer application program. The characteristics associated with the computer application programs may include average launch times, average memory usages, a class or type of application, frequencies of usage, and an amount of data stored on the computer by the computer application program.

Abstract: A telecommunications system having a software dispatcher is provided for delivering messages between dispatcher clients, i.e., software subsystems that may be in the same process, a different process, or on a different machine. The dispatcher manages a pool of threads to balance the workload. The dispatcher can process both synchronous and asynchronous messages by dispatching the message to all registered subsystems in order of their registered priority.

Abstract: A request is received with a first operation identifier to lock a first resource. The first resource is locked with the first operation identifier. It is determined whether a second resource should be locked with the first operation identifier or with a second operation identifier based on whether an operation to be performed for the request may complete after the request is processed. Additional embodiments are described and claimed.

Abstract: The invention relates to a method and system for accessing the status of a process executing either locally or remotely. The invention also involves a process management system that invokes an executable process, monitors it, and exchanges status information relative to the process with one or more connected machines. A local or remote application or machine invokes the process by communicating with the process management system over an established connection. The process management system invokes the requested action on the user's behalf by activating a script engine containing a sequence of executable commands and/or routines that initiate and enable the process. Status information related to the invoked action is consistently stored in a publicly accessible data structure as the process is in execution. Any machines that are connected with the process management system over the established connection can retrieve the data structure containing the process information.

Abstract: A method is disclosed to assign Priority to Processes based on Roles. The method calculates the process priority of the process using a scheduler running in the computer system, based on either a first weight of a first role, a second weight of a second role, or a calculated weight if both the first and second roles can unlock access to the process. The method then assigns a share of the computer system's time to the process, the share of time being based on the process priority calculated for the process.

Abstract: The present invention provides a method of implementing a fault-tolerant mutual exclusion lock. The present invention records in a lock structure the IDs of all processes whose failure can lead to the permanent unavailability of the lock. When a process finds the lock unavailable and suspects a permanent failure, it queries the programming environment about the status of all or some of the processes that could have caused the lock's unavailability. If the programming environment determines that these processes have failed, the live process tries to usurp the lock. If it succeeds, it executes some recovery mechanism and frees the lock or proceeds to operate on the objects protected by the lock. The method guarantees recovery from process failures.

Abstract: An apparatus, program product and method initiate, in connection with a context switch operation, a prefetch of data likely to be used by a thread prior to resuming execution of that thread. As a result, once it is known that a context switch will be performed to a particular thread, data may be prefetched on behalf of that thread so that when execution of the thread is resumed, more of the working state for the thread is likely to be cached, or at least in the process of being retrieved into cache memory, thus reducing cache-related performance penalties associated with context switching.

Abstract: A computer implemented method, apparatus, and computer usable program code for sampling call stack information. An event is monitored during execution of a plurality of threads executed by a plurality of processors. In response to an occurrence of the event, a thread is identified in the plurality of threads to form an identified thread. A plurality of sampling threads is woken, wherein a sampling thread within the plurality of sampling threads is associated with each processor in the plurality of processors and wherein one sampling thread in the plurality of sampling threads obtains call stack information for the identified thread.

Abstract: An apparatus having a memory and an operating system running a plurality of applications that are controlled by user signals, means to register the user signals required by each application, means to receive user signals, and means to send each received user signal to the application registered to require that signal. A method of passing user signals to a plurality of applications running with an operating system comprising receiving from each application information on user signals required by that application; saving in a memory the required user signals associated with each application; receiving a user signal from a user interface device; retrieving from the memory applications that require the received user signal; and sending the received user signal to each of the retrieved applications.

Abstract: A system, computer-readable medium and method for performing intelligent data pre-staging for a job submitted to a cluster environment. The method aspect comprises determining availability of compute resources including availability timeframes to process the submitted job, determining data requirements for processing the job and determining a co-allocation in time reservation.

Abstract: Certain embodiments of the present invention provide systems and method for time-sharing parallel applications with performance isolation and control through feedback-controlled real-time scheduling. Certain embodiments provide a computing system for time-sharing parallel applications. The system includes a controller adapted to determine a scheduling constraint for each thread of execution for an application based at least in part on a target execution rate for the application. The system also includes a local scheduler executing on a node in the computing system. The local scheduler schedules execution of a thread of execution for the application based on the scheduling constraint received from the controller. The local scheduler provides feedback regarding a current execution rate for the application thread to the controller, and the controller modifies the scheduling constraint for the local scheduler based on the feedback.

Abstract: An order-relation analyzing apparatus collects assigned destination processor information, a synchronization process order and synchronization information, determines a corresponding element associated with a program among a plurality of elements indicating an ordinal value of the program based on the assigned destination processor information, when an execution of the program is started, and calculates the ordinal value indicated by the corresponding element for each segment based on the synchronization information, when the synchronization process occurs while executing the program. When a first corresponding element associated with a second program, of which the execution starts after the execution of a first program associated with the first corresponding element finishes, is determined, the ordinal value of the second program is calculated by calculating the ordinal value indicated by the first corresponding element.

Abstract: The invention provides a processor comprising an execution unit arranged to execute multiple program threads, each thread comprising a sequence of instructions, and a plurality of synchronisers for synchronising threads. Each synchroniser is operable, in response to execution by the execution unit of one or more synchroniser association instructions, to associate with a group of at least two threads. Each synchroniser is also operable, when thus associated, to synchronise the threads of the group by pausing execution of a thread in the group pending a synchronisation point in another thread of that group.

Abstract: Methods and systems are presented for updating software applications in a processor cluster, in which the cluster is divided into first and second processor groups and the first group is isolated from clients and from the second group with respect to network and cluster communications by application of IP filters. The first group of processors is updated or retrofitted with the new software and brought to a ready-to-run state while the second group is active to serve clients. The first group is then transitioned to an in-service state after isolating the then-active service providing application on second group. Thereafter, the second group of processors is offlined, updated or retrofitted, and transitioned to an in-service state to complete the installation of the new application version across the cluster with reduced or zero downtime and without requiring backward software compatibility.

Abstract: In a time management control method of a computer system for managing each individual time of a plurality of virtual systems, a service process or retains an overall system time and a difference time between the overall system time and a virtual system time for each virtual system, and a firmware in the virtual system acquires the overall system time and the difference time, calculates a difference time between the overall system time and the change time of the virtual system, adds the both difference times, and informs the service processor. Accordingly, the virtual system time can be changed without time management hardware in each virtual system. Further, since service processor performs update processing only, it is also possible to prevent a time set error caused by delayed calculation processing etc.