Multitasking, Time Sharing Patents (Class 718/107)
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Publication number: 20140237328Abstract: A dual redundant process controller is provided. The controller comprises a process control application that executes on a first and a second module. When executed by the first module, a first application instance writes a first synchronization information to the second module, reads a second synchronization information from the first module, and, when the second disagrees with the first synchronization information after passage of a time-out interval, performs a resynchronization function; and wherein, when executed by the second module, the second application instance writes the second synchronization information to the first module, reads the first synchronization information from the second module, and, when the first disagrees with the second synchronization information after passage of the time-out interval, performs the resynchronization function.Type: ApplicationFiled: April 28, 2014Publication date: August 21, 2014Applicant: INVENSYS SYSTEMS, INC.Inventors: Alan A. Gale, Andrew L. Kling, Mark E. Timperley, Lawrence T. Bass, John J. Lavallee, George W. Cranshaw, Alan M. Foskett
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Patent number: 8813080Abstract: In some embodiments, the invention involves a system and method to enhance an operating system's ability to schedule ready threads, specifically to select a logical processor on which to run the ready thread, based on platform policy. Platform policy may be performance-centric, power-centric, or a balance of the two. Embodiments of the present invention use temporal characteristics of the system utilization, or workload, and/or temporal characteristics of the ready thread in choosing a logical processor. Other embodiments are described and claimed.Type: GrantFiled: June 28, 2007Date of Patent: August 19, 2014Assignee: Intel CorporationInventors: Russell J. Fenger, Leena K. Puthiyedath
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Publication number: 20140229646Abstract: An information processing system includes a memory that stores a first program and a second program, a first processor coupled to the memory and configured to execute the first program, and a second processor coupled to the memory and configured to delay execution of the second program until the first processor starts executing the first program.Type: ApplicationFiled: April 17, 2014Publication date: August 14, 2014Applicant: FUJITSU LIMITEDInventor: Yoshiyuki OHHIRA
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Patent number: 8799554Abstract: In this disclosure, techniques are described for more efficiently sharing resources across multiple virtual machine instances. For example, techniques are disclosed for allowing additional virtual machine instances to be supported by a single computing system by more efficiently allocating memory to virtual machine instances by providing page swapping in a virtualized environment and/or predictive page swapping. In one embodiment, a virtual memory manager swaps pages predicatively in and/or out of a paging pool based on information from a central processing unit (“CPU”) scheduler. In one embodiment, the CPU scheduler provides scheduling information for virtual machine instances to the virtual memory manager, where the scheduling information allows the virtual memory manager to determine when a virtual machine is scheduled to become active or inactive. The virtual memory manager can then swap-in or swap-out memory pages.Type: GrantFiled: October 27, 2010Date of Patent: August 5, 2014Assignee: Amazon Technologies, Inc.Inventors: Pradeep Vincent, William Lewis
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Patent number: 8793699Abstract: A computer program product, apparatus and method for negating initiative for select entries from a shared, strictly FIFO initiative queue in a multi-tasking multi-processor environment. An exemplary embodiment includes a computer program product for negating initiative for select entries from a shared initiative queue in a multi-tasking multi-processor environment, the computer program product including a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method including identifying an element within the environment that has failed and recovered, not removing the element from the shared initiative queue and entering a boundary element entry into the shared initiative queue.Type: GrantFiled: March 19, 2008Date of Patent: July 29, 2014Assignee: International Business Machines CorporationInventors: Richard K. Errickson, Geoffrey A. Crew, Welela Haileselaissie, Robert M. Whalen, Jr.
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Patent number: 8793696Abstract: An exemplary method for scheduling jobs in frames representing views of a geographic information environment is disclosed. An exemplary method includes determining a remaining frame period in a frame representing a view of a geographic information environment. The exemplary method also includes identifying a dynamic job in a scheduling queue. The dynamic job has a non-preemptive section that is between a start of the job and a preemption point of the job. The exemplary method further includes determining an estimated execution time for executing the job. When the estimated execution time is not greater than the remaining frame period, the exemplary method includes executing the non-preemptive section of the job in the frame. When the estimated execution time is greater than the remaining frame period, the exemplary method includes postponing the execution of the job in the frame.Type: GrantFiled: October 13, 2011Date of Patent: July 29, 2014Assignee: Google, Inc.Inventors: Gregory William Coombe, Jeremy Paul Erickson
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Patent number: 8789057Abstract: Transactional Lock Elision (TLE) may allow multiple threads to concurrently execute critical sections as speculative transactions. Transactions may abort due to various reasons. To avoid starvation, transactions may revert to execution using mutual exclusion when transactional execution fails. Because threads may revert to mutual exclusion in response to the mutual exclusion of other threads, a positive feedback loop may form in times of high congestion, causing a “lemming effect”. To regain the benefits of concurrent transactional execution, the system may allow one or more threads awaiting a given lock to be released from the wait queue and instead attempt transactional execution. A gang release may allow a subset of waiting threads to be released simultaneously. The subset may be chosen dependent on the number of waiting threads, historical abort relationships between threads, analysis of transactions of each thread, sensitivity of each thread to abort, and/or other thread-local or global criteria.Type: GrantFiled: December 3, 2008Date of Patent: July 22, 2014Assignee: Oracle America, Inc.Inventors: David Dice, Mark S. Moir
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Patent number: 8782663Abstract: The present invention relates to a terminal device having an operation system and is capable of using a first application program for use in real time communication and a second application program for another purpose simultaneously on the operation system, the terminal device is characterized by being provided with a means for setting interval between system calls which calculates a frequency of system call executions when the issuance of the system call to the operation system by the second application program is simultaneously executed during the real time communication by the first application program, and when the execution frequency has exceeded a predetermined threshold, sets an execution interval time between the system calls to a given length of time or more.Type: GrantFiled: April 21, 2010Date of Patent: July 15, 2014Assignee: NEC CorporationInventor: Dai Kanetomo
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Patent number: 8776078Abstract: A method dynamically frees computer resources in a multitasking and windowing environment by activating a GUI widget to initiate pausing of an application, pausing CPU processing of the application code, maintaining data of the application in main memory, storing state information for the application code and a process of the application in mass storage, removing the application code from main memory to mass storage, when another application requires additional memory, activating another GUI widget to resume running of the application, restoring the state information for the code and the process to main memory before the application resumes running, and resuming the CPU processing of the application.Type: GrantFiled: May 20, 2008Date of Patent: July 8, 2014Assignee: International Business Machines CorporationInventors: Arnon Amir, Nimrod Megiddo
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Patent number: 8776077Abstract: A method for assigning work to a plurality of threads using a primitive data element to partition a work load into a plurality of partitions. A first partition is assigned to a first thread and a second partition is assigned to a second thread of the plurality of threads. A method for improving the concurrency of a multithreaded program by replacing a queue structure storing a plurality of tasks to be performed by a plurality of threads with a partition function. A computer system including a processor unit configured to run a plurality of threads and a system memory coupled to the processor unit that stores a multithreaded program. The multithreaded program workload is partitioned into a plurality of partitions using a primitive data element and a first partition of the plurality of partitions is assigned to a first thread of the plurality of threads for execution.Type: GrantFiled: April 2, 2008Date of Patent: July 8, 2014Assignee: Oracle America, Inc.Inventor: Paul Neary
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Patent number: 8776067Abstract: In accordance with embodiments, there are provided techniques for utilizing computational resources of a multi-tenant on-demand database system. These techniques for utilizing computational resources of a multi-tenant on-demand database system may enable embodiments to provide great flexibility to a tenant of the architecture to perform desired functions on content of the database without unduly consuming the resources of the system.Type: GrantFiled: December 11, 2009Date of Patent: July 8, 2014Assignee: salesforce.com, inc.Inventor: Scott Yancey
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Patent number: 8768524Abstract: A beverage dispenser receives a fluid container at an installation position and includes a data reader configured to scan product indicia on an installed container. Based on data from that scan data, a controller operates a pump and a valve to mix beverage concentrate from the installed container with a diluent that corresponds to the desired beverage. The controller mixes the concentrate and diluent at a ratio that is based on the scan data. The controller may also select the correct diluent based on the scan data.Type: GrantFiled: May 5, 2011Date of Patent: July 1, 2014Assignee: PEPSICO, Inc.Inventors: Marcus Hammonds, Fernando Ubidia, John F. Lewis
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Patent number: 8769268Abstract: System and methods providing secure workspace sessions is described. In one embodiment a method for providing multiple workspace sessions for securely running applications comprises steps of: initiating a first workspace session on an existing operating system instance running on the computer system, the first workspace session having a first set of privileges for running applications under that session; while the first workspace session remains active, initiating a second workspace session on the existing operating system instance running on the computer system, the second workspace session having a second set of privileges for running applications under the second workplace session; and securing the second workspace session so that applications running under the second workplace session are protected from applications running outside the second workspace session.Type: GrantFiled: July 20, 2007Date of Patent: July 1, 2014Assignee: Check Point Software Technologies, Inc.Inventors: Artiom Morozov, Dzmitry Konanka
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Patent number: 8769546Abstract: Method to selectively assign a reduced busy-wait time to threads is described. The method comprises determining whether at least one thread is spinning on a mutex lock associated with a condition variable and assigning, when the at least one thread is spinning on the mutex lock, a predetermined reduced busy-wait time for a subsequent thread spinning on the mutex lock.Type: GrantFiled: January 7, 2010Date of Patent: July 1, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Rakesh Sasidharan Nair, Sherin Thyil George, Aswin Chandramouleeswaran
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Publication number: 20140181837Abstract: Technologies are generally provided for dynamically managing execution of sequential programs in a multi-core processing environment by dynamically hosting the data for the different dynamic program phases in the local caches of different cores. This may be achieved through monitoring data access patterns of a sequential program initially executed on a single core. Based on such monitoring, data identified as being accessed by different program phases may be sent to be stored in the local caches of different cores. The computation may then be moved from core to core based on which data is being accessed, when the program changes phase. Program performance may thus be enhanced by reducing local cache miss rates, proactively reducing the possibility of thermal hotspots, as well as by utilizing otherwise idle hardware.Type: ApplicationFiled: March 1, 2013Publication date: June 26, 2014Applicant: Empire Technology Development LLCInventor: Sriram Vajapeyam
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Publication number: 20140181839Abstract: The present disclosure is applied to the technical field of data processing, and provided are a capacity-based multi-task scheduling method, apparatus and system. The method comprises: a scheduling node receiving a request for acquiring a task sent by a task executing node, the request carrying with a current load value and an available memory space of the task executing node; and the scheduling node deciding whether the current load value is less than a threshold, and carrying out task scheduling for the task executing node according to the available memory space of the task executing node if the current load value is less than the threshold. The present disclosure can effectively avoid the problems of overload, load, in sufficient memory, etc. of the task execution node, and increase the resource utilization rate of the task execution node and the task scheduling and executing efficiency.Type: ApplicationFiled: February 25, 2014Publication date: June 26, 2014Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Zhao XU, Yanrong ZHAO, Wei GUO, Jun LI, Wei ZHAO, Shubin ZHANG, Kungan HONG
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Publication number: 20140181838Abstract: Embodiments are provided that include the use of a cancellable command application programming interface (API) framework that provides cooperative multitasking for synchronous and asynchronous operations based in part on a command timing sequence and a cancellable command API definition. A method of an embodiment enables a user or programmer to use a cancellable command API definition as part of implementing a responsive application interface using a command timing sequence to control execution of active tasks. A cancellable command API framework of an embodiment includes a command block including a command function, a task engine to monitor the command function, and a timer component to control execution of asynchronous and synchronous tasks based in part on first and second control timing intervals associated with a command timing sequence. Other embodiments are also disclosed.Type: ApplicationFiled: February 24, 2014Publication date: June 26, 2014Applicant: MICROSOFT CORPORATIONInventors: Arye Gittelman, Petru Mihai Moldovanu, Sterling John Crockett
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Patent number: 8763003Abstract: A method of detecting deadlock in a multithreading program is provided. An invocation graph is constructed having a single root and a plurality of nodes corresponding to one or more functions written in code of the multithreading program. A resource graph is computed in accordance with one or more resource sets in effect at each node of the invocation graph. It is determined whether cycles exist between two or more nodes of the resource graph. A cycle is an indication of deadlock in the multithreading program.Type: GrantFiled: March 21, 2012Date of Patent: June 24, 2014Assignee: International Business Machines CorporationInventor: George B. Leeman, Jr.
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Patent number: 8762613Abstract: A method for managing a processor includes: obtaining an online request of a processor of a computer system; collecting lock contention information of the computer system if a lock contention status flag indicates a non-lock thrashing status; determining whether the computer system is in a lock thrashing status according to the lock contention information; and accepting the online request if it is determined that the computer system is in a non-lock thrashing status. By using the management method according to embodiments of the present application, processor performance degradation and a waste of idle processor resources that are caused by the case that the computer system is in a lock thrashing status are prevented, thereby improving utilization efficiency of processor resources and promoting overall performance of the computer system.Type: GrantFiled: June 5, 2012Date of Patent: June 24, 2014Assignee: Huawei Technologies Co., Ltd.Inventors: Xiaofeng Zhang, Han Zheng
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Patent number: 8762997Abstract: Systems and methods are disclosed to schedule jobs in a cloud computing infrastructure by receiving in a first queue jobs with deadlines or constraints specified in a hard service level agreement (SLA); receiving in a second queue jobs with a penalty cost metric specified in a soft SLA; and minimizing both constraint violation count and total penalty cost in the cloud computing infrastructure by identifying jobs with deadlines in the first queue and delaying jobs in the first queue within a predetermined slack range in favor of jobs in the second queue to improve the penalty cost metric.Type: GrantFiled: June 18, 2010Date of Patent: June 24, 2014Assignee: NEC Laboratories America, Inc.Inventors: Hyun Jin Moon, Yun Chi, V. Hakan Hacigumus
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Patent number: 8763000Abstract: A system, computer-readable medium and method for performing intelligent data pre-staging for a job submitted to a cluster environment. The method aspect comprises determining availability of compute resources including availability timeframes to process the submitted job, determining data requirements for processing the job and determining a co-allocation in time reservation.Type: GrantFiled: December 29, 2008Date of Patent: June 24, 2014Assignee: Adaptive Computing Enterprises, Inc.Inventor: David Brian Jackson
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Publication number: 20140165077Abstract: A method for pipeline parallelizing a control program for multi-core execution includes using (12) data dependency analysis on a control program to identify tasks that can be performed in parallel, identifying (13) a largest task Tmax requiring the most execution time of the identified tasks, identifying (14) cut-points in the largest task Tmax where data dependency delays decouple the task, inserting (15) delayed data dependencies into cut-points of the largest task Tmax to create N pipeline sub-tasks, in which N is a number of cores available to a processor on which the control program will be executed, and scheduling (16) the tasks and pipeline sub-tasks to the available processor cores.Type: ApplicationFiled: July 16, 2012Publication date: June 12, 2014Applicant: SIEMENS CORPORATIONInventors: Arquimedes Martinez Canedo, Hartmut Ludwig
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Patent number: 8739176Abstract: While preemptive multitasking has been available for task-driven methods that use multiple call stacks and even-driven methods that use a single call stack, an embodiment of a new method teaches how preemptive multitasking may be achieved in a single call stack for task-driven applications. The new method requires significantly less memory and processing overhead than required to manage multiple call stacks and provides a significant reduction in transition states and lines of application code than required for event-driven methods. The method comprises providing a single call stack, providing a preemptive scheduler, providing a wait operation which is followed by a return to the scheduler, wherein execution context is not preserved, and providing a signal operation which may be invoked synchronously from a task handling function and/or asynchronously from an interrupt routine, whereby the scheduler is invoked and execution context is preserved and subsequently restored by the single call stack.Type: GrantFiled: March 5, 2010Date of Patent: May 27, 2014Inventor: Sumner E. Darling
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Patent number: 8719825Abstract: The present invention provides for the adjustment of the timing of a scheduled job including determining when the execution time of a scheduled job is within a predetermined time period. Prior to this time, a job execution notification is generated and submitted to an end user. The notification includes a request for time delay in the event the job should not be executed on the time noted. If the job should be delayed, a user may submit a delay request including a time delay. Upon receipt, an internal timing parameter is temporarily reset based on the delay request. The job is then automatically rescheduled for the prescribed time. If no other delay is incurred, once the job is executed, the internal timing parameter is then reset to its original time value.Type: GrantFiled: August 17, 2005Date of Patent: May 6, 2014Assignee: SAP AGInventor: Manjit Singh Rajput
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Patent number: 8713571Abstract: Techniques for asynchronous task execution are described. In an implementation, tasks may be initiated and executed asynchronously, thereby allowing a plurality of calls to be made in parallel. Each task may be associated with a respective timeout that triggers an end to execution of the task. If a timeout for a low priority task expires without completing both the low priority task and a relatively higher priority task, then the low priority task may use the relatively higher priority task to extend execution time of the low priority task in order to allow additional time to perform the low priority task.Type: GrantFiled: February 17, 2010Date of Patent: April 29, 2014Assignee: Microsoft CorporationInventors: Edgar A. Banguero, Eric J. Holton, Brian M. Perrin, Daniel W. Crevier, Jose Emmanuel Miranda Steiner, Jeffrey E. Steinbok
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Patent number: 8705879Abstract: Systems, methods and computer readable media are disclosed for accelerating the compression of images on a multi-processor computer. In an embodiment, an image is divided into a plurality of slices, each slice having the same width as the image. These slices are provided to a work manager that maintains a thread for each processor. The work manager assigns each slice to a thread for processing in an efficient manner (such as the thread corresponding to the first available processor), and when an indication that the slice has been compressed for each slice is received, the work manager assembles the compressed image.Type: GrantFiled: April 1, 2009Date of Patent: April 22, 2014Assignee: Microsoft CorporationInventors: Nadim Y. Abdo, Voicu Anton Albu
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Patent number: 8707324Abstract: Implementing fair scalable reader writer mutual exclusion for access to a critical section by a plurality of processing threads is accomplished by creating a first queue node for a first thread, the first queue node representing a request by the first thread to access the critical section; setting at least one pointer within a queue to point to the first queue node, the queue representing at least one thread desiring access to the critical section; waiting until a condition is met, the condition comprising the first queue node having no preceding write requests as indicated by at least one predecessor queue node on the queue; permitting the first thread to enter the critical section in response to the condition being met; and causing the first thread to release a spin lock, the spin lock acquired by a second thread of the plurality of processing threads.Type: GrantFiled: February 27, 2012Date of Patent: April 22, 2014Assignee: Intel CorporationInventors: Alexey Kukanov, Arch D. Robison
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Patent number: 8694999Abstract: Described is a method for determining whether a first partition selected to run in a time window is a member of a transaction, the transaction including at least one further partition, determining a tail partition from among the at least one further partition and scheduling the tail partition to run in the time window. A transaction scheduler having a transaction determination module determining whether a first partition selected to run in a time window is a member of a transaction, the transaction including at least one further partition, a tail determination module determining a tail partition from among the at least one further partition and a scheduling module scheduling the tail partition to run in the time window.Type: GrantFiled: December 7, 2006Date of Patent: April 8, 2014Assignee: Wind River Systems, Inc.Inventor: Anand N. Sundaram
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Patent number: 8695000Abstract: A system for providing model level protection for resources holding data accessed by multiple tasks in a model is discussed. The protection occurs at the model level so that the protection mechanism does not interfere with model dynamics. Resources concurrently accessed by multiple tasks are identified so that a unified protection mechanism can be applied to the resource. A user interface may be provided which enables the selection of a particular type of protection mechanism for the data in the resource. User supplied protection mechanisms may also be implemented.Type: GrantFiled: March 16, 2007Date of Patent: April 8, 2014Assignee: The Mathworks, Inc.Inventors: Biao Yu, James Carrick
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Patent number: 8694621Abstract: A first capture system that captures network communication events related to an application, and a second capture system that captures internal processing events related to the application. A visualization system analyzes the data captured by each of the capture systems, synchronizes and correlates the data, and presents an integrated display of these communication and processing events. In a preferred embodiment, the communicated messages include an identifier of the application, and the processing components also associate an identifier of the application to each recorded processing event. To facilitate the integrated display of the events, the visualization system synchronizes the recorded communication and processing events to a common time base.Type: GrantFiled: August 16, 2006Date of Patent: April 8, 2014Assignee: Riverbed Technology, Inc.Inventors: Steven J. Baron, Patrick J. Malloy, Alain J. Cohen, Marc I. Schneider, Cheryl D. Stocks
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Patent number: 8689221Abstract: In an embodiment, asynchronous conflict events are received during a previous rollback period. Each of the asynchronous conflict events represent conflicts encountered by speculative execution of a first plurality of work units and may be received out-of-order. During a current rollback period, a first work unit is determined whose speculative execution raised one of the asynchronous conflict events, and the first work unit is older than all other of the first plurality of work units. A second plurality of work units are determined, whose ages are equal to or older than the first work unit, wherein each of the second plurality of work units are assigned to respective executing threads. Rollbacks of the second plurality of work units are performed. After the rollbacks of the second plurality of work units are performed, speculative executions of the second plurality of work units are initiated in age order, from oldest to youngest.Type: GrantFiled: March 14, 2013Date of Patent: April 1, 2014Assignee: International Business Machines CorporationInventors: Thomas M. Gooding, John K. O'Brien, Kai-Ting Amy Wang, Xiaotong Zhuang
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Patent number: 8688767Abstract: In a distributed processing in which multiple operation transportation methods can be used, a method is proposed which efficiently selects an operation transportation method in accordance with conditions of the distributed system. In view of this, a first computer is provided which includes: a first operation transportation portion which conducts multiple transportation methods that transports, for example, processes to a computer to execute them; a second operation transportation portion; and a selection information storing portion storing information used for selection from the multiple transportation methods. Further, a second computer is provided which includes a first operation receiving portion that conducts operations in accordance with the multiple transportation methods.Type: GrantFiled: September 25, 2009Date of Patent: April 1, 2014Assignee: Nec CorporationInventor: Tomoyoshi Sugawara
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Publication number: 20140089934Abstract: A system and method may be utilized to identify concurrency levels of processing stages in a distributed system, identify common resources and bottlenecks in the distributed system using the identified concurrency levels, and allocate resources in the distributed system using the identified concurrency levels.Type: ApplicationFiled: September 26, 2012Publication date: March 27, 2014Applicant: International Business Machines CorporationInventors: Parijat Dube, Xiaoqiao Meng, Jian Tan, Li Zhang
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Publication number: 20140089938Abstract: A multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that outputs a thread selection signal in accordance with a schedule, the thread selection signal designating a hardware thread to be executed in a next execution cycle among the plurality of hardware threads, and a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread. The thread scheduler specifies execution of at least one hardware thread pre-selected among the plurality of hardware threads in a predetermined first execution period, and specifies execution of a variably selected hardware thread in a second execution period other than the first execution period. A time ratio between the predetermined first execution period and the second execution period is set according to processing requests.Type: ApplicationFiled: November 27, 2013Publication date: March 27, 2014Applicant: Renesas Electronics CorporationInventors: Koji Adachi, Kazunori Miyamoto
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Publication number: 20140089932Abstract: A system and method may be utilized to identify concurrency levels of processing stages in a distributed system, identify common resources and bottlenecks in the distributed system using the identified concurrency levels, and allocate resources in the distributed system using the identified concurrency levels.Type: ApplicationFiled: September 21, 2012Publication date: March 27, 2014Applicant: International Business Machines CorporationInventors: Parijat Dube, Xiaoqiao Meng, Jian Tan, Li Zhang
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Publication number: 20140089939Abstract: A technique for resolving deadlocks between an RCU subsystem and an operating system scheduler. An RCU reader manipulates a counter when entering and exiting an RCU read-side critical section. At the entry, the counter is incremented. At the exit, the counter is manipulated differently depending on the counter value. A first counter manipulation path is taken when the counter indicates a task-context RCU reader is exiting an outermost RCU read-side critical section. This path includes condition-based processing that may result in invocation of the operating system scheduler. The first path further includes a deadlock protection operation that manipulates the counter to prevent an intervening RCU reader from taking the same path. The second manipulation path is taken when the counter value indicates a task-context RCU reader is exiting a non-outermost RCU read-side critical section, or an RCU reader is nested within the first path. This path bypasses the condition-based processing.Type: ApplicationFiled: November 30, 2013Publication date: March 27, 2014Applicant: International Business Machines CorporationInventor: Paul E. McKenney
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Patent number: 8661431Abstract: Timing parameters that influence an install time interval for installing a product on computing machines in a test environment in accordance with an installation configuration option are identified. A test value of the timing parameter and a test value of the install time are determined for each of the computing machines. The test values of the timing parameter and the install time determined for the sample computing machines are analyzed to determine an install time calculation expression for the installation configuration option. For installation in accordance with the installation configuration option in a normal operating environment, a current value of each of the timing parameters of the predetermined install time calculation expression for the installation configuration option. The install time interval in the normal operating environment is estimated based on the current value of the timing parameters and the install time calculation expression.Type: GrantFiled: January 3, 2012Date of Patent: February 25, 2014Assignee: International Business Machines CorporationInventors: Rand K. Barthel, Yong Li, Eduardo N. Spring
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Patent number: 8661446Abstract: A method for reducing power consumption and heat generation in a computer system employs a substitute idle task that puts the processor into a dormant mode, e.g., sleep, nap, or doze mode. The substitute idle task replaces a conventional operating system idle task. The substitute idle task may have a low priority, such as that of the conventional idle task, which it replaces. At each occurrence of a quantum interrupt, a task scheduler schedules applications for execution during the accompanying time slice. After the scheduled applications are done, the substitute idle task is executed. The dormant mode caused by the idle task reduces the system's power consumption. The idle task may also have a high priority and be designed to run for a predetermined percentage of time. As the processor spends the predetermined percentage of time in the dormant mode, known power consumption reduction may be guaranteed in the system.Type: GrantFiled: June 1, 2011Date of Patent: February 25, 2014Assignee: Maxwell Technologies, Inc.Inventors: Mark Steven Conrad, Robert A. Hillman
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Patent number: 8661441Abstract: The present disclosure involves systems, software, and computer implemented methods for reducing transaction load for process instance completion. One process includes identifying an end event triggered by an initial token of a process instance, determining a type of the end event, performing a search for additional tokens associated with the process instance that are distinct from the initial token, and performing a termination action based on the type of end event and a number of additional tokens identified in the search. The end event type may be non-terminating or terminating, and the end event type can determine the termination action to be performed. If the end event is non-terminating, then the termination action includes joining each finalization action for each process instance variable to a completion transaction if no additional tokens are found and executing the completion transaction to terminate the process instance.Type: GrantFiled: November 4, 2011Date of Patent: February 25, 2014Assignee: SAP AGInventor: Soeren Balko
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Publication number: 20140053164Abstract: According to one embodiment of the present disclosure, an approach is provided in which a thread is selected from multiple active threads, along with a corresponding weighting value. Computational logic determines whether one of the multiple threads is dispatching an instruction and, if so, computes a dispatch weighting value using the selected weighting value and a dispatch factor that indicates a weighting adjustment of the selected weighting value. In turn, a resource utilization value of the selected thread is computed using the dispatch weighting value.Type: ApplicationFiled: October 29, 2013Publication date: February 20, 2014Applicant: International Business Machines CorporationInventors: James Wilson Bishop, Michael J. Genden, Steven Bradford Herndon, Philip Lee Vitale
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Patent number: 8656399Abstract: A computer-implemented method of performing runtime analysis on and control of a multithreaded computer program. One embodiment of the present invention can include identifying threads of a computer program to be analyzed. Under control of a supervisor thread, a plurality of the identified threads can be folded together to be executed as a folded thread. The execution of the folded thread can be monitored to determine a status of the identified threads. An indicator corresponding to the determined status of the identified threads can be presented in a user interface that is presented on a display.Type: GrantFiled: March 23, 2012Date of Patent: February 18, 2014Assignee: International Business Machines CorporationInventor: Kirk J. Krauss
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Patent number: 8656145Abstract: A multithreaded processor capable of allocating interrupts is described. In one embodiment, the multithreaded processor includes an interrupt module and threads for executing tasks. The interrupt module can identify a priority for each thread based on a task priority for tasks being executed by the threads and assign an interrupt to a thread based at least on its priority.Type: GrantFiled: September 19, 2008Date of Patent: February 18, 2014Assignee: QUALCOMM IncorporatedInventors: Erich James Plondke, Lucian Codrescu
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Patent number: 8656408Abstract: Guiding OS thread scheduling in multi-core and/or multi-threaded microprocessors by: determining, for each thread among the active threads, the power consumed by each instruction type associated with an instruction executed by the thread during the last context switch interval; determining for each thread among the active threads, the power consumption expected for each instruction type associated with an instruction scheduled by said thread during the next context switch interval; generating at least one combination of N threads among the active threads (M), and for each generated combination determining if the combination of N threads satisfies a main condition related to the power consumption per instruction type expected for each thread of the thread combination during the next context switch interval and to the thread power consumption per instruction type determined for each thread of the thread combination during the last context switch interval; and selecting a combination of N threads.Type: GrantFiled: September 28, 2011Date of Patent: February 18, 2014Assignee: International Business Machines CorporationsInventors: Hisham E. Elshishiny, Ahmed T. Sayed Gamal El Din
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Publication number: 20140047455Abstract: A method for deterministic locking in a parallel computing environment is provided. The method includes creating a data structure in memory of a computer for a shared resource. The data structure encapsulates a reference to an owner of a lock for the shared resource and a queue of threads able to seek exclusive access to the shared resource. The queue in turn includes different entries, each entry including an identifier for a corresponding one of the threads and a deterministic time computed for the corresponding one of the threads from a count of memory accesses occurring in the corresponding one of the threads. Consequently, a thread can be selected from the queue to receive ownership of the lock and exclusive access to the shared resource based upon a deterministic time for the selected thread as compared to other deterministic times for others of the threads in the queue, for example, a lowest deterministic time.Type: ApplicationFiled: October 18, 2013Publication date: February 13, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tobias Achterberg, DANIEL JUNGLAS, ROLAND WUNDERLING
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Patent number: 8650569Abstract: A data processing system comprising an operating system for supporting processes, such that the process are associated with one or more resources and the operating system being arranged to police the accessing by processes of resources so as to inhibit a process from accessing resources with which it is not associated. Part of this system is an interface for interfacing between each process and the operating system and a memory for storing state information for at least one process. The interface may be arranged to analyze instructions from the processes to the operating system, and upon detecting an instruction to re-initialize a process cause state information corresponding to that pre-existing state information to be stored in the memory as state information for the re-initialized process and to be associated with the resource.Type: GrantFiled: September 10, 2007Date of Patent: February 11, 2014Assignee: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, David James Riddoch, Greg Law
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Publication number: 20140040915Abstract: Customizing functions performed by data flow operators when processing data streams. An open-executor(s) is provided as part of the data stream analytics platform, wherein such open-executor allows for both of: 1) customizing user plug-ins for the operators, to accommodate changes in user requirements; and 2) predefining templates that are based on specific meta-properties of various operators and that are common therebetween.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Inventors: Qiming Chen, Meichun Hsu
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Patent number: 8645955Abstract: Provided are a multitasking method and apparatus. By continuously maintaining the intrinsic information of each peripheral processing unit of when a process-centered task is stopped, when a reconfigurable array stops executing the process-centered task and executes a different process-centered task, by stopping executing a control-centered task and executing a reconfiguration task, only when the reconfigurable array receives an execution request of the reconfiguration task while the reconfigurable array is performing the control-centered task, or by causing a predetermined number of processing units to execute each of a plurality of reconfiguration tasks that are to be simultaneously executed by the reconfigurable array, wherein the predetermined number of processing units is set in consideration of an expected data processing amount required for the reconfiguration task, the reconfigurable array can more quickly complete execution of multitasking.Type: GrantFiled: June 12, 2007Date of Patent: February 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Keun-soo Yim, Jeong-joon Yoo, Jeong-wook Kim, Soo-jung Ryu, Jung-keun Park, Jae-don Lee, Young-sam Shin
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Publication number: 20140026150Abstract: Software development tools and techniques for configuring parallel processing systems to execute software modules implementing processes for solving complex problems, including over-the-counter trading processes and foreign exchange trading processes, to execute quickly and efficiently. The parallel processing system may include low-cost, consumer-grade multicore processing units. A process for solving a complex problem may be divided into software modules, including by evaluating the process to determine discrete processing steps that produce an intermediate result on which later steps of the process depend. The software modules created for a process may form a template processing chain describing multiple processing chains of the process that are to be executed.Type: ApplicationFiled: July 20, 2012Publication date: January 23, 2014Applicant: oneZero Financial Systems, LLCInventors: Christopher John Kline, Jesse Johnson, Andrew Ralich
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Publication number: 20140026149Abstract: A system and method donates time from a first process to a second process. The method includes determining a time slice for each of a plurality of processes to generate a schedule therefrom. The method includes determining a time donation scheme for the first process, the time donation scheme indicative of a donation policy in which the execution time of the first process is donated to the second process. During execution of the processes, the method includes receiving a request from the first process for a time donation to the second process and executing the second process during the time slice of the first process.Type: ApplicationFiled: July 17, 2012Publication date: January 23, 2014Inventors: Keith BACKENSTO, Thierry Preyssler
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Patent number: 8635600Abstract: Embodiments of the invention broadly contemplate systems, methods, apparatuses and program products providing a mechanism in a run-time environment or Virtual Machine (VM) which enables a user to specify the combination of method(s) and thread(s) the user wants to collect traces for, without having to make any modifications to the application source code.Type: GrantFiled: November 24, 2009Date of Patent: January 21, 2014Assignee: International Business Machines CorporationInventors: Venkataraghavan Lakshminarayanachar, Prashanth K. Nageshappa