Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.

Abstract: Multilayer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching Operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching Operations may be separated by intermediate post processing activities, they may be separated by cleaning Operations, or barrier material removal Operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.

Abstract: A method of fabricating a sputtering target for sputter depositing material onto a substrate in a sputtering chamber is described. In one embodiment of the method, a preform having a surface is formed and a layer of sputtering material is electroplated onto the surface of the preform to form the target. The method can be applied to form a sputtering target having a non-planar surface.

Abstract: Microstructured taggant particles, their applications and methods of making the same are described. Precisely formed taggant particles can be formed, in the range of 500? and smaller, from either inert polymers or biodegradable materials bearing information indicia, such as through specific shape, size, color, reflectivity, refractive index, surface geometry, imprinting, optical effect or properties, and electromagnetic properties, to uniquely tag, identify or authenticate articles.

Abstract: Various structures or components can include plated surfaces or other parts. For example, an article can include a base and a plated part with a limit artifact that results from plating adjacent a non-plateable surface; the limit artifact can be disposed away from the base. Exemplary limit artifacts include lack of protrusions, smooth upper surfaces, and curved surfaces, where a curved surface can transition between a smooth upper surface and an irregular side surface. Exemplary plated structures can be tube-shaped or cup-shaped, with an opening at a top end and, around the opening, a lip with a limit artifact. Wall-like structures can similarly have limit artifacts at their top end. If plating on a mold's side surface, the non-plateable surface can be the lower surface of an overhanging polymer disk or structure positioned on the mold. Plated tubes and wall-like structures can be employed in microfluidic structures.

Abstract: Various embodiments of the invention provide techniques for forming structures (e.g. HARMS-type structures) via an electrochemical extrusion process. Preferred embodiments perform the extrusion processes via depositions through anodeless conformable contact masks that are initially pressed against substrates that are then progressively pulled away or separated as the depositions thicken. A pattern of deposition may vary over the course of deposition by including more complex relative motion between the mask and the substrate elements. Such complex motion may include rotational components or translational motions having components that are not parallel to an axis of separation. More complex structures may be formed by combining the electrochemical extrusion process with the selective deposition, blanket deposition, planarization, etching, and multi-layer operations of a multi-layer electrochemical fabrication process.

Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.

Abstract: The present invention relates to a capacitor-embedded PCB and a method of manufacturing the same. The capacitor-embedded PCB includes a dielectric layer, a lower electrode layer formed under the dielectric layer, and an upper electrode layer formed on the dielectric layer and configured to have at least one first blind via hole that is inwardly formed.

Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.

Abstract: A method for forming a fluid injection apparatus is disclosed. A patterned sacrificial layer is formed overlying a substrate. A electroplate seed layer is formed on the patterned sacrificial layer. A structural layer is formed overlying the electroplate seed layer and the substrate. The structural layer is patterned to form a nozzle. The electroplate seed layer in the nozzle is removed. The sacrificial layer is removed to form a fluid chamber. A protective layer is formed to selectively cover the structural layer and the electroplate seed layer.

Abstract: The invention relates to a method for electroplating a metal deposit on electroplatable portions of composite articles that have both electroplatable and non-electroplatable portions. In this method, the invention is an improvement which comprises treating the articles prior to electroplating to provide the electroplatable portions with enhanced electroplatability. This is achieved by passing a current though a near neutral pH solution that contains a conductivity agent and a buffer to reduce or remove surface oxides and contaminants from such portions without deleteriously affecting the non-electroplatable portions of the articles. When the treated surfaces are subsequently subjected to metal plating, a uniform, smooth metal deposit is achieved.

Abstract: An improved SIV resistance and an improved EM resistance are achieved in the coupling structure containing copper films. A semiconductor device includes: a semiconductor substrate; a second insulating layer formed on or over the semiconductor substrate; a second barrier metal film, formed on the second insulating film, and being capable of preventing copper from diffusing into the second insulating film; and an electrically conducting film formed on the second barrier metal film so as to be in contact with the second barrier metal film, and containing copper and carbon, wherein a distribution of carbon concentration along a depositing direction in the second electrically conducting film includes a first peak and a second peak.

Abstract: A process of providing a pattern of a metal on a non-conductive substrate to create loop antennae for wireless articles and for creating circuitry for smart cards, such as phone cards is provided. The method comprises the steps of catalyzing the non-conductive substrate by applying a catalytic ink, reducing a source of catalytic metal ions in the catalytic ink to its associated metal, depositing electroless metal on the pattern of catalytic ink on the surface of the substrate; and plating electrolytic metal on the electroless metal layer to produce the desired pattern of metal on the non-conductive substrate. The catalytic ink typically comprises one or more solvents, a source of catalytic metal ions, a crosslinking agent, one or more copolymers, a polyurethane polymer, and, optionally, one or more fillers.

Abstract: Multi-layer structures are electrochemically fabricated by depositing a first material, selectively etching the first material (e.g. via a mask), depositing a second material to fill in the voids created by the etching, and then planarizing the depositions so as to bound the layer being created and thereafter adding additional layers to previously formed layers. The first and second depositions may be of the blanket or selective type. The repetition of the formation process for forming successive layers may be repeated with or without variations (e.g. variations in: patterns; numbers or existence of or parameters associated with depositions, etchings, and or planarization operations; the order of operations, or the materials deposited). Other embodiments form multi-layer structures using operations that interlace material deposited in association with some layers with material deposited in association with other layers.

Abstract: Multilayer structures are electrochemically fabricated on a temporary (e.g. conductive) substrate and are thereafter bonded to a permanent (e.g. dielectric, patterned, multi-material, or otherwise functional) substrate and removed from the temporary substrate. In some embodiments, the structures are formed from top layer to bottom layer, such that the bottom layer of the structure becomes adhered to the permanent substrate, while in other embodiments the structures are form from bottom layer to top layer and then a double substrate swap occurs. The permanent substrate may be a solid that is bonded (e.g. by an adhesive) to the layered structure or it may start out as a flowable material that is solidified adjacent to or partially surrounding a portion of the structure with bonding occurs during solidification. The multilayer structure may be released from a sacrificial material prior to attaching the permanent substrate or it may be released after attachment.

Abstract: Multilayer structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. Selectivity of deposition is obtained via a multi-cell controllable mask. Alternatively, net selective deposition is obtained via a blanket deposition and a selective removal of material via a multi-cell mask. Individual cells of the mask may contain electrodes comprising depositable material or electrodes capable of receiving etched material from a substrate. Alternatively, individual cells may include passages that allow or inhibit ion flow between a substrate and an external electrode and that include electrodes or other control elements that can be used to selectively allow or inhibit ion flow and thus inhibit significant deposition or etching. Single cell masks having a cell size that is smaller or equal to the desired deposition resolution may also be used to form structures.

Abstract: Multilayer structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. Selectivity of deposition is obtained via a multi-cell controllable mask. Alternatively, net selective deposition is obtained via a blanket deposition and a selective removal of material via a multi-cell mask. Individual cells of the mask may contain electrodes comprising depositable material or electrodes capable of receiving etched material from a substrate. Alternatively, individual cells may include passages that allow or inhibit ion flow between a substrate and an external electrode and that include electrodes or other control elements that can be used to selectively allow or inhibit ion flow and thus inhibit significant deposition or etching. Single cell masks having a cell size that is smaller or equal to the desired deposition resolution may also be used to form structures.

Abstract: Method of making an electroplated interconnection wire of a composite of metal and carbon nanotubes is disclosed, including electroplating a substrate having a conductive baseline on a surface thereof in an electroplating bath containing a metal ion and carbon nanotubes, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline. Alternatively, a method of the present invention includes preparing a dispersion of carbon nanotubes dispersed in an organic solvent, printing a baseline with the dispersion on a surface of a substrate, evaporating the organic solvent to obtain a conductive baseline, and electroplating the surface in an electroplating bath containing a metal ion, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline.

Abstract: An electrolytic copper plating bath used for via-filling plating of blind via-holes formed on a substrate, containing a water-soluble copper salt, sulfuric acid, chloride ions, and a leveler as an additive, wherein the leveler is either one or both of a quaternary polyvinylimidazolium compound represented by the following formula (1) and a copolymer, represented by the following formula (2), of vinylpyrrolidone and a quaternary vinylimidazolium compound: where R1 and R2 are each an alkyl group, m is an integer of not less than 2, and p and q are each an integer of not less than 1, and a copper electroplating method for via-filling plating of blind via-holes formed on a substrate by use of the electrolytic copper plating bath.

Abstract: After bubbles adsorbed to a substrate are removed by rotating the substrate in a plating solution at a higher speed or after the wettability of the surface of the substrate to be plated is improved before the substrate is immersed in the plating solution, the substrate is rotated in the plating solution at a lower speed so that a plating process is performed with respect to the substrate.

Abstract: A metallic separator for a fuel cell has excellent corrosion resistance and contact resistance, even when a gold coating is applied directly without a surface treatment by a nickel coating. The metallic separator for a fuel cell, comprising stainless steel having a surface, can be obtained by coating at 2.3 to 94% of area rate on the surface without a surface treatment.

Abstract: A process for preparing a non-conductive substrate for electroplating is proposed. The proposed process comprises contacting the substrate, after desmear, with a combined neutralization/sacrificial coating solution followed by treatment with a carbon dispersion solution. The combined neutralization/sacrificial coating solution neutralizes permanganate residues from the desmear step and applies a sacrificial coating to metallic surfaces on the substrate. The sacrificial coating allows for easy and reliable removal of unwanted carbon residues from the metallic surfaces prior to electroplating.

Abstract: The various embodiments discloses a cantilever probe comprising a first electrode and a second electrode engaged to a substrate and a branched cantilever wherein the cantilever comprises a nanostruture. Furthermore, the probe comprises a first arm of the cantilever engaged to the first electrode and a second arm of the cantilever engaged to the second electrode. Additionally, the cantilever probe comprises an electrical circuit coupled to the cantilever wherein the electrical circuit is capable of measuring a change in piezoresistance of the cantilever resulting from an atomic force and/or a magnetic force applied to the cantilever. Additionally, the invention discloses a method of performing atomic force microscopy, magnetic force microscopy, or magnetic resonance force microscopy. The nanostructures may comprise carbon or non-carbon materials. Additionally, the nanostructures may include nanotubes, nanowire, nanofibers and various other types of nanostructures.

Abstract: Disclosed methods reduce the discontinuities between individual layers of a structure that are formed at least in part using electrochemical fabrication techniques. Discontinuities may exist between layers of a structure as a result of up-facing or down-facing regions defined in data descriptive of the structure or they may exist as a result of building limitations, e.g., limitations that result in non-parallel orientation between a building axis and sidewall surfaces of layers. Methods for reducing discontinuities may be applied to all regions or only to selected regions of the structure. Methods may be tailored to improve the accuracy between an original design of the structure and the structure as fabricated or they may simply be used to smooth the discontinuities between layers. Methods may include deposition operations that selectively favor filling of the discontinuities and/or etching operations that selectively favor removal of material from protrusions that define discontinuities.

Abstract: Methods suitable for use in making a write coil of a magnetic head includes the steps of forming a seed layer made of ruthenium (Ru) over a substrate; forming, over the seed layer, a patterned resist having a plurality of write coil trenches patterned therein; electroplating electrically conductive materials within the plurality of write coil trenches to thereby form a plurality of write coil layers; removing the patterned resist; and performing a reactive ion etch (RIE) in ozone gas (O3) for removing exposed seed layer materials in between the plurality of write coil layers. Advantageously, the write coil layers remain undamaged from the RIE in the ozone gas. Other structures may be fabricated in a similar manner.

Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.

Abstract: Various embodiments of the invention provide techniques for forming structures (e.g. HARMS-type structures) via an electrochemical extrusion process. Preferred embodiments perform the extrusion processes via depositions through anodeless conformable contact masks that are initially pressed against substrates that are then progressively pulled away or separated as the depositions thicken. A pattern of deposition may vary over the course of deposition by including more complex relative motion between the mask and the substrate elements. Such complex motion may include rotational components or translational motions having components that are not parallel to an axis of separation. More complex structures may be formed by combining the electrochemical extrusion process with the selective deposition, blanket deposition, planarization, etching, and multi-layer operations of a multi-layer electrochemical fabrication process.

Abstract: Various embodiments of the invention provide techniques for forming structures (e.g. HARMS-type structures) via an electrochemical extrusion process. Preferred embodiments perform the extrusion processes via depositions through anodeless conformable contact masks that are initially pressed against substrates that are then progressively pulled away or separated as the depositions thicken. A pattern of deposition may vary over the course of deposition by including more complex relative motion between the mask and the substrate elements. Such complex motion may include rotational components or translational motions having components that are not parallel to an axis of separation. More complex structures may be formed by combining the electrochemical extrusion process with the selective deposition, blanket deposition, planarization, etching, and multi-layer operations of a multi-layer electrochemical fabrication process.

Abstract: In some embodiments, multilayer structures are electrochemically fabricated from at least one structural material (e.g. nickel), at least one sacrificial material (e.g. copper), and at least one sealing material (e.g. solder). In some embodiments, the layered structure is made to have a desired configuration which is at least partially and immediately surrounded by sacrificial material which is in turn surrounded almost entirely by structural material. The surrounding structural material includes openings in the surface through which etchant can attack and remove trapped sacrificial material found within. Sealing material is located near the openings. After removal of the sacrificial material, the box is evacuated or filled with a desired gas or liquid. Thereafter, the sealing material is made to flow, seal the openings, and resolidify. In other embodiments, a post-layer formation lid or other enclosure completing structure is added.

Abstract: The present invention relates to a method for fabricating high performance chip interconnects and packages by providing methods for depositing a conductive material in cavities of a substrate in a more efficient and time saving manner. This is accomplished by selectively removing portions of a seed layer from a top surface of a substrate and then depositing a conductive material in the cavities of the substrate, where portions of the seed layer remains in the cavities. Another method includes forming an oxide layer on the top surface of the substrate such that the conductive material can be deposited in the cavities without the material being formed on the top surface of the substrate. The present invention also discloses methods for forming multi-level interconnects and the corresponding structures.

Abstract: A method for selective electroplating of a semiconductor input/output (I/O) pad includes forming a titanium-tungsten (TiW) layer over a passivation layer on a semiconductor substrate, the TiW layer further extending into an opening formed in the passivation layer for exposing the I/O pad, such that the TiW layer covers sidewalls of the opening and a top surface of the I/O pad. A seed layer is formed over the TiW layer, and portions of the seed layer are selectively removed such that remaining seed layer material corresponds to a desired location of interconnect metallurgy for the I/O pad. At least one metal layer is electroplated over the remaining seed layer material, using the TiW layer as a conductive electroplating medium.

Abstract: A method for producing an array of oriented nanofibers that involves forming a solution that includes at least one electroactive species. An electrode substrate is brought into contact with the solution. A current density is applied to the electrode substrate that includes at least a first step of applying a first substantially constant current density for a first time period and a second step of applying a second substantially constant current density for a second time period. The first and second time periods are of sufficient duration to electrically deposit on the electrode substrate an array of oriented nanofibers produced from the electroactive species. Also disclosed are films that include arrays or networks of oriented nanofibers and a method for amperometrically detecting or measuring at least one analyte in a sample.

Abstract: A method and apparatus using a pre-patterned seed layer for providing an aligned coil for an inductive head structure. The method uses an aligned process where the base plate imprint is fabricated on an electrically insulating layer and the reversed image is fabricated and etched into the coil insulation material, e.g., hard bake photoresist to alleviate the problems associated with complete ion removal of the seed layer between high aspect ratio coils. The method would also not be prone to plating non-uniformities (voids), and would not be subject to seed layer undercutting in a wet etch step process.

Abstract: This invention relates to a process for electroplating a selected surface area of a component with a crushable zinc alloy, the method comprising utilizing a relatively low current density in an alkaline solution during the electroplating process to provide a crushable coating of said zinc alloy on said selected surface area.

Abstract: A wiring substrate with bumps protruding from a surface of the substrate covers one side of a metallic base with an electrical insulating film thereon, having open holes exposing the base, etching the base through the open holes to form concavities in the base, electroplating the interior faces of the concavities to form a barrier metal film thereon filling the concavities with a bump material by electroplating, and forming a barrler layer on the bump material in each concavity. A stack of wiring patterns is formed on the insulating film, adjacent wiring patterns being separated by a respective intervening insulating layer and being electrically connected to each other through vias in the intervening insulating layer, and to the bump material filled in the concavities. Thereafter, the base and barrier metal film are removed.

Abstract: An electroless plating apparatus includes: a storage tank for an electroless plating solution; a blocking member which blocks the electroless plating solution from flowing from a treatment side of a semiconductor wafer installed to the storage tank toward an opposite side to the treatment side, the treatment side being a side facing the electroless plating solution; and a solution supplier which causes the electroless plating solution to flow so that the electroless plating solution comes in contact with the treatment side of the semiconductor wafer.

Abstract: Synthetic methods for the manufacture of segmented nanoparticles are described.

Abstract: Methods for forming microelectronic workpieces used in electrochemical deposition processes, methods of depositing a conductive layer on a microelectronic workpiece, and articles for electrochemical deposition in semiconductor fabrication. One aspect of the invention is directed toward methods for forming microelectronic workpieces that are well-suited for electrochemical deposition processes. On embodiment of such a method comprises depositing a first conductive material on a workpiece to form an electrically conductive first layer that conforms to the workpiece. This embodiment further includes forming a seed region defined by a second layer of a second conductive material on the first layer, and forming a contact region defined by an exposed portion of the first layer that is not covered by the second layer. The contact region can extend around at least a portion of the perimeter of the workpiece.

Abstract: A method and apparatus for performing data collection within a device is disclosed. A device steers a scanning probe in a continuous, non-raster pattern across a specimen. The specimen is supported by a stage, and data is collected in response to interaction between the probe and the specimen to form a data set. Spiral scanning patterns without turnaround regions are utilized in embodiments of the present invention, both with and without rounded corners in the scanning patterns.

Abstract: A process for manufacturing a land grid array connector for a printed wiring board is disclosed. The process does not require electroplating precious metal overlays. Therefore, no commoning bar is required. Another benefit of the invention includes a connector design using only a flash, soft gold application in the outer surface of the connector. Physical hardness and durability are derived from a thin palladium layer lying beneath the flash gold layer.

Abstract: A method to make probes of a probe card includes providing a blocking plate on an electroplating tank. The blocking plate has a plurality of openings according to the layout of contact pads on a probe head. There are bumps on the contact pads of the probe head. Continuous electroplating process can be executed after bumps (contact pads) contact electroplating solution in the electroplating tank through the openings of the blocking plate. By continuously moving the probe head according to the desired shape of probes, probes were formed by electroplating. These probes can be made into different shapes with good uniformity in elasticity and heights to increase the quality of electrical contact during wafer probing. Moreover, the process lead time and fabrication cost are saved.

Abstract: An electroplating apparatus, in accordance with the present invention, includes a plurality of chambers. A first chamber includes an anode therein. The first chamber has an opening for delivering an electrolytic solution containing metal ions onto a surface to be electroplated. The surface to be electroplated is preferably a cathode. A second chamber is formed adjacent to the first chamber and has a second opening in proximity of the first opening for removing electrolytic solution containing metal ions from the surface to be electroplated. The plurality of chambers are adapted for movement in a first direction along the surface to be electroplated.

Abstract: The present invention provides a method to coat an article using a plating process, either electroless or electrolytic, whereby nickel is plated on the article using a solution that includes a suspension of powders or containing one or more of the following elements: Ni, Cr, Al, Zr, Hf, Ti, Ta, Si, Ca, Fe, Y and Ga. Optionally, the coating is then heat treated at a temperature above about 1600° F. for an effective amount of time to allow to homogenize the coating by allowing effective interdiffusion between the species. The level of aluminum may be altered to produce a coating of the predominantly ? phase of the NiAl alloy composition. Optionally, a TBC layer is applied over the predominantly ? phase NiAl alloy composition metallic bond coat.

Abstract: The present invention relates to a web handling apparatus and process ideally suited for applications involving wet chemistry. The invention involves the horizontal processing of webs in processing containers. The web is redirected into the processing container by inserting a cassette across the web and into the processing container. The cassette includes at least one functional fluid element that facilitates processing of the web. The web handling practices of the invention improve the quality of the processed web. The invention is preferably used in electrodeposition processes.

Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.

Abstract: A method for electrolytic copper plating using an electrolytic copper plating solution including a compound containing a structure of —X—S—Y—, wherein X and Y are independently chosen from hydrogen atom, carbon atom, sulfur atom, nitrogen atom, and oxygen atom, and X and Y may be the same only when they are a carbon atom, and by contacting the electrolytic copper plating solution with ozone is disclosed.

Abstract: A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating copper. The vertical spiral inductor is formed and defined by next depositing a pattern of top metal (e.g. copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core is made from a permeable or non-permeable material.

Abstract: A contact is disposed to come into contact with a metal layer formed on a substrate being treated, the contact being in contact with a surface being treated from an opposite surface through a through hole present in a substrate. Alternatively, a contact is disposed to come into contact with a metal layer formed on a substrate, the contact coming into contact at an approximate center of the substrate. Alternatively, a plurality of needle bodies are disposed to be in electrical contact with a metal layer of a substrate being treated, thereby power supply for electrolytic polishing/plating to a substrate being treated being implemented, without restricting to a periphery of a substrate, from a plurality of points on a surface thereof. Due to any one of these, liquid treatment equipment enables to improve uniformity in plane of an electric current sent to a surface being treated and of liquid treatment.

Abstract: A two-layered anode (1?) has a lower layer (2) including a non-conductive carrier material to which a conductive electrode layer (3?) is applied. Non-conductive areas, formed by partial removal of the electrode layer, have a predetermined structure corresponding to the structure of a structured polymer film (11) to be formed. The anode (1?) is connected with a platinum cathode in an electrolyte into which compounds of low molecular weight, preferably monomers of the polymer film (11), are introduced. During current flow, a conductive polymer film (11) of the predetermined structure is formed on conductive areas brought into contact with the electrolyte. A non-conductive substrate layer (13) is applied to the structured polymer film (11). The structured polymer film (11) adheres to the non-conductive substrate layer (13) and can be released from the electrode (1?) without damaging the electrode.

Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.