Coating Selected Area Patents (Class 205/118)
  • Publication number: 20090071836
    Abstract: A method of electrodepositing germanium compound materials on an exposed region of a substrate structure, which includes forming a plating solution by dissolving at least one germanium salt and at least one salt containing an element other than germanium in water; obtaining a substrate with a clean surface; immersing the substrate in the solution; and electroplating germanium compound materials on the substrate by applying an electrical potential between the substrate and an anode in the plating solution, in which the substrate is included in a semiconductor or phase change device.
    Type: Application
    Filed: September 17, 2007
    Publication date: March 19, 2009
    Applicant: International Business Machines Corporation
    Inventors: Qiang Huang, Andrew J. Kellock, Xiaoyan Shao, Venkatram Venkatasamy
  • Publication number: 20090075095
    Abstract: Methods for processing a substrate utilizing a backside layer are presented including: receiving a substrate, the substrate including a front side and a backside; forming the backside layer on the backside of the substrate; and performing at least one processing operation on the front side of the substrate, wherein the backside layer protects the backside of the substrate during the performing the at least one processing operation. In some embodiments, methods further include cross-linking the backside layer such that the backside layer is stabilized. In some embodiments, methods further include: functionalizing the backside layer, where the functionalizing alters a chemical characteristic of the backside layer, and where the functionalizing includes a functional group such as: a hydroxyl group, an amino group, a mercapto group, a fluorine group, a chlorine group, an alkene group, an aryle group, and a carboxy group.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 19, 2009
    Inventors: Igor Ivanov, Tony Chiang, Chi-I Lang
  • Patent number: 7504014
    Abstract: The present invention generally relates to circuits on the nanotechnology scale. Specifically, it is directed to methods of fabricating carbon nanotube-based (i.e., CNT-based) circuits. The method involves providing a mixture of carbon nanotubes that is substantially disaggregated and patterning carbon nanotubes through the use of electrostatic forces. Carbon nanotubes in the mixture are typically disaggregated through the introduction of positive charge on the individual nanotubes. The patterning of the carbon nanotubes is typically accomplished using electrostatic attraction between pre-formed metal lines and the charged carbon nanotubes.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: March 17, 2009
    Assignee: Fujitsu Limited
    Inventors: Michael G. Lee, Kishio Yokouchi
  • Publication number: 20090067149
    Abstract: A shielding apparatus useful in the attenuation of electronic noise or spurious electric signals is disclosed. In one embodiment, the shielding apparatus is encapsulated with an electronic component such as an integrated circuit. At least parts of the apparatus are formed using a selective metal deposition process (e.g., electroforming) that increases manufacturing efficiency and provides enhanced mechanical and structural features, as well as reduced cost. In another embodiment, the shielding apparatus comprises an array. Methods of manufacturing and utilizing the shielding apparatus are also disclosed.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 12, 2009
    Inventors: Robert Bogursky, Kenneth Krone, Frederick W. Grabau, Peter Bellantoni, Mark Saunders
  • Publication number: 20090056991
    Abstract: The present invention generally relates to methods of treating a surface of a substrate, and to the use of the method and resulting films, coatings and devices formed therefrom in various applications including but not limited to electronics manufacturing, printed circuit board manufacturing, metal electroplating, the protection of surfaces against chemical attack, the manufacture of localized conductive coatings, the manufacture of chemical sensors, for example in the fields of chemistry and molecular biology, the manufacture of biomedical equipment, and the like. In another aspect, the present invention provides a printed circuit board, a printed circuit board, comprising: at least one metal layer; a layer of organic molecules attached to the at least one metal layer; and an epoxy layer atop said layer of organic molecules.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Inventors: Werner G. Kuhr, Steven Z. SHI, Jen-Chieh WEI, Zhiming LIU, Lingyun WEI
  • Publication number: 20090057156
    Abstract: It is an object of the present invention to alleviate a work for removing an unnecessary metal layer when wiring and vias are formed on a substrate by electroplating. An additive is added to a plating solution to be used for electroplating. The additive has a plating reaction suppressing capability, but has a characteristic that the plating reaction suppressing capability is reduced as the plating reaction progresses. The additive has a capability for increasing a metal deposition overpotential and has a characteristic that the metal deposition overpotential is reduced as the reaction progresses. As a result, the metal can be deposited selectively in a trench and a via formed on the substrate. When a wiring and a via are formed on the substrate, the trench and the via having a predetermined surface roughness are formed on the substrate.
    Type: Application
    Filed: August 13, 2008
    Publication date: March 5, 2009
    Inventors: Toshio Haba, Haruo Akahoshi, Hitoshi Suzuki, Akira Chinda
  • Publication number: 20090057157
    Abstract: Embodiments include treatment of substrates, formation of structures, and formation of multilayer structures using contact masks where a controlled mating of the contact masks and substrates is used. Some embodiments involve controlled mating at speeds equal to or less than 10 microns/second, more preferably equal to or less than 5 microns/second, and even more preferably equal to or less than 1 micron/second. Some embodiments involve controlled mating that uses a higher speed of approach when further away followed by a slower speed of approach to cause mating. Some embodiments involve controlled mating that uses a higher speed of approach when making preliminary contact, then backing away a desired distance, and then making a mating approach that causes mating while using a slower mating speed.
    Type: Application
    Filed: September 3, 2008
    Publication date: March 5, 2009
    Inventor: Jeffery A. Thompson
  • Publication number: 20090061175
    Abstract: Provided is a method of forming thin film metal conductive lines, the method including the steps of: forming a seed metal layer on a substrate; forming a first photoresist (PR) layer on the seed metal layer, and forming a metal conductive line pattern using the first PR layer as a mask; removing the first PR layer, and then forming a second PR layer which is spaced at a predetermined distance from the metal conductive line pattern; forming a protective film surrounding the metal conductive line pattern by electroplating; and performing etching to remove the second PR layer and an exposed portion of the seed metal layer.
    Type: Application
    Filed: December 19, 2007
    Publication date: March 5, 2009
    Inventor: Sang-Hee KIM
  • Publication number: 20090045066
    Abstract: An electrochemical fabrication process for producing three-dimensional structures from a plurality of adhered layers is provided where each layer comprises at least one structural material (e.g. nickel or nickel alloy) and at least one sacrificial material (e.g. copper) that will be etched away from the structural material after the formation of all layers have been completed. An etchant containing chlorite (e.g. Enthone C-38) is combined with a corrosion inhibitor (e.g. sodium nitrate) to prevent pitting of the structural material during removal of the sacrificial material. A simple process for drying the etched structure without the drying process causing surfaces to stick together includes immersion of the structure in water after etching and then immersion in alcohol and then placing the structure in an oven for drying.
    Type: Application
    Filed: July 24, 2008
    Publication date: February 19, 2009
    Inventor: Gang Zhang
  • Publication number: 20090045067
    Abstract: A method and apparatus are set forth capable of processing a substrate with a high uniformity within the surface area even for a thin feeding layer. The method comprises arranging a counter electrode and the substrate to confront each other; providing a membrane between the counter electrode and the substrate to define a substrate side region and a counter electrode side region. The substrate side region and the counter electrode side region are capable of accommodating respective electrolytes. The substrate side region and the counter electrode side region are supplied with respective electrolytes having different specific resistances. A processing current is also supplied between the substrate and the counter electrode.
    Type: Application
    Filed: September 18, 2008
    Publication date: February 19, 2009
    Inventors: Koji Mishima, Kunihito Ide, Hidenao Suzuki, Kazufumi Nomura, Hiroyuki Kanda
  • Publication number: 20090038948
    Abstract: Multilayer structures are electrochemically fabricated on a temporary (e.g. conductive) substrate and are thereafter bonded to a permanent (e.g. dielectric, patterned, multi-material, or otherwise functional) substrate and removed from the temporary substrate. In some embodiments, the structures are formed from top layer to bottom layer, such that the bottom layer of the structure becomes adhered to the permanent substrate, while in other embodiments the structures are formed from bottom layer to top layer and then a double substrate swap occurs. The permanent substrate may be a solid that is bonded (e.g. by an adhesive) to the layered structure or it may start out as a flowable material that is solidified adjacent to or partially surrounding a portion of the structure with bonding occurring during solidification. The multilayer structure may be released from a sacrificial material prior to attaching the permanent substrate or it may be released after attachment.
    Type: Application
    Filed: August 13, 2008
    Publication date: February 12, 2009
    Inventors: Jeffrey A. Thompson, Adam L. Cohen, Michael S. Lockard, Dennis R. Smalley
  • Publication number: 20090017327
    Abstract: A coated electrically conductive substrate has particular utility where there are multiple closely spaced leads and tin whiskers constitute a potential short circuit. Such substrates include leadframes, terminal pins and circuit traces such as on printed circuit boards and flexible circuits. This electrically conductive substrate has a plurality of leads separated by a distance capable of bridging by a tin whisker, a silver or silver-base alloy layer coating at least one surface of at least one of the plurality of leads, and a fine grain tin or tin-base alloy layer directly coating said silver layer. An alternative coated electrically conductive substrate has particular utility where debris from fretting wear may oxidize and increase electrical resistivity, such an in a connector assembly. This electrically conductive substrate has a barrier layer deposited on the substrate that is effective to inhibit diffusion of constituents the substrate into a plurality of subsequently deposited layers.
    Type: Application
    Filed: June 24, 2008
    Publication date: January 15, 2009
    Inventors: Szuchain F. Chen, Nicole A. Lasiuk, John E. Gerfen, Peter W. Robinson, Abid A. Khan
  • Publication number: 20090015903
    Abstract: Various embodiments of the invention are directed to various microdevices including sensors, actuators, valves, scanning mirrors, accelerometers, switches, and the like. In some embodiments the devices are formed via electrochemical fabrication (EFABĀ®).
    Type: Application
    Filed: April 9, 2008
    Publication date: January 15, 2009
    Inventors: Christopher A. Bang, Adam L. Cohen, Michael S. Lockard, John D. Evans
  • Patent number: 7473328
    Abstract: A composite alloy has a three-dimensional periodic hierarchical structure having hard and soft metallic phases periodically arranged with a period having a length ranging from a nanometer scale to a millimeter scale. It is preferable that the three-dimensional periodic hierarchical structure has an alloy composition sloped microscopically within the period. The three-dimensional periodic hierarchical structure may be formed by periodically arranging rod-like hard and soft metallic phases having a width and a thickness ranging from a nanometer scale to a millimeter scale so that their side surfaces are adjacent to one another.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: January 6, 2009
    Inventors: Tohru Yamasaki, Takayasu Mochizuki
  • Patent number: 7462270
    Abstract: The various embodiments discloses a cantilever probe comprising a first electrode and a second electrode engaged to a substrate and a branched cantilever wherein the cantilever comprises a nanostruture. Furthermore, the probe comprises a first arm of the cantilever engaged to the first electrode and a second arm of the cantilever engaged to the second electrode. Additionally, the cantilever probe comprises an electrical circuit coupled to the cantilever wherein the electrical circuit is capable of measuring a change in piezoresistance of the cantilever resulting from an atomic force and/or a magnetic force applied to the cantilever. Additionally, the invention discloses a method of performing atomic force microscopy, magnetic force microscopy, or magnetic resonance force microscopy. The nanostructures may comprise carbon or non-carbon materials. Additionally, the nanostructures may include nanotubes, nanowire, nanofibers and various other types of nanostructures.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: December 9, 2008
    Assignee: The Trustees of Boston College
    Inventor: Michael J. Naughton
  • Patent number: 7459198
    Abstract: An electroplated film is deposited over a substrate with a plating frame pattern that includes a plating field defined by a plurality of individual features. By dividing the plating field into a plurality of individual features, the delamination force at any location on the plating field is greatly reduced. Thus, a film with a large stress, such as a high moment film, may be plated to a greater thickness than is possible with conventionally plated films.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: December 2, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Christian R. Bonhote, Heather K. DeSimone, John W. Lam, Matthew W. Last, Edward Hin Pong Lee, Ian R. McFadyen
  • Patent number: 7449098
    Abstract: A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: November 11, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Jonathan D. Reid, Mark L. Rea, Ismail T. Emesh, Henner W. Meinhold, John S. Drewery
  • Publication number: 20080272004
    Abstract: For the production of an aluminum diffusion coating for oxidation protection of metallic components, components are masked in areas not to be coated, and unmasked areas are electrically-plated with aluminum in an aprotic solution at low temperature. Upon removal of the masking material, the components are heat-treated according to a certain high-temperature-time graph such that aluminum elements diffuse into the component alloy and alloy elements of the component diffuse into the aluminum coating. The method involves low manufacturing and material costs and guarantees a defined formation of the aluminum diffusion coating on the component portions to be protected.
    Type: Application
    Filed: February 15, 2008
    Publication date: November 6, 2008
    Inventor: Dan Roth-Fagaraseanu
  • Publication number: 20080268280
    Abstract: Disclosed herein is a method of preparing a low resistance metal line, in which a wet plating technique is used instead of a vacuum film forming process in order to simplify the process and decrease the manufacturing cost. In addition, a self-assembled monolayer is formed that facilitates the increased adsorption density and strength of the metal catalyst resulting in the formation of a high-density metal catalyst layer, thereby obtaining a high-quality metal line. Also disclosed herein, are a patterned metal line structure, and a display device using the same.
    Type: Application
    Filed: January 23, 2008
    Publication date: October 30, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Hen CHO, Ki Yong SONG, Sang Eun PARK
  • Publication number: 20080257741
    Abstract: A metal hand tool is fabricated by a method to manufacture the metal hand tool, and the metal hand tool has a body with an outer surface and a preparing region, a printing layer with a mark and an electroplate layer. The method has a forming step, a printing step and an electroplating step. In the preparing step, the body is made of metal. In the printing step, the printing layer is printed on the preparing region in the outer surface of the body and the mark is enchased on the printing layer with an external surface. In the electroplating step, the electroplate layer is electroplated on the external surface of the mark and the outer surface of the body except the preparing region with the printing layer to complete the metal hand tool.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Inventor: Chiu-Yuea Hung
  • Patent number: 7435324
    Abstract: A method of selectively electroplating metal features on a semiconductor substrate having a conductive surface. An electrode assembly that includes a plurality of adjacent, mutually spaced and electrically isolated electrodes connected in series so as to be oppositely polarized when a voltage is applied thereacross is positioned over the substrate and an electrolyte solution is applied to the conductive surface. The electrode assembly and the conductive surface may be positioned in close proximity to, but without contacting, one another. A voltage is applied to the electrode assembly, which causes a metal film to selectively form on portions of the conductive surface that are positioned beneath an electrode exhibiting a positive polarity and, thus, negatively charged. Portions of the conductive surface positioned beneath electrodes exhibiting a negative polarity remain unplated.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 14, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Suresh Ramarajan, Whonchee Lee
  • Patent number: 7431817
    Abstract: The invention relates to an electrolyte used in connection with the deposition of a gold-tin alloy on an electroplatable substrate. This solution generally includes water; stannous and/or stannic tin ions, a complexing agent to render the stannous and/or stannic tin ions soluble, complexed gold ions, and an alloy stabilizing agent that includes ethoxylated compounds with phosphate ester functional group, brightening additives based on ethoxylated phosphate esters and alkali metal fatty acids dipropionates. The brighteners may be used alone or in conjunction with each other to achieve beneficial synergistic effect. The alloy stabilizing agent is present in an amount sufficient to stabilize the composition of the gold-tin deposit over a usable current density range. The solution has a pH of between 2 and 10 and the gold ions and tin ions are present in relative amounts sufficient to provide a deposit having a gold content less than 90% by weight and a tin content greater than 10% by weight.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: October 7, 2008
    Assignee: Technic, Inc.
    Inventors: Hana Hradil, George Hradil, Edward Hradil
  • Publication number: 20080241123
    Abstract: A micelle formable from at least one nanotube in a process of self-assembly, the nanotube comprising an amphophilic nanotube (2, 8, 14) made from one or more species selected from the group of carbon, silicon, a noble metal, silicon dioxide and titanium dioxide. A part of the nanotube (2, 8, 14) is functionalised and a surfactant molecule or emulsifying agent is attached to the functionalised part. The nanotube (2, 8, 14) may have magnetic properties. A therapeutic agent may be incorporated in the micelle. The micelle may be coated to form a capsule (24). The capsule (24) can be introduced to the human or animal body for treatment of tumors or targeted drug delivery when a magnetic field or near-IR radiation is applied.
    Type: Application
    Filed: April 14, 2008
    Publication date: October 2, 2008
    Inventor: Dewan Fazlul Hoque Chowdhury
  • Publication number: 20080230390
    Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 25, 2008
    Inventor: Adam L. Cohen
  • Publication number: 20080230392
    Abstract: Electrochemical Fabrication techniques are used to modify substrates or to form multilayer structures (e.g. components or devices) from a plurality of overlaying and adhered layers. Masks are used to selectively etch or deposit material. Some masks may be of the contact type and may be formed of multiple materials some of which may be support materials, some of which may be mating materials for contacting a substrate and some may be intermediate materials. In some embodiments the contact masks may have conformable contact surfaces (i.e. surfaces with sufficient flexibility or deformability that they can substantially conform to surface of the substrate to form a seal with it) or they may have semi-rigid or even rigid surfaces. In embodiments where masks are used for selective deposition operations, etching operations may be performed after deposition to remove flash deposits (thin undesired deposits from areas that were intended to be masked).
    Type: Application
    Filed: March 25, 2008
    Publication date: September 25, 2008
    Inventors: Adam L. Cohen, Dennis R. Smalley
  • Publication number: 20080230391
    Abstract: Embodiments of the present invention provide mesoscale or microscale three-dimensional structures (e.g. components, device, and the like). Embodiments relate to one or more of (1) the formation of such structures which incorporate sheets of dielectric material and/or wherein seed layer material used to allow electrodeposition over dielectric material is removed via planarization operations; (2) the formation of such structures wherein masks used for at least some selective patterning operations are obtained through transfer plating of masking material to a surface of a substrate or previously formed layer, and/or (3) the formation of such structures wherein masks used for forming at least portions of some layers are patterned on the build surface directly from data representing the mask configuration, e.g. in some embodiments mask patterning is achieved by selectively dispensing material via a computer controlled inkjet nozzle or array or via a computer controlled extrusion device.
    Type: Application
    Filed: October 30, 2007
    Publication date: September 25, 2008
    Inventors: Michael S. Lockard, Dennis R. Smalley, Willa M. Larsen, Richard T. Chen
  • Patent number: 7422696
    Abstract: Multicomponent nanorods having segments with differing electronic and/or chemical properties are disclosed. The nanorods can be tailored with high precision to create controlled gaps within the nanorods or to produce diodes or resistors, based upon the identities of the components-making up the segments of the nanorods. Macrostructural composites of these nanorods also are disclosed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 9, 2008
    Assignee: Northwestern University
    Inventors: Chad A. Mirkin, Lidong Qin, Sungho Park, Ling Huang, Sung-Wook Chung
  • Publication number: 20080210563
    Abstract: Electroplating processes (e.g. conformable contact mask plating and electrochemical fabrication processes) that include in situ activation of a surface onto which a deposit will be made are described. At least one material to be deposited has an effective deposition voltage that is higher than an open circuit voltage, and wherein a deposition control parameter is capable of being set to such a value that a voltage can be controlled to a value between the effective deposition voltage and the open circuit voltage such that no significant deposition occurs but such that surface activation of at least a portion of the substrate can occur. After making electrical contact between an anode, that comprises the at least one material, and the substrate via a plating solution, applying a voltage or current to activate the surface without any significant deposition occurring, and thereafter without breaking the electrical contact, causing deposition to occur.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 4, 2008
    Inventor: Gang Zhang
  • Publication number: 20080199656
    Abstract: Provided are three-dimensional microstructures and their methods of formation. The microstructures are formed by a sequential build process and include microstructural elements which are affixed to one another. The microstructures find use, for example, in coaxial transmission lines for electromagnetic energy.
    Type: Application
    Filed: December 28, 2007
    Publication date: August 21, 2008
    Applicant: Rohm and Haas Electronic Materials LLC
    Inventors: Christopher A. Nichols, Shifang Zhou, William D. Houck
  • Publication number: 20080190775
    Abstract: A method is realized for easily performing, without using a masking tape, an operation to accurately form a coating film 31 only on a coated section (?8) partly formed on the surface of a hub main body 13a. The upper end face of a rubber closed end cylindrical masking cover 32 is elastically pressed against the outside end surface of a cylindrical section 16 forming the hub main body 13a. As a result a border section between the coated section (?8) and the portion adjacent to the coated section (?8) can be made liquid-tight. In this state, coating particles are electrodeposited on the coated section (?8) by bringing a coating liquid 28 discharged from a liquid supply tube 29 into contact with the coated section (?8). By adopting such a method, the problems can be solved.
    Type: Application
    Filed: June 20, 2007
    Publication date: August 14, 2008
    Inventors: Katsuyuki Kawamura, Yoshio Inoue, Satoru Endo, Hiroyuki Okuno
  • Publication number: 20080182100
    Abstract: A magnetic anodized aluminium oxide has a layer of anodized aluminium oxide forming a housing for an array of nanowires of a magnetic material formed in nanopores in the layer of anodized aluminium oxide. The nanowires have their side walls embedded in the nanopores in the layer of anodized aluminium oxide for preventing oxidation of the side walls. A corresponding method is also disclosed.
    Type: Application
    Filed: June 12, 2007
    Publication date: July 31, 2008
    Applicant: SONY CORPORATION
    Inventors: Wei Beng Ng, Hiroyuki Okita
  • Publication number: 20080173386
    Abstract: A method of forming a structure by a material additive process, the method comprising the steps: providing a substrate having a surface, providing an interlayer on the surface which conforms to the surface of the substrate, forming a melt pool in the interlayer, the depth of the melt pool being less than the depth of the interlayer, selectively depositing a material within the melt pool, allowing the material to solidify, and applying heat and pressure to diffusion bond the material to the substrate.
    Type: Application
    Filed: August 10, 2007
    Publication date: July 24, 2008
    Inventor: Daniel Clark
  • Patent number: 7402231
    Abstract: For partially plating work surfaces, a tubular shield member is set around a work which is connected to a cathode, in face to face and in predetermined small gap relation with a non-plating surface or surfaces of a work. In a plating bath, an anode is located on the outer side of the shield member to cover the non-plating surface from the anode. Upon conducting current between the anode and cathode, a metallic coating is deposited specifically and selectively on a work surface or surfaces which are not covered by the shield member.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: July 22, 2008
    Assignee: Nippon Platec Co., Ltd.
    Inventors: Wataru Oikawa, Akira Takumi, Tomonori Zenbayashi
  • Patent number: 7396447
    Abstract: A method, structure and system for forming a through-hole conductor in a semiconductor substrate includes forming a hole having an inner surface from a first side of the semiconductor substrate to a second side of the semiconductor substrate and plating the inner surface of the semiconductor substrate to form a conductive element when a plating solution is forced from the first side of the semiconductor substrate to the second side of the semiconductor substrate through the hole. The hole is plated in a generally planar plating topology from the first side to the second side of the semiconductor substrate. The through-hole conductor may be formed in a plating system where the semiconductor substrate forms at least a partial partition between a higher pressure bath and a lower pressure bath with the plating solution passing through the hole causing plating within the inner surface of the hole.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: July 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: William M. Hiatt
  • Publication number: 20080142368
    Abstract: A tubular resistor assembly for use in electrical circuits for controlling automotive accessories, including a tubular aluminum or other metal substrate having watertight walls and open ends for connection to a fluid-carrying system, a resistor of a predetermined magnitude disposed on the tubular metal substrate. A control circuit, incorporating the resistor, controls the operation of one or more automotive accessory. The assembly may be used to intentionally heat a fluid passing through the tubular substrate, the fluid may be used to carry excess heat away from the resistor, or both. Multiple resistive elements may be included for multiple levels of control of such accessories as headlights, fan assemblies, and the like.
    Type: Application
    Filed: October 29, 2007
    Publication date: June 19, 2008
    Applicant: INTERNATIONAL RESISTIVE COMPANY
    Inventors: H. Marion Warren, Wilson R. Hayworth, M. Shane Hawthorne
  • Publication number: 20080135414
    Abstract: A primer (16) for forming a resin frame (17) is formed on an outer end portion (16p) of a separator (1) of a fuel cell. An electrodeposition coating device (2) includes an upper frame (21) and a lower frame (22), and covers only the outer end portion (16p) of the substrate (11) with a center portion (12) of the substrate (11) left uncovered. When the substrate (11) is sandwiched between the upper frame (21) and the lower frame (22) of the electrodeposition coating device (2), an annular electrodeposition chamber (31) is formed with the outer end portion (16p) of the substrate (11) located in the electrodeposition chamber (31). Then, the electrodeposition chamber (31) is filled with an electrodeposition coating solution (32), and electrodeposition coating is performed. Then, cleaning is performed by using purified water, and drying is performed by using high temperature air.
    Type: Application
    Filed: September 12, 2005
    Publication date: June 12, 2008
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masashi Murate, Takashi Yamada
  • Patent number: 7384531
    Abstract: A method for forming an electrical interconnect on an integrated lead suspension or suspension component of the type formed from a laminated sheet of material having a stainless steel layer, a conductive lead layer and an insulating layer separating the stainless steel and conductive lead layers. An aperture is formed through at least the insulating layer to expose the stainless steel layer at an interconnect site. An interconnect mask is applied around the interconnect site. Conductive material is electroplated onto the stainless steel layer at the interconnect site to form a plated interconnect. The mask is then removed. The method is used to form an interconnect bond pad on the same side of the stainless steel layer as the conductive lead layer in one embodiment.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: June 10, 2008
    Assignee: Hutchinson Technology Incorporated
    Inventors: Andrew J. Peltoma, Peter Lawrence Titus, Kurt C. Swanson
  • Patent number: 7384530
    Abstract: The invention includes methods of fabrication and apparatuses. In at least some embodiments of the applicants' invention, the methods include processes of: maskless selective deposition of non-layered structures, selective etching and/or deposition without use of a separate mask and/or lithography techniques, retaining selected portions of sacrificial material during removal (e.g. etching) of other portions of sacrificial material, depositing materials other than the structural and sacrificial materials, including more than one type of structural and/or sacrificial material, and fabrication of interlacing elements. Embodiments of the methods of the invention provide increased capabilities, properties, flexibility and in the fabrication of three-dimensional structures by electro-deposition or other techniques.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: June 10, 2008
    Assignee: Microfabrica Inc.
    Inventors: Adam L. Cohen, Dennis R. Smalley
  • Patent number: 7375014
    Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: May 20, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Dale W. Collins, Richard H. Lane, Rita J. Klein
  • Patent number: 7368045
    Abstract: A method is provided for electroplating a gate metal or other conducting or semiconducting material directly on a dielectric such as a gate dielectric. The method involves selecting a substrate, dielectric layer, and electrolyte solution or melt, wherein the combination of the substrate, dielectric layer, and electrolyte solution or melt allow an electrochemical current to be passed from the substrate through the dielectric layer into the electrolyte solution or melt. Methods are also provided for electrochemical modification of dielectrics utilizing through-dielectric current flow.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: May 6, 2008
    Assignee: International Business Machines Corporation
    Inventors: Philippe M. Vereecken, Veeraraghavan S. Basker, Cyril Cabral, Jr., Emanuel I. Cooper, Hariklia Deligianni, Martin M. Frank, Rajarao Jammy, Vamsi Krishna Paruchuri, Katherine L. Saenger, Xiaoyan Shao
  • Patent number: 7368044
    Abstract: Electrochemical Fabrication techniques are used to modify substrates or to form multilayer structures (e.g. components or devices) from a plurality of overlaying and adhered layers. Masks are used to selectively etch or deposit material. Some masks may be of the contact type and may be formed of multiple materials some of which may be support materials, some of which may be mating materials for contacting a substrate and some may be intermediate materials. In some embodiments the contact masks may have conformable contact surfaces (i.e. surfaces with sufficient flexibility or deformability that they can substantially conform to surface of the substrate to form a seal with it) or they may have semi-rigid or even rigid surfaces. In embodiments where masks are used for selective deposition operations, etching operations may be performed after deposition to remove flash deposits (thin undesired deposits from areas that were intended to be masked).
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: May 6, 2008
    Assignee: Microfabrica, Inc.
    Inventors: Adam L. Cohen, Dennis R. Smalley
  • Patent number: 7364649
    Abstract: According to a method of producing a key top for a pushbutton switch of the present invention, a base layer made of an insulating resin that can be plated with metal, an electroless plating layer to be formed on the surface of the base layer, and a polymer coating layer, if required, are stacked on the surface of a key top body. Alternatively, an electroplating layer formed by electroplating is further formed on the electroless plating layer. Therefore, a plating layer can be directly and easily formed on the insulating resin, whereby a key top for a pushbutton switch having a sensation of metal and being rich in design is obtained.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: April 29, 2008
    Assignee: Polymatech Co., Ltd.
    Inventors: Tedi Kunthady, Atsushi Hikita
  • Patent number: 7351321
    Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: April 1, 2008
    Assignee: Microfabrica, Inc.
    Inventor: Adam L. Cohen
  • Patent number: 7351448
    Abstract: An apparatus and process for coating surfaces of metal or metallic components including providing at least one metal having a patterned outer surface exhibiting an optical reflection greater than about 40%, providing at least one anti-reflective coating material, the anti-reflective coating material(s) including effective amount of electrically conductive light scattering and/or wavelength absorbent properties, and depositing the anti-reflective coating material(s) onto the patterned outer surface(s) of each metal, wherein the anti-reflective coating material(s) conforms to the desired patterned outer surface(s) of each metal. In another embodiment, a coated metal component includes at least one metal having a patterned outer surface(s); and, a coating of at least one antireflective material deposited on the metal patterned outer surface by deposition, wherein the antireflective coating material(s) including effective amount of electrically conductive light scattering and/or wavelength absorbent properties.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: April 1, 2008
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: David J. Irvin, Andrew Guenthner, Nicholas Prokopuk
  • Patent number: 7338613
    Abstract: An automated process for microcontact printing is provided, comprising the steps of providing a substrate and a stamp; automatically aligning the substrate and stamp so that the stamp is aligned relative to the substrate to impart a pattern to the substrate at a desired location and with a desired orientation on the substrate; applying an ink to the stamp, the ink including a molecular species adapted to form a self-assembling monolayer (SAM) on the substrate; contacting the stamp and the substrate; and separating the stamp from the substrate.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: March 4, 2008
    Assignee: Surface Logix, Inc.
    Inventors: Olivier J. A. Schueller, Amar Kendale
  • Patent number: 7338585
    Abstract: A method comprising forming an interconnection opening through a dielectric material to a contact point; and electroplating a interconnection comprising copper in the contact opening using an electroplating bath comprising an alkoxylated sulfopropylated alkylamine. A method comprising forming an interconnection opening through a dielectric material to a contact point; lining the interconnection opening with a barrier layer and a seed layer; and electroplating an interconnection comprising copper in the contact opening using an electroplating bath comprising an alkoxylated sulfopropylated alkylamine.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: March 4, 2008
    Assignee: Intel Corporation
    Inventors: Rohan N. Akolkar, Valery M. Dubin
  • Publication number: 20080041727
    Abstract: Electric potential, current density, and deposition rate are controlled to deposit metal alloys, such as tin based solder alloys or magnetic alloys, with minimal variations in the weight ratios of alloying metals at different locations within the deposited metal alloy feature. Alternative embodiments include processes that form metal alloy features wherein the variation in weight ratio of alloying metals within the feature is not necessarily minimized, but is controlled to provide a desired variation.
    Type: Application
    Filed: August 18, 2006
    Publication date: February 21, 2008
    Applicant: Semitool, Inc.
    Inventors: Bioh Kim, Marvin Bernt, Greg Wilson, Paul R. McHugh
  • Patent number: 7326327
    Abstract: A halide based stress reducing agent is added to the bath of a rhodium plating solution. The stress reducing agent reduces stress in the plated rhodium, increasing the thickness of the rhodium that can be plated without cracking. In addition, the stress reducing agent does not appreciably decrease the wear resistance or hardness of the plated rhodium.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: February 5, 2008
    Assignee: FormFactor, Inc.
    Inventors: Michael Armstrong, Gayle Herman, Greg Omweg, Ravindra V. Shenoy
  • Patent number: 7326328
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: February 5, 2008
    Assignee: General Electric Company
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Publication number: 20080011610
    Abstract: Electrolytic plating can be carried out with a uniform thickness even when the resistance of a plating seed layer is comparatively high, thereby improving the formation precision of products and improving the yield of products. In a method of carrying out plating on a substrate, an insulating layer, which includes conductive parts that conduct electricity to the substrate, is formed on the substrate that is made of a resistor, a plating seed layer, which conducts electricity to the substrate via the conductive parts, is formed on the insulating layer, and a plating film is formed on the plating seed layer with the plating seed layer as a power supply layer.
    Type: Application
    Filed: October 24, 2006
    Publication date: January 17, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Masaya Katou, Mutsuo Yoshinami, Yasunori Kouchi, Mamoru Tsuruta