On Flat Or Curved Insulated Base, E.g., Printed Circuit, Etc. Patents (Class 29/829)
  • Publication number: 20140133111
    Abstract: A method for manufacturing a combined wiring board includes providing a metal frame having an accommodation opening portion, positioning a wiring board in the accommodation opening portion of the metal frame, and subjecting the metal frame to plastic deformation such that a sidewall of the wiring board is connected to a sidewall of the metal frame inside the accommodation opening portion of the metal frame.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 15, 2014
    Applicant: IBIDEN CO., LTD.
    Inventors: Teruyuki ISHIHARA, Michimasa TAKAHASHI
  • Patent number: 8720048
    Abstract: A method of manufacturing a printed circuit board includes arranging a core layer in which a bending prevention portion of at least two layers that are metal layers having different thermal expansion coefficients is disposed between a plurality of insulating members; forming a circuit pattern so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and forming an insulating layer including an opening portion that exposes the circuit pattern on the core layer.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: May 13, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Mi Sun Hwang, Jae Joon Lee, Myung Sam Kang
  • Patent number: 8720051
    Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a portion of the metallic structure for each component area to be shielded is then exposed through the body by a cutting, drilling, or like operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed portion of the metallic structures.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 13, 2014
    Assignee: RF Micro Devices, Inc.
    Inventors: Donald Joseph Leahy, Waite R. Warren, Jr., Stephen Parker
  • Patent number: 8720049
    Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: May 13, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd
    Inventors: Tae Kyun Bae, Chang Gun Oh, Ho Sik Park
  • Patent number: 8720053
    Abstract: A process for fabricating a circuit board that includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: May 13, 2014
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Kun-Ching Chen, Ming-Loung Lu, Chun-Che Lee
  • Patent number: 8724334
    Abstract: A circuit module and a manufacturing method for the same, reduce a possibility that a defect area where an electrically conductive resin is not coated may occur in a shield layer. A mother board is prepared. A plurality of electronic components are mounted on a principal surface of the mother board. An insulator layer is arranged so as to cover the principal surface of the mother board and the electronic components. The insulator layer is cut such that grooves and projections are formed in and on the principal surface of the insulator layer and the insulator layer has a predetermined thickness H. An electrically conductive resin is coated on the principal surface of the insulator layer to form a shield layer. The mother board including the insulator layer and the shield layer both formed thereon is divided to obtain a plurality of circuit modules.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 13, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hiroshi Nishikawa, Makoto Fujita, Fumikiyo Kawahara
  • Publication number: 20140124254
    Abstract: Embodiments of the present invention provide a packaging system, which generally includes a substrate, a first electrical conductive pad and a second electrical conductive pad formed on a top surface of the substrate, and a mask section formed on the top surface of the substrate and disposed between the first electrical conductive pad and the second electrical conductive pad. The packaging system further includes a passive component mounted onto a top surface of the mask section, wherein a portion of a back surface of the passive component is in physical contact with the first electrical conductive pad and the second electrical conductive pad, respectively.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Leilei ZHANG, Ron Boja, Abraham F. YEE, Zuhair BOKHAREY
  • Publication number: 20140123486
    Abstract: A method of processing a cavity of a core substrate is disclosed. The method of processing a cavity of a core substrate in accordance with an embodiment of the present invention can include: forming a first processing area on one surface of a core substrate, the first processing area being demarcated by a circuit pattern; forming a second processing area on the other surface of the core substrate, the second processing area being demarcated by a circuit pattern; and processing a cavity by removing the entire first processing area from the one surface of the core substrate.
    Type: Application
    Filed: January 9, 2014
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Soo JEONG, Doo-Hwan LEE, Hwa-Sun PARK, Jae-Kul LEE, Yul-Kyo CHUNG
  • Publication number: 20140126034
    Abstract: In the method of manufacturing a micro structure including a membrane in a first substrate, a movable portion, a movable comb electrode, a suppressing unit, a support portion, and a fixed comb electrode are formed, and the movable portion of the first substrate and a second substrate are bonded. Then, the bonded second substrate is processed to form a membrane such as a reflecting portion. The movable comb electrode is supported by the movable portion and extends in a direction parallel to the membrane surface. The suppressing unit suppresses displacement of the movable comb electrode and the movable portion in a direction other than a direction normal to the membrane surface. The fixed comb electrode is supported by the support portion and extends in the direction parallel to the membrane surface. The fixed comb electrode is alternately arranged with respect to the movable comb electrode with a gap therebetween.
    Type: Application
    Filed: October 29, 2013
    Publication date: May 8, 2014
    Applicant: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Ozaki, Yasuhiro Shimada, Koichiro Nakanishi, Akira Shimazu, Kenji Tamamori
  • Patent number: 8715438
    Abstract: A computing device includes a touchpad having a plurality of internal diaphragms that allow the touchpad to sense downward force inputs. The diaphragms are evenly glued about their circumferential edge portions to an internal flat surface by way of a gimbal press. The gimbal press can include a force delivery component coupled to an upper plate having an internal depression, a lower plate having a ball bearing that accepts force from the upper plate via the internal depression, a flexible ring member, and a compliant annular component. Both plates have a plurality of interlocking features with grooves extending therethrough that accept the flexible ring member. Force is evenly distributed to the diaphragm via a gimbal effect at the ball bearing, and the flexible ring member centers the upper and lower plates with respect to each other while permitting some relative tilt and rotation between the plates.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: May 6, 2014
    Assignee: Apple Inc.
    Inventor: Patrick Kessler
  • Patent number: 8713792
    Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: May 6, 2014
    Assignee: Fujitsu Limited
    Inventors: Taiji Sakai, Seiki Sakuyama
  • Publication number: 20140115884
    Abstract: An electro-optic display is produced using a sub-assembly comprising a front sheet, an electro-optic medium; and an adhesive layer. An aperture is formed through the adhesive layer where the adhesive layer is not covered by the electro-optic medium, and the sub-assembly is adhered to a backplane having a co-operating member with the aperture engaged with a co-operating member, thus locating the sub-assembly relative to the backplane. In another form of electro-optic display, a chip extends through an aperture in the electro-optic medium and adhesive layer. In a third form, the aforementioned sub-assembly is secured to a backplane and then a cut is made through both backplane and sub-assembly to provide an aligned edge.
    Type: Application
    Filed: December 24, 2013
    Publication date: May 1, 2014
    Applicants: POLYMER VISION LTD., E INK CORPORATION
    Inventors: Guy M. Danner, Valerie C. Northrup, Jonathan D. Albert, Holly G. Gates, Erik van Veenendaal, Fredericus J. Touwslager
  • Publication number: 20140118974
    Abstract: A trench (20) is introduced into a carrier (10) for electrical components (30) on a first surface (O10a) of the carrier into the material of the carrier (10). The carrier (10) is cut through by a cut (60) being introduced into the material of the carrier from a second surface (O10b) of the carrier (10), said second surface being situated opposite the first surface. The cut is implemented in such a way that the cut (60) runs through the trench (20) on the first surface (O10a) of the carrier. By providing a trench (20) in the material layers of the carrier (10) which are near the surface, it is possible to prevent material from breaking out of the carrier during the singulation of devices (1, 2).
    Type: Application
    Filed: April 17, 2012
    Publication date: May 1, 2014
    Applicant: AMS AG
    Inventor: Bernhard Stering
  • Publication number: 20140115885
    Abstract: Polymer materials are useful as electrode array bodies for neural stimulation. They are particularly useful for retinal stimulation to create artificial vision, cochlear stimulation to create artificial hearing, or cortical stimulation many purposes. The pressure applied against the retina, or other neural tissue, by an electrode array is critical. Too little pressure causes increased electrical resistance, along with electric field dispersion. Too much pressure may block blood flow. Common flexible circuit fabrication techniques generally require that a flexible circuit electrode array be made flat. Since neural tissue is almost never flat, a flat array will necessarily apply uneven pressure. Further, the edges of a flexible circuit polymer array may be sharp and cut the delicate neural tissue. By applying the right amount of heat to a completed array, a curve can be induced.
    Type: Application
    Filed: January 2, 2014
    Publication date: May 1, 2014
    Inventors: Robert Greenberg, Neil Hamilton Talbot, Jordan Matthew Neysmith, James S. Little, Brian V. Mech, Mark S. Humayun, Dilek Guven, Anne Marie Ripley
  • Patent number: 8707551
    Abstract: This invention is directed to bendable circuit substrate structures useful for LED mounting and interconnection.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: April 29, 2014
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: Daniel I. Amey, Deborah R. Gravely, Michael J. Green, Steven H. White
  • Publication number: 20140112628
    Abstract: Fiber optic cable sub-assemblies having a fiber optic cable including at least one optical fiber attached to a circuit board are disclosed. The circuit board includes an active optical component in operable communication with the optical fiber for forming an active optical cable (AOC) assembly. A strain relief device attaches an end portion of the fiber optic cable to the circuit board, thereby forming the cable sub-assembly. Methods of assembling the fiber optic cable sub-assembly are also disclosed and include the step of attaching an end portion of the fiber optic cable to the circuit board.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Inventors: John Austin Keenum, Brett Allen Menke, Edward Joseph Reed, Rodger Alan Tenholder, Gary Richard Trott
  • Publication number: 20140111949
    Abstract: Embodiments of the present invention disclose a method for manufacturing a circuit board, and a circuit board. The method includes: separately fixing at least two function modules and a shielding frame on a circuit board, where the shielding frame is located between the at least two function modules; packaging the at least two function modules and the shielding frame by using a plastic package material; cutting the plastic package material corresponding to the top of the shielding frame to a surface of the shielding frame; and covering an outside of the plastic package material and an top part of the shielding frame with a conducting material, and covering a surface of the conducting material with an insulation material. In the embodiments, the cutting height is decreased, the processing time is short, and good manufacturability is provided.
    Type: Application
    Filed: December 23, 2013
    Publication date: April 24, 2014
    Applicant: Huawei Device Co., Ltd.
    Inventor: CHUNYU GAO
  • Publication number: 20140111926
    Abstract: Methods, tools and fixtures for assembling a printed circuit board (PCB), such as a main logic board (MLB), in a portable computer device are described. A connector assembly having an electrically conductive gasket mounted on an edge of the MLB is described. In addition, a keyboard assembly including a notched portion of the MLB for accommodating more than one type of keyboard is described. In addition, a PCB assembly having a bracket to support a weak region of the PCB during assembly is described. In addition, a method for shielding an antenna cable situated on an MLB is described.
    Type: Application
    Filed: April 2, 2013
    Publication date: April 24, 2014
    Applicant: Apple Inc.
    Inventors: Gavin J. Reid, Joss N. Giddings, William F. Leggett, Thomas R. Tate, Gary S. Thomason
  • Publication number: 20140104807
    Abstract: A very small form factor consumer electronic product includes at least a single piece housing having an integral front and side walls that cooperate to form a cavity in cooperation with a front opening where an edge of the side walls define a rear opening and at least some of the edges have flanges. The consumer electronic product also includes an user input assembly having a size and shape in accordance with the front opening and a clip assembly having a size and shape in accordance with the rear opening and having an external user actionable clip, a plurality of internal hooking features, and a plurality of internal latching features. The clip assembly is secured by engaging at least some of the hooking features and the flanges on the edges of the housing and engaging the latching features and corresponding attachment features on the internal support plate.
    Type: Application
    Filed: December 20, 2013
    Publication date: April 17, 2014
    Applicant: Apple Inc.
    Inventors: Teodor DABOV, Kyle YEATES, Anthony MONTEVIRGEN
  • Publication number: 20140103778
    Abstract: A MEMS vibrator includes a wafer substrate, a fixed lower electrode (first electrode) disposed on a principal surface of the wafer substrate, a support member whose one end is fixed to the wafer substrate, and a movable upper electrode (second electrode) joined to the other end of the support member and having a region overlapping the fixed lower electrode with a gap. The support member has a reinforcing region where the thickness of the support member in a thickness direction of the wafer substrate is larger than the thickness of the movable upper electrode in the thickness direction of the wafer substrate.
    Type: Application
    Filed: October 7, 2013
    Publication date: April 17, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Shogo INABA, Masahiro FUJII
  • Publication number: 20140101934
    Abstract: A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 17, 2014
    Applicant: Nitto Denko Corporation
    Inventors: Jun ISHII, Terukazu IHARA, Naohiro TERADA
  • Patent number: 8698003
    Abstract: One aspect of the present invention resides in a method of producing a circuit board, including a film-forming step of forming a resin film on a surface of an insulative substrate; a circuit pattern-forming step of forming a circuit pattern portion by forming a recessed portion having a depth equal to or greater than a thickness of the resin film, with an outer surface of the resin film serving as a reference; a catalyst-depositing step of depositing a plating catalyst or a precursor thereof on a surface of the circuit pattern portion and a surface of the resin film; a film-separating step of removing the resin film from the insulative substrate; and a plating step of forming an electroless plating film only in a region where the plating catalyst or the precursor thereof remains after the resin film is separated.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: April 15, 2014
    Assignee: Panasonic Corporation
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara
  • Patent number: 8698002
    Abstract: A Cu—Sn layer and an Sn-based surface layer are formed in this order on the surface of a Cu-based substrate through an Ni-based base layer, and the Cu—Sn layer is composed of a Cu3Sn layer arranged on the Ni-based base layer and a Cu6Sn5 layer arranged on the Cu3Sn layer; the Cu—Sn layer obtained by bonding the Cu3Sn layer and the Cu6Sn5 layer is provided with recessed and projected portions on the surface which is in contact with the Sn-based surface layer; thicknesses of the recessed portions are set to 0.05 ?m to 1.5 ?m, the area coverage of the Cu3Sn layer with respect to the Ni-based base layer is 60% or higher, the ratio of the thicknesses of the projected portions to the thicknesses of the recessed portions in the Cu—Sn layer is 1.2 to 5, and the average thickness of the Cu3Sn layer is 0.01 ?m to 0.5 ?m.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: April 15, 2014
    Assignee: Mitsubishi Shindoh Co., Ltd.
    Inventors: Takeshi Sakurai, Seiichi Ishikawa, Kenji Kubota, Takashi Tamagawa
  • Patent number: 8693081
    Abstract: A device and method of making and using the same. The device includes first and second substrates that are spaced to define a fluid space. Polar and non-polar fluids occupy the fluid space. A first electrode, with a dielectric layer, is positioned on the first substrate and electrically coupled to at least one voltage source, which is configured to supply an electrical bias to the first electrode. The fluid space includes at least one fluid splitting structure that is configured to facilitate the movement of the non-polar fluid into a portion of the polar fluid. Fluid splitting structure assisted movement of the non-polar fluid splits the polar fluid.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: April 8, 2014
    Assignee: University of Cincinnati
    Inventors: Jason Heikenfeld, Matthew Hagedon, Kenneth Dean Andrew
  • Patent number: 8692129
    Abstract: A printed wiring board includes an interlayer insulation layer, first pads positioned to mount a semiconductor element and forming a first pad group on the insulation layer, second pads forming a second pad group on the insulation layer and positioned along a peripheral portion of the first group, a first solder-resist layer formed on the insulation layer and having first openings exposing the first pads, respectively, and second openings exposing the second pads, respectively, conductive posts formed on the second pads through the second openings of the first solder-resist layer, respectively, and a second solder-resist layer formed on the first solder-resist layer and having a third opening exposing the first pads and fourth openings exposing surfaces of the posts, respectively. The second openings have a diameter greater than a diameter of the posts, and the second solder-resist layer is filling gaps formed between the second openings and the posts.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: April 8, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Toshiaki Kasai, Takema Adachi
  • Patent number: 8693209
    Abstract: A wiring board includes a substrate having an opening portion, multiple electronic devices positioned in the opening portion, and an insulation layer formed on the substrate such that the insulation layer covers the electronic devices in the opening portion of the substrate. The substrate has a wall surface defining the opening portion and formed such that the opening portion is partially partitioned and the electronic devices are kept from making contact with each other.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 8, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yukinobu Mikado, Mitsuhiro Tomikawa, Yusuke Tanaka, Toshiki Furutani
  • Patent number: 8689437
    Abstract: A method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: April 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, David Hirsch Danovitch, Mario John Interrante, John Ulrich Knickerbocker, Michael Jay Shapiro, Van Thanh Truong
  • Publication number: 20140092564
    Abstract: An electronic apparatus including a housing, a motherboard, a battery module and a display module is provided. The housing has at least an opening and an accommodating space. The motherboard is disposed in the accommodating space. The battery module is disposed in the accommodating space and stacked over the motherboard. The motherboard is located between the housing and the battery module. The display module is disposed in the accommodating space and stacked over the battery module. The battery module is located between the motherboard and the display module. At least one edge of the battery module in a width direction of the battery module is closer to a corresponding side of the housing than a corresponding edge of the motherboard in a width direction of the motherboard.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: HTC CORPORATION
    Inventors: I-Cheng Chuang, Yu-Jing Liao, Ying-Yen Cheng, Yin-Chou Chen
  • Publication number: 20140092547
    Abstract: In one embodiment, a biasing device is actuated using an actuator which is aligned with the biasing device along an alignment axis. A first frame is thereby biased toward a second frame along the alignment axis to bias an integrated circuit package toward a socket. The actuator also latches the first and second frames together and biased towards each other with the integrated circuit package and the socket biased toward each other. Other aspects and features are also described.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Thomas A. BOYD, Michael Z. ECKBLAD
  • Publication number: 20140086525
    Abstract: An optical unit in which an optical part having an optical element is mounted on a base having an optical waveguide includes a hydrophobic first area formed in a region including an optical axis of the optical part, a hydrophobic second area formed in a region facing the first area on a surface of the base, and a hydrophilic filler which fills peripheries of the first area and the second area between the optical part and the base.
    Type: Application
    Filed: July 29, 2013
    Publication date: March 27, 2014
    Applicant: FUJITSU LIMITED
    Inventors: TAKATOYO YAMAKAMI, TAKASHI KUBOTA, Masayuki KITAJIMA
  • Publication number: 20140083182
    Abstract: A condensate sensing device to generate a condensate signal when condensate within a condensate collector reaches a predetermined level comprising a hollow shell and overmold integrally formed to form a water tight enclosure to operatively house a signal generator including electronic components to selectively generate the condensate signal when the condensate within the predetermined level reaches the predetermined level to control the operation of equipment and/or energize an alarm.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Inventor: Christopher Cantolino
  • Patent number: 8677617
    Abstract: A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending from the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: March 25, 2014
    Assignee: International Business Machines Corporation
    Inventor: Brian Samuel Beaman
  • Patent number: 8673391
    Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: March 18, 2014
    Assignee: Intel Corporation
    Inventors: David Shykind, James A. McCall
  • Publication number: 20140072757
    Abstract: The invention relates to a component with filament connection, in particular for communication, in particular for optical communication comprising: a voluminous material, a substrate, a filament and a connection component applied on the filament, where the filament has been embedded in the substrate and, at a transition point, emerges from the substrate and proceeds into the voluminous material. According to the invention, the voluminous material directly encloses the filament from the transition point and directly encloses the connection component applied on the filament and has full-area inseparable bonding to the substrate, where the voluminous material is a fully crosslinked voluminous material formed from a pliable material and the substrate has been hardened.
    Type: Application
    Filed: September 10, 2013
    Publication date: March 13, 2014
    Inventors: Katrin Wyrwich, Oliver Schwarzhaupt, Dominik Laveuve
  • Patent number: 8667674
    Abstract: A bipolar electrode assembly includes a substrate having proximal and distal ends and supports first electrode and second electrodes. The first and second electrodes are disposed in an interwoven configuration across the surface of the substrate from the proximal to distal ends. A cooling medium is disposed interposed between the first and second electrodes from the proximal to distal ends. The first and second electrodes each include a plurality of finger-like prongs which either extend lengthwise or transversely or the first and second electrodes extend spiral inwardly along the surface of the substrate. The prongs of the first electrode intermesh with the prongs of the second electrode. Each prong is separated by the cooling medium. First and second electrodes may be disposed in a lengthwise alternating configuration across the surface of the substrate with a cooling medium disposed in vertical registration thereunder.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: March 11, 2014
    Assignee: Covidien LP
    Inventor: Steven P. Buysse
  • Patent number: 8667675
    Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: March 11, 2014
    Assignee: Sanmina Sci Corporation
    Inventor: George Dudnikov, Jr.
  • Publication number: 20140063804
    Abstract: Modular multichannel light sources connector systems and methods are provided. A lighting assembly includes substrates, each with a respective plurality of ports and conductive path configurations. Each path configuration includes a plurality of conductive paths between the respective plurality of ports. At least two conductive path configurations are the same. A connector couples one of a plurality of first ports on a first substrate to one of a plurality of second ports on a second substrate. A multichannel power supply's outputs are each coupled to an associated conductive path on the first substrate. A first light source is coupled to two conductive paths on the first substrate, and to a first output. A second light source is coupled to two conductive paths on the second substrate, corresponding to the conductive paths on the first substrate, and to a second output, different from the first output.
    Type: Application
    Filed: June 24, 2013
    Publication date: March 6, 2014
    Applicant: OSRAM SYLVANIA INC.
    Inventors: Nicholas Lekatsas, Biju Antony, David Lidrbauch
  • Publication number: 20140060898
    Abstract: A printed wiring board (PWB) can be fabricated with enhanced thermal characteristics that can enable the use of higher performance electronic components and/or a smaller packaging configuration. A substrate layer of the PWB includes a matrix material and optional reinforcing fibers embedded in the matrix material. The matrix material and/or the reinforcing fibers may include thermally-conductive particles such as nanodiamonds that increase the thermal conductivity of the substrate layer. Holes may be formed through the substrate layer for receiving and/or electrically connecting electronic components. The thermally-conductive particles are sized sufficiently small to allow the formation of the holes through the substrate layer using conventional equipment and processes such as drilling. The PWB may also include a protective coating that comprises thermally-conductive particles.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 6, 2014
    Applicant: Lockheed Martin Corporation
    Inventors: David Findley, Robert James Hill
  • Publication number: 20140063760
    Abstract: An electronic device includes: a case; a first board that includes a first connector; a positioning section that positions the first board with respect to the case; a second board that includes a second connector; a guide rail that has an end portion on the first board side formed with a fitting port into which the first connector fits, and that guides the second connector towards the first connector that is fitted into the fitting port; a pair of sloping portions formed to edge portions on both guide rail pivot direction sides of the fitting port; and a pair of stoppers respectively disposed at each of the guide rail pivot direction sides so as to restrict the pivot range of the guide rail such that the first connector is insertable between the pair of sloping portions.
    Type: Application
    Filed: May 31, 2013
    Publication date: March 6, 2014
    Inventor: Shohei Hashimoto
  • Publication number: 20140063794
    Abstract: Curved printed circuit boards, light modules, and methods for curving a printed circuit board are disclosed. An example light module includes a curved printed circuit board having electrical connections and a plurality of light sources attached to the curved printed circuit board and electrically coupled to the electrical connections. A power supply is electrically coupled to the plurality of light sources through the electrical connections of the curved printed circuit board and is configured to provide power to the plurality of light sources. An example method for curving a printed circuit board includes forming a plurality of cuts on a substantially flat printed circuit board substrate and bending the printed circuit board substrate to form a curved printed circuit board.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: Foshan Innovative Lighting Co., Ltd.
    Inventor: Esmail Khalid Parekh
  • Publication number: 20140060907
    Abstract: A method includes providing an electronic assembly, where the electronic assembly has at least one electrical connection that includes at least a surface that is substantially pure tin metal and the pure tin metal has tin whiskers formed thereon and the pure tin metal has a thickness. The method includes exposing the tin metal to at least one mitigating agent selected to interact with the tin metal to oxidize the tin whiskers and mechanically removing substantially all the oxidized tin whiskers from the electronic assembly. The electronic assembly is exposed to the mitigating agent under appropriate conditions to oxidize the tin whiskers.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Applicant: International Business Machines Corporation
    Inventor: Eric V. Kline
  • Patent number: 8664044
    Abstract: A fan-out wafer level package is provided with a semiconductor die embedded in a reconstituted wafer. A redistribution layer is positioned over the semiconductor die, and includes a land grid array on a face of the package. A copper heat spreader is formed in the redistribution layer over the die in a same layer as a plurality of electrical traces configured to couple circuit pads of the semiconductor die to respective contact lands of the land grid array. In operation, the heat spreader improves efficiency of heat transfer from the die to the circuit board.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 4, 2014
    Assignees: STMicroelectronics Pte Ltd., STMicroelectronics Grenoble 2 SAS
    Inventors: Yonggang Jin, Romain Coffy, Jerome Teysseyre
  • Patent number: 8661659
    Abstract: Provided is a method of producing a circuit board that can stably provide normal circuit boards by preventing the solder detachment and the generation of needle-like crystals during the formation of solder bumps. The method of producing a circuit board includes steps of forming an adhesive layer by applying an adhesiveness-imparting compound to the surface of a terminal of the circuit board; attaching solder particles onto the adhesive layer; applying an activator that includes a hydrohalic acid salt of an organic base to the solder particles and fixing the solder particles by heating the circuit board to which the solder particles have been attached at a temperature equal to or lower than the melting point of the solder; applying a flux to the circuit board to which the solder particles have been fixed; and melting the solder particles by heating the circuit board.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: March 4, 2014
    Assignee: Showa Denko K.K.
    Inventors: Takashi Shoji, Takekazu Sakai
  • Patent number: 8661662
    Abstract: A method of making a touch-responsive capacitive device includes providing a transparent substrate and forming anisotropically conductive first and second electrodes extending in corresponding first and second orthogonal length directions over the substrate. Anisotropically conductive first and second electrodes each with electrically connected micro-wires are formed on opposing sides of the transparent substrate. The anisotropically conductive first and second electrodes extend in corresponding first and second length directions.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: March 4, 2014
    Assignee: Eastman Kodak Company
    Inventor: Ronald Steven Cok
  • Publication number: 20140055991
    Abstract: A metal core printed circuit board that is mechanically deformed so as to improve the mechanical properties (e.g., improved section modulus or stiffness) of the board. The board is configured to be self-retaining such that it retains the deformation(s) without the help of other support structure. More specifically, the metal layer in the board is plastically (and permanently) deformed so as to retain the deformation(s) in the board.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 27, 2014
    Inventors: Forrest Starnes McCanless, Patrick A. Collins
  • Publication number: 20140053397
    Abstract: A method for manufacturing a PCB includes certain steps. A printed circuit board sheet is provided. The printed circuit board includes an unwanted portion and a printed circuit board unit which includes a plurality of contact pads. An imaginary boundary line is defined between the printed circuit board unit and the unwanted portion. Each of the contact pads defines an outline. A nearest distance between the outline and the imaginary boundary line is less than 4 millimeters. The printed circuit board sheet is punched along the imaginary boundary line, forming one hollow portion or a plurality of through slots. A plurality of burrs is generated on an inner surface of the hollow portion or the through slots. The burrs are removed using a low-energy laser cutting process, thereby obtaining a printed circuit board. A laser power used in the low-energy laser cutting process is 5-8 watts.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 27, 2014
    Applicants: ZHEN DING TECHNOLOGY CO., LTD., FUKUI PRECISION COMPONENT (SHENZHEN) CO., LTD.
    Inventors: RUI-WU LIU, YU-HSIEN LEE, WEN-HSIN YU
  • Patent number: 8657982
    Abstract: The steps of a method for fabricating a proximity sensing module that is adapted to be attached to a mobile device, include: (a) patterning an upper conductive film to form a patterned conductive film which includes an upper connective pad that is adapted to be electrically connected to a respective contact on a circuit board of the mobile device, and an induced circuit pattern that is electrically connected to the upper connective pad; (b) adhering an adhesive sheet to the patterned conductive film; and (c) forming a through hole in the adhesive sheet such that the upper connective pad is exposed from the through hole.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: February 25, 2014
    Assignee: Quanta Computer, Inc.
    Inventors: Yuan-Chen Liang, Chia-Hui Wu, Hung-Ta Lee, Yi-Chun Lin, Li-Chuan Chien, Kuo-Hsiang Hsu
  • Publication number: 20140048442
    Abstract: A smart package backing (100) for pills removable from the backing, wherein the backing is adapted to record a removal of said pills by means of detection elements (103, 401a, 501a). The detection elements comprise electrical components (401a, 501a), wherein said electrical components are pressed onto the backing (100) with methods of printing technology. The removal of a pill from the backing is adapted to bring about a structural change in at least one printed component, and the structural change of said component is adapted to bring about an electrically measurable change in an electric circuit comprising said component. In addition, at least one of said electrical components (401a, 501a) deviates in terms of its specific electrical value from the specific electrical value of at least one other electrical component (401a, 501a).
    Type: Application
    Filed: February 14, 2012
    Publication date: February 20, 2014
    Applicant: STORA ENSO OYJ
    Inventors: Juha Maijala, Raimo Mäkelä, Petri Ilkka
  • Publication number: 20140041206
    Abstract: Disclosed herein is a method for repairing a via in which a dimple phenomenon occurs, in the case in which a dimple error occurs at the time of a process of forming the via used for electrically connecting between layers of a multi-layers circuit board. The method for repairing a via according to an exemplary embodiment of the present invention includes judging whether or not a dimple error occurs in a via; and repairing the via in which the dimple error occurs.
    Type: Application
    Filed: March 15, 2013
    Publication date: February 13, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hye Jin CHO, Hyo Jin YOON, Suk Jin HAM, Sung Hee LIM, Seong Chan PARK, Ji Eun JEON
  • Publication number: 20140033525
    Abstract: An electronic component device having a first sealing frame formed on a main substrate and a second sealing frame formed on a cover substrate, the first and second sealing frames being composed of a Ni film. A bonding section constituted by a Ni—Bi alloy is formed between the first and second sealing frames. For example, a Bi layer is formed on the first sealing frame, and then the first sealing frame and the second sealing frame are heated at a temperature of 300° C. for at least 10 seconds while applying pressure in the direction in which the first sealing frame and the second sealing frame are in close contact with each other, and thus the bonding section, which bonds the first sealing frame to the second sealing frame, is formed.
    Type: Application
    Filed: September 6, 2013
    Publication date: February 6, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Hiroki Horiguchi, Yuji Kimura