Abstract: A circuit board having a board-to-board connector and a method of manufacturing the same are provided. The circuit board includes at least one of a recess and a hole having a connection portion exposed to be electrically connected to a connection portion of a connector header of another circuit board, a terminal on the circuit board, and a conduction line for connecting the terminal and the connection portion. Thereby, a cost and required space for a board-to-board connection can be reduced.

Abstract: A multi-layer printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a second electrically-insulating layer, and a first electrically-conductive layer disposed between the first and second electrically-insulating layers. The second layer includes a third electrically-insulating layer and a second electrically-conductive layer. The first layer stack and/or the second layer stack include a cut-out area defining a void that extends therethrough.

Abstract: There is provided a method of producing a printed circuit board incorporating a resistance element capable of adjusting resistance after the resistance element has been formed and assuring a high accurate resistance. A method of producing a printed circuit board incorporating a resistance element using carbon paste includes the steps of: forming through holes 5, 6, 25 and 26 or a bottomed hole in a double-sided copper clad laminate; applying noble metal plating into the through hole or the bottomed hole; filling the through hole or the bottomed hole with carbon paste; subjecting the carbon paste with which the thorough hole or the bottomed hole is filled to noble metal plating, conducting treatment and plating to form a conductive layer; forming an opening 18 in the conductive layer on the end of the through hole filled with the carbon paste; and performing trimming through the opening to adjust the resistance of the resistor formed by the carbon paste.

Abstract: Embodiments for constructing capacitance sensing devices include, but are not limited to, forming a plurality of electrodes on a central portion of a substrate, the substrate comprising a central portion and an outer portion, forming a first plurality of conductors on the substrate, each of the first plurality of conductors being connected to and extending from at least one of the plurality of electrodes, and forming an insulating material on the outer portion of the substrate and at least partially over some of the first plurality of conductors. The constructing also includes forming a second plurality of conductors on the insulating material, wherein the second plurality of conductors and the insulating material are configured such that each of the second plurality of conductors is electrically connected to at least some of the first plurality of conductors and is insulated from the others of the first plurality of conductors.

Abstract: A process for manufacturing a multilayer article, the article comprising two crosslinked semiconductive layers separated by and bonded to an insulation layer, the semiconductive layers formed from a peroxide-crosslinkable olefin elastomer and the insulation layer comprising composition comprising a silane-grafted olefinic elastomer, the process comprises the steps of: (A) injecting the silane-grafted olefinic elastomer between the two crosslinked semiconductive layers so as to have direct contact with each semiconductive layer, and (B) crosslinking the silane-grafted olefinic elastomer in the absence of a peroxide catalyst.

Abstract: The various embodiments include methods and apparatus relating to manufacturing a PCB assembly. The layers in a stacked arrangement forming the PCB assembly include at least one RF ground layer that extends in a unitary manner beyond the plurality of stacked layers to form an antenna ground plane that spans the portion of the layer within the PCB assembly and the portion of the layer extending beyond the PCB assembly. The extended conductive layer forms a continuous ground plane element along a width of the PCB assembly. The antenna ground plane extension extending beyond the PCB assembly may be flexible, enabling it to be fit within or extend beyond the casing of a small device, such as a watch telephone.

Abstract: An electronic device comprises a substrate (120), at least one electronic component (171, 172, 173) arranged on the substrate, and an encapsulation (140) covering the at least one electronic component (171, 172, 173). An electromagnetic protective layer (130) covers a surface (143) of the encapsulation (140) that faces away from the substrate (120), and the side faces (121, 141; 122, 142) directed transversely with respect to the surface (143). In particular, a thermal and/or electrical coupling (134, 162, 163, 164, 165, 166) couples the electromagnetic protective layer (130) thermally and/or electrically to a region (168) of the electronic device (111, 112) that is enclosed by the encapsulation. For production purposes, the device is singulated from a panel and the electromagnetic protective layer (130) is subsequently applied.

Abstract: Methods of fabricating a base layer circuit structure are provided. One fabrication method includes: providing an alignment carrier having a support surface; forming a plurality of electrically conductive structures above the support surface of the alignment carrier; disposing a structural material around and physically contacting the side surfaces of the electrically conductive structures formed above the support surface, the structural material having an upper surface coplanar with or parallel to the upper surface of one or more of the electrically conductive structures; exposing, if covered, the upper surfaces of the electrically conductive structures to facilitate electrical connection to the structures; and separating the alignment carrier from the base layer circuit structure. The base layer circuit structure includes the plurality of electrically conductive structures and the structural material surrounding and physically contacting the electrically conductive structures.

Abstract: A multi-chip card comprises a plurality of sub-cards, each sub-card including an integrated circuit chip. Each chip comprises electrical contacts, and each of the subcards may be moved to occupy an active position of the card.

Abstract: A shielding system for a mobile device and a method for assembling the system are provided. The shielding system includes a Printed Circuit Board (PCB) with a first area and a thickness, and a shield enclosure, spaced apart and above a front side of the PCB at a certain distance, for enclosing components on the PCB. Parts of the shield enclosure are coupled to at least one of a lateral side and a back side of the PCB.

Abstract: There is disclosed a method for making a nano-composite gas sensor. At first, there is provided a substrate. Then, electrodes are provided on the substrate in an array. Finally, a gas-sensing membrane is provided on the electrodes. The gas-sensing membrane includes a nano-conductive film and a peptide film.

Abstract: A twisted-pair cable and methods are disclosed. The twisted-pair cable comprises a first layer comprising a first non-conductive. A second layer is coupled to the first layer, and comprises a printed circuit patterned with first diagonal conductor segments. A third layer is coupled to the second layer, and comprises a non-conductive strip. A fourth layer is coupled to the third layer, and comprises a printed circuit patterned with second diagonal conductor segments. The first diagonal conductor segments and the second diagonal conductor segments are coupled at respective segment ends such that at least two wires are formed around the non-conductive strip. A fifth layer is coupled to the fourth layer, and comprises a second non-conductive.

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first metal layer formed on the insulating layer; a second metal layer formed on a portion of the first metal layer; and an oxidation layer formed on a portion of the first metal layer on which the second metal layer is not formed, wherein materials of the first and second metal layers are different from each other, and the second metal layer is made of a material of which ionization tendency is smaller than that of the first metal layer.

Abstract: In one embodiment, an air current generating apparatus includes: a dielectric substrate exposed to gas: a first electrode disposed inside the dielectric substrate; a second electrode disposed near a surface of the dielectric so as to correspond the first electrode and having a sharp shape; and a power source applying a voltage between the first and second electrodes and plasmatizing part of the gas to generate an air current.

Abstract: A circuit board including a substrate having first and second dielectric layers of first and second dielectrics, the second dielectric containing 8 mass % or more of a glass net former component. At least one portion of an inner layer electrode has approximately two principal surfaces parallel to principal surfaces of the circuit board and a thickness of not less than 50 micrometers in a normal direction of the principal surfaces. The inner layer electrode and second dielectric layer contact with each other, and a ratio t/T of sum total thickness t of the second dielectric layer in contact with the inner layer electrode in a normal direction of the principal surface to sum total thickness T of the first dielectric layer in a normal direction of the principal surface is 0.1 or more.

Abstract: A suspended IO trace design for SSP cantilever Read/Write is described. Instead of having the whole I/O trace attached to surface of the cantilever, the cantilever is designed with fish-bone-like support and the I/O traces are anchored to cantilever structures 110 at some specific attachment locations with dielectric insulation in between. This design provides very compliant trace compared to cantilever's see-saw actuation around the torsional beam pivot and is also insensitive to residual stress variations from I/O trace in fabrication.

Abstract: A display apparatus includes a plurality of electrofluidic chromatophore (EFC) pixel cells. Each pixel cell includes a fluid holder for holding a polar fluid and a non-polar fluid having differing display properties, the fluid holder including a reservoir having an orifice with a small visible area projected in the direction of a viewer onto the polar fluid, and a channel with a geometry having a large visible area projected in the direction of a viewer onto the polar fluid. The channel is connected to the reservoir via said orifice so as to enable free movement of the polar fluid and non-polar fluid between the channel and the reservoir. The reservoir is formed in a laminated resin structure of homogenous resin film layers, including an orifice film layer and a reservoir film layer.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic element having a plurality of dielectric layers laminated therein; and first and second internal electrodes formed within the ceramic element, wherein the first and second internal electrodes include 80 to 99.98 wt % of nickel (Ni), 0.01 to 10 wt % of copper (Cu), and 0.01 to 10 wt % of barium titanate (BaTiO3).

Abstract: In a display device (100), a row of protruding electrodes (115) and a row of protruding electrodes (116) are formed on the connecting surface of a terminal section (112), the row of the protruding electrodes (116) is disposed between the row of the protruding electrodes (115) and a display section (111), one end of a flexible printed board (150) is connected to the row of the protruding electrodes (115), one end of a flexible printed board (160) is connected to the row of the protruding electrodes (116), the row of the protruding electrodes (115) is adjacent to the row of the protruding electrodes (116), and the one end of the flexible printed board (150) and the one end of the flexible printed board (160) are opposed to each other.

Abstract: A robot system according to an aspect of an embodiment includes a supply unit and a robot. The supply unit is fixedly provided at a predetermined position to supply a feed material that is used for processing a workpiece. The robot transfers the unprocessed workpiece handed from an operator at a predetermined transfer position to the vicinity of the supply unit to process the workpiece by using the feed material supplied from the supply unit and then transfers the processed workpiece to the transfer position.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic element having a plurality of dielectric layers laminated therein; and first and second internal electrodes formed within the ceramic element, wherein the first and second internal electrodes include 80 to 99.9 wt % of copper (Cu) and 0.1 to 20 wt % of nickel (Ni), and a frequency therefor is 1000 MHz or less.

Abstract: A metal printed circuit board (PCB) having a hole reflective surface and a method for manufacturing the same, in which a process of forming a reflective surface by performing surface treatment on a metal plate and a process of bonding a PCB having a hole are performed as a single process, thus simplifying the manufacturing process and increasing the applicability of a product. The metal PCB includes a metal plate having a first reflective surface formed on a chip bonding area by surface treatment; a PCB layer stacked on the metal plate and having a hole and a wiring pattern which are formed in the chip bonding area; a second reflective surface formed on the inner side of the hole of the PCB layer; and a dam formed around the hole on the PCB layer.

Abstract: An element-connecting board is a lead frame for allowing a light emitting diode element to be connected to one side thereof in a thickness direction. The element-connecting board includes the lead frame which is provided with a plurality of leads disposed with spaces from each other and a first insulating resin portion which is light reflective and fills the spaces.

Abstract: An implantable electronic device includes a housing wall defining an interior surface and an exterior surface. A feedthrough assembly includes a body coupled to the housing and defining an aperture, and a pin at least partially disposed within the aperture and passing through the housing wall from the interior surface to the exterior surface such that the pin has an interior portion and an exterior portion. A printed circuit board (PCB) has a substantially rigid portion defining a plane and a substantially flexible portion. The flexible portion has a distal end and a proximal end. The proximal end is coupled to the substantially rigid portion. The flexible portion is coupled to the pin interior portion adjacent the distal end. The flexible portion defines a bend between the proximal end and the distal end. At least one line tangent to the flexible portion is substantially perpendicular to the plane.

Abstract: Embodiments of the invention include LED lighting systems and methods. For example, in some embodiments, an LED lighting system is included. The LED lighting system can include a flexible layered circuit structure that can include a top thermally conductive layer, a middle electrically insulating layer, a bottom thermally conductive layer, and a plurality of light emitting diodes mounted on the top layer. The LED lighting system can further include a housing substrate and a mounting structure. The mounting structure can be configured to suspend the layered circuit structure above the housing substrate with an air gap disposed in between the bottom thermally conductive layer of the flexible layered circuit structure and the housing substrate. The distance between the layered circuit structure and the support layer can be at least about 0.5 mm. Other embodiments are also included herein.

Abstract: A tetrode for measuring bio-signals, the tetrode including four electrodes which extend in a lengthwise direction of the tetrode and are symmertrically arranged; and an insulation layer which surrounds the four electrodes to insulate the electrodes from each others. A method of manufacturing a tetrode for measuring bio-signals, the method including forming a first insulation layer; forming first and second electrodes on the first insulation layer and forming a second insulation layer on the first and second electrodes; and forming third and fourth electrodes on the second insulation layer and forming a third insulation layer on the third and fourth electrodes.

Abstract: A scalable MEMS inductor is formed on the top surface of a semiconductor die. The MEMS inductor includes a plurality of magnetic lower laminations, a circular trace that lies over and spaced apart from the magnetic lower laminations, and a plurality of upper laminations that lie over and spaced apart from the circular trace.

Abstract: In one embodiment, a method of fabricating a lead comprises: providing a lead body comprising a plurality of conductive wires; providing a flex film connector structure, the flex film connector structure comprising a plurality of conductive pads on a first portion of the flex film connector structure, a plurality of contacts on a second portion of the flex film connectors, and a plurality of traces electrically connecting the plurality of conductive pads with the plurality of contacts; placing the first portion of the flex film connector adjacent to a cross-section of one end of the lead body; electrically coupling the plurality of conductive pads of the flex film connector structure to the plurality of conductive wires at the one end of the lead body; and wrapping the second portion of the flex film connector structure about the lead body to form a plurality of electrical contacts.

Abstract: The disclosure discloses a wireless terminal with a reduced Specific Absorption Rate (SAR) peak. The wireless terminal comprises a Printed Circuit Board (PCB), wherein a fractal gap is formed at an edge of a metal ground on the PCB to disturb distribution of induced current at the edge of the metal ground. The disclosure also discloses a method for reducing an SAR peak. On the premise of the non-influence on the communication quality of the wireless terminal, the SAR and the production cost can be reduced and the structure space of wireless terminal can be saved by using the wireless terminal and the method.

Abstract: In one embodiment, a paddle-style lead for implantation in the epidural space through an insertion tool, the paddle-style lead comprises: a paddle structure that comprises: (i) a frame of rigid material, the frame comprising a spring member adapted to bias the frame to assume a first width and a first length, the frame being adapted to elongate to assume a second width and a second length under application of a compressive force; and (ii) elastic material disposed across an interior surface area defined the frame, wherein a plurality of electrodes and a plurality of electrical traces are provided on the elastic material, wherein the plurality of electrical traces are electrically coupled to a plurality of lead conductors and the plurality of electrodes; wherein the plurality of electrical traces comprises a plurality of alternating curves that elongate when the elastic material is stretched.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: In accordance with certain embodiments, thermal stresses are mitigated in illumination systems by mating optical substrates with a plurality of discrete substrates each having one or more light-emitting elements thereon.

Abstract: A metal interconnect structure, which includes metal alloy capping layers, and a method of manufacturing the same. The originally deposited alloy capping layer element within the interconnect features will diffuse into and segregate onto top surface of the metal interconnect. The metal alloy capping material is deposited on a reflowed copper surface and is not physically in contact with sidewalls of the interconnect features. Thus, there is a reduction in electrical resistivity impact from residual alloy elements in the interconnect structure. That is, there is a reduction, of alloy elements inside the features of the metal interconnect structure. The metal interconnect structure includes a dielectric layer with a recessed line, a liner material on sidewalls, a copper material, an alloy cap, and a capping layer.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: A circuit substrate includes a single-layer insulating substrate, a through-hole, and wiring conductors that are provided in both main surfaces of the single-layer insulating substrate. The through-hole includes first and second concave portions that are formed in both of the main surfaces of the single-layer insulating substrate, respectively, and a through-portion through which both of the concave portions communicate with each other. An opening area of a portion at which the first and second concave portions overlap each other is a half or less of an opening area of any large concave portion between both of the concave portions, and a metallic film is formed on the respective inner wall surfaces of the first and second concave portions, and the through-portion.

Abstract: A circuit board and a method for manufacturing the same are disclosed. The circuit board of the present invention comprises: a carrier board, wherein a first circuit layer is disposed on at least one surface of the carrier board, and the first circuit layer comprises plural conductive pads; a protein dielectric layer disposed on the surface of the carrier board and the first circuit layer, wherein the protein dielectric layer has plural openings to expose the conductive pads; and a second circuit layer disposed on a surface of the protein dielectric layer, wherein the second circuit layer comprises plural first conductive vias, and each first conductive via is correspondingly formed in the opening and electrically connects to the conductive pad.

Abstract: A multi-layer circuit board having a connector portion of an inner layer substrate being exposed, the multi-layer circuit board comprising: an inner layer substrate in which an inner layer circuit is formed, the inner layer circuit including the connector portion; and an outer layer substrate having an outer layer circuit formed on an insulating layer and having a region corresponding to the connector portion peeled off, an inner layer circuit side of the inner layer substrate and an insulating layer side of the outer layer substrate being adhered to one another via an adhesive layer so as to face one another, and a conductor layer other than the connector portion of the inner layer circuit being adhered to the outer layer substrate directly by the adhesive layer.

Abstract: An insulator base for an electronic faucet includes a housing supporting a light assembly and a connecting wire electrically coupled to the light assembly. A polymer overmold is coupled to the housing and secures the light assembly and the connecting wire within the housing.

Abstract: An electronic component includes: an element that is located on a substrate; a signal wiring that is located on the substrate and electrically connected to the element; a metal plate that is located so as to form a cavity on a functional part of the element and covers an upper surface of the cavity; a support post that is located on the substrate so as not to be located on the signal wiring, and supports the metal plate; and an insulating portion that covers the metal plate and the support post, and contacts a side surface of the cavity.

Abstract: Systems, processes, and manufactures are provided that employ a casing associated with an electrical component to provide some, most, substantially all or all electrical insulative protection necessary for the electrical component. This casing may be further employed with potting or other materials to supplement and add additional or different protections for the component. These additional protections can include additional insulative resistance, thermal protection, moisture protection and other buffers to and from the environment.

Abstract: A circuit board structure includes a core circuit structure, a first and a second dielectric layers, a first and a second conductive blind via structures, a third and a fourth patterned circuit layers, and a first and a second surface passivation layers. The first and the second dielectric layers have at least one first and second blind vias exposing parts of a first and a second patterned circuit layers of the core circuit structure, respectively. The first and the second conductive blind via structures are disposed into the first and the second blind vias respectively. The third and the fourth patterned circuit layers are electrically connected to the first and the second patterned circuit layers through the first and the second conductive blind via structures respectively. The first and the second surface passivation layers respectively expose parts of the third and the fourth patterned circuit layers.

Abstract: A method for manufacturing a printed wiring board including preparing a carrier, forming a metal layer on the carrier, forming an etching resist on the metal layer, forming a metal film from the metal layer underneath the resist by removing portion of the metal layer exposed through the resist and part of the metal layer contiguous to the portion of the metal layer and underneath the resist, forming a coating layer on side surface of the film and the carrier, forming a pad on the coating layer, removing the resist, forming a resin insulation layer on the film and surface of the pad, forming an opening reaching the surface of the pad in the insulation layer, forming a conductive circuit on the insulation layer, forming a via conductor connecting the circuit and the pad in the opening, removing the carrier from the film and coating layer, and removing the film.

Abstract: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.

Abstract: A method for manufacturing a circuit pattern-provided substrate including forming a resist layer on a substrate, forming an opening corresponding to a circuit pattern and having an eaves cross-sectional shape in the resist layer, forming a thin film layer having a portion formed on the substrate in the opening and a portion formed on the resist layer, and removing the resist layer such that the resist layer and the portion of the thin film layer formed on the resist layer are removed from the substrate. The forming of the opening comprises exposing the resist layer with a mask device which changes an exposure amount of the resist layer such that the eaves cross-sectional shape has a space at a boundary between the resist layer and the substrate.

Abstract: Provided is a method for disposing a component on a substrate (100), the method comprising steps of: a step (a) of preparing the substrate (100), a first liquid, and a component-dispersing liquid; a step (b) of applying the first liquid to the substrate (100) along the +X direction continuously to dispose the first liquid on hydrophilic lines (112) and hydrophilic body regions (111) along the +X direction alternately; a step (c) of bringing the component-dispersing liquid in contact with the first liquid disposed on the hydrophilic region (111); and a step (d) of removing the first liquid and the second liquid from the substrate (100) to dispose the component on the hydrophilic region (111).

Abstract: A circuit board unit which is attached to the cartridge includes a circuit board on which an electronic component is mounted, a first member having a surface opposing the circuit board, and a second member which is bonded to a region of the surface of the first member which region is different from the region of the surface opposing the circuit board. The circuit board is not fixed to the first member and the second member and is retained between the first member and the second member with gaps extending in an orthogonal direction orthogonal to the surface and in a surface direction in parallel to the surface.

Abstract: Described herein is a folded tape package for electronic devices. The folded tape package uses a flexible tape substrate having two end sections for passive components and a middle section for connecting and stacking multiple dies. The stacked dies are encapsulated or covered with a mold. One side may be left exposed for device functionality and operation with additional components or devices. The passive components may also be covered with a mold. The end sections are folded such that the end sections are in a parallel configuration with the middle section. The flexible tape substrate may be a high density interconnect flexible tape substrate with two layers. A silicon substrate may be used to interconnect a die stack to the flexible tape substrate. The folded tape package has a reduced device footprint, lower substrate warpage effects, and higher substrate yields.

Abstract: An apparatus includes a sheet of circuit board material, at least one electrically conductive trace positioned on the sheet of circuit board material, and at least one electrically conductive contact pad positioned on the sheet of circuit board material and coupled to the at least one electrically conductive trace. The apparatus further includes at least one deformation point configured to absorb stresses developed in the sheet of circuit board material when the sheet of circuit board material experiences resistance to expansion or compression caused by connection to an object resisting expansion or compression.

Abstract: The present invention is to provide a method of manufacturing a printed wiring board with a component mounting pin to connect a printed wiring board and an electronic component.

Abstract: A method that employs a novel combination of conventional fabrication techniques provides a ceramic short-resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The method allows thinner and more flexible ceramic capacitors to be made. The method includes forming a first thin metal layer on a substrate; depositing a thin, ceramic dielectric layer over the metal layer; depositing a second thin metal layer over the dielectric layer to form a capacitor exhibiting a benign failure mode; and separating the capacitor from the substrate. The method may also include bending the resulting capacitor into a serpentine arrangement with gaps between the layers that allow venting of evaporated electrode material in the event of a benign failure.