Abstract: A magnetic bubble memory device comprising a cassette holder provided in a main bubble memory apparatus and a magnetic bubble memory cassette which is inserted into the holder so as to be electrically connected with a bubble actuating circuit provided in the main bubble memory apparatus. The device further comprises a detector means for detecting the operation of ejecting the cassette from the holder. The detector means transmits a signal for stopping the bubble motion in advance of the disconnection of the cassette from the bubble actuating circuit.
Abstract: A method and system for rewriting data in a non-volatile memory of the type which requires a comparatively long period of time for the rewriting of stored data. The occurrence of an interruption in power can be detected on the basis of the content of the non-volatile memory, and detection takes place after the resumption of power even if the interruption in power takes place during the rewriting operation. The non-volatile memory is provided with a flag area in which information indicating the initiation of a modification is written prior to the rewriting operation, and in which information indicating the termination of a modification is written after the rewriting operation, whereby an interruption in power which has occurred during rewriting is readily detected by reading out the information from the flag area after the restoration of power.
Abstract: Ion beam lithography of particular interest in the fabrication of large-scale integrated circuits of unexpectedly increased throughput results from appropriate choice of (a) resist material and (b) ion species. Resist material, generally negative acting, is characterized by electron beam sensitivity inadequate for ordinary commercial electron beam lithography. The relevant characteristic responsible for inadequate electron beam sensitivity is the very characteristic responsible for enhanced ion sensitivity. Ion species, always of atomic number greater than that of proton, are dictated by the observation that sensitivity unexpectedly increases at a greater rate than predictable on traditional bases.
Type:
Grant
Filed:
August 24, 1981
Date of Patent:
May 10, 1983
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: A magnetic bubble memory device having a bubble generator which generates a magnetic bubble by conducting a pulse current on its hairpin-shaped conductor loop and a major propagation circuit for propagating the magnetic bubble to a transfer-in gate circuit which transfers the magnetic bubble to a memory storage region, wherein the device further comprises a gate means provided between the bubble generator and the major propagation circuit for transferring a magnetic bubble carrying information "1" onto the major propagation circuit at a first predetermined timing and preventing a spurious bubble to be transferred to the major propagation circuit at a second predetermined timing.
Abstract: Machine for testing planar magnetic film with magnetic bubbles and which comprises a testing device and a magnetic head, wherein the magnetic head incorporates two polarization coils in the Helmholtz position and whereof the common axis is normal to the plane of the magnetic film and two flat coils whose axes are perpendicular to one another and parallel to the plane of the magnetic film, the first of the polarization coils being arranged within the flat coils which are themselves arranged one within the other and on the same side of the magnetic film, while the test device and the second polarization coil are arranged on the other side of the magnetic film.
Abstract: A pulse generating circuit in ises a clock ceasing detecting circuit and a logic circuit which receives the output of one of the decoders and the output of the detecting circuit. The flip-flop circuit is cleared by the output of the detecting circuit through the logic circuit when the clock signal is ceased by accident.
Abstract: A magnetic bubble memory element has a conductor pattern layer including a hair pin shaped conductor loop for generating or dividing magnetic bubbles. A heat sink pattern layer is provided close to the hair pin portion of the conductor loop and may be formed integrally with the loop.
Abstract: A power source device for a bubble memory unit, wherein there is supplied a first DC voltage E.sub.c which is applied to control circuitry for controlling the reading and writing of data, a second DC voltage signal E.sub.d which is applied to drive circuitry for driving a bubble memory element, and a memory signal M.sub.e which enables data to be written in or read from the bubble memory element, the signals E.sub.c, E.sub.d and M.sub.e being made to rise and fall according to a prescribed sequence as a commercial power supply is connected and disconnected. The power source device includes first and second DC power source circuits, a comparator circuit for comparing the magnitude of the first DC voltage E.sub.c with a reference level V.sub.M having a value greater than an allowable lower limit value, and a delay circuit. The second DC power source circuit is actuated following a prescribed time delay which begins when the value of signal E.sub.c surpasses the reference level V.sub.
Abstract: A credit card or security card data processing system employing portable ds including data processing means in each card adapted to be coupled to a data processing station having its own data processing means. In each card a part of the data processing means is formed by magnetic bubble elements at least one of which is a memory. The magnetic bubble elements are formed in a layer of magnetic material which has a propagation track thereon and which is positioned between a pair of magnet elements which establish a polarizing field perpendicular to the layer. The operating station includes orthogonal conductive coils arranged to set up a rotatable magnetic field which is applied to the magnetic layer causing the bubbles to be attracted by magnetic poles in the propagation track. A magnetoresistive member senses movement of the bubbles.
Type:
Grant
Filed:
November 1, 1979
Date of Patent:
April 20, 1982
Assignee:
Compagnie Internationale pour l'Informatique Cii-Honeywell Bull
Abstract: A portable credit or identity card or the like incorporates magnetic bubble elements. The bubble elements comprise a layer of magnetic material capable of containing magnetic bubbles and which is provided with a propagation track and a means for detecting the bubbles. Two flat permanent magnets arranged on either side of the magnetic layer generate a magnetic polarizing field perpendicular to the layer. The bubble element forms the memory which contains the identity code for the card.
Type:
Grant
Filed:
November 1, 1979
Date of Patent:
January 12, 1982
Assignee:
Compagnie Internationale pour l'Informatique Cii Honeywell Bull (Societe Anonyme)
Abstract: An interchangeable magnetic bubble memory device having first and second interchangeable memory bubbles, each of the modules including a magnetic bubble memory having at least one major loop or non-recirculating track, each major loop or track including a plurality of minor loops for storing magnetic bubbles. There are no more than n defective minor loop locations indicated by an error map. A detector produces data signals indicating the presence or absence of magnetic bubbles in the minor loops and a microprocessor provides control signals for controlling the transfer of the data signals between the data memory and the microprocessor. A driver is included and is responsive to the enable control signals from the microprocessor for transferring, replicating, generating and/or destroying the bubbles with low power consumption.
Abstract: A method for adjusting output signal levels from a magnetic bubble detector. Portions of the chevron stacks located adjacent to either the detector element or dummy element are selectively removed. This removal changes the magnetic field at either one of these elements, thereby adjusting the detector output. This removal may be performed with laser trimming techniques or by etching.
Abstract: A solid state music player for reproducing and playing stored digital information from a magnetic bubble-memory device, which has a magnetic bubble-memory module for receiving the bubble-memory device which contains the stored program. There is also a function-timing generator, which is coupled to the magnetic bubble-memory module for generating control and timing signals for the module. A microprocessor is connected to a bubble-memory controller which in turn is coupled to the function-timing generator, and the bubble-memory controller responds to commands from the microprocessor to send control signals to the function-timing generator, necessary to access the digital data stored in the bubble-memory device. A digital-to-analog converter is coupled to the microprocessor for converting the digital stream of information from the microprocessor into analog signals, which then can be played through loudspeakers or on a video screen to reproduce the stored digital information from the bubble-memory device.
Abstract: A passive annihilator comprising an annihilator element in the form of a spiral located at the end of a path of propagate elements whereby bubbles, entering the spiral element in response to the rotating in-plane magnetic field, will follow the spiral path to its center, and any subsequent bubbles, in a stream of bubbles, entering the spiral will help hold the prior bubble captive in the spiral. The final bubble in a bubble stream under high magnetic bias conditions will be annihilated near the spiral center while the final bubble under low magnetic bias conditions will circulate in response to the in-plane rotating field indefinitely in the spiral, but is not free to escape, and will be annihilated by the entry of new bubbles from a subsequent bubble stream.
Abstract: Method and apparatus for testing a magnetic bubble memory are disclosed wherein a most severe magnetic bubble domain arrangement which fully causes the ununiformity of magnetic interaction between magnetic bubble domains is experimentally determined, and a basic pattern [P] and a test information pattern determining an arrangement of the basic patterns [P] and complementary patterns [P] thereof for realizing that magnetic bubble domain arrangement are stored in memory units, respectively, and the basic patterns [P] and the complementary patterns [P] are sequentially read out in accordance with the test information pattern to generate magnetic bubble domain trains in a storage area of the magnetic bubble memory.
Type:
Grant
Filed:
September 29, 1978
Date of Patent:
November 11, 1980
Assignees:
Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
Abstract: A memory control system comprises a memory unit including a plurality of chips each having a shift register type memory having a plurality of information loops, the number of chips being larger than a predetermined number, the predetermined number of bits out of those bits which are read from or written into the information loops of the respective chips at the same timing constituting a unit information; and an additional memory which stores information indicative of normal loop condition or defective loop condition for each of the information loops in each of the chips and information indicative of whether the number of normal loops in each information loop group corresponding to the bits which are read or written at the same timing is larger than said predetermined number or not.
Type:
Grant
Filed:
April 19, 1978
Date of Patent:
November 11, 1980
Assignees:
Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
Abstract: This invention discloses a method for the simultaneous control and management of an arbitrary number of bubble memories, whereby the existence, locations, and defects of the blemished data positions in the bubble memory devices are managed by the invention, allowing the external device using the bubble memories to no longer be cognizant of the blemished data positions of the bubble memories. Specifically, this invention uses a shift register connected in a parallel manner to the bubble memories, a second shift register connected to the external data bus, a means for storage for the valid data positions in the bubble memory devices, and a means for gating data between the two shift registers in a serial manner, the gating means being controlled by the memory containing the valid data positions.
Abstract: An error repairing method and apparatus for a magnetic bubble memory for restoring stored binary data to its original form are described. The method and apparatus are employed to compensate for random error in bubble memories resulting from slipped or disappeared bubbles. The data is coded with an error correcting code, such as a Hamming or Fire code, before storage. The stored, coded data is periodically read from memory and errors are detected and corrected. The corrected, coded data is rewritten into memory. In one embodiment the frequency of the repair cycles is a function of the rate at which errors are detected.
Abstract: A method of testing a magnetic bubble device which includes an integral magnetic shield is provided for setting the magnetization of the bias field thereof, in which a leakage magnetic field is induced in the shield of the device which is superimposed on the usual bias magnetic field for changing its magnetization.
Abstract: Method and apparatus for testing and setting the field strength of permanent magnets in a magnetic bubble domain chip module, wherein the final molded module is formed to contain a pair of longitudinal slots which run through the module on opposite sides thereof. The module is inserted, via said slots, onto conducting members of a magnetic bubble module testing apparatus. The conducting members effectively provide one turn coils on each side of the module. Current is induced in these coils in such a way as to either add to or subtract from the bias field provided for the magnetic bubble domain chip by the permanent magnets of the module. The module is tested to determine the upper and lower operating levels of the bias field for effective operation of the chip, and the device is remagnetized to set the bias field of the module in the center, or optimal point, of the bias margin.
Type:
Grant
Filed:
June 27, 1977
Date of Patent:
June 19, 1979
Assignee:
Texas Instruments Incorporated
Inventors:
Hsiao-Yuan Li, Rex A. Naden, Alvis D. Stephenson, Jr., Gene D. Lee
Abstract: An associative bubble memory apparatus utilizing a plurality of registers therein to provide a high total memory capacity and to provide data retrieval or correlation based upon content rather than the address of the data of interest.
Type:
Grant
Filed:
June 24, 1977
Date of Patent:
February 20, 1979
Assignee:
The United States of America as represented by the Secretary of the Air Force
Abstract: There is provided an improved switching arrangement for controlling the interaction of magnetic bubble domain propagation loops in order to provide a large, serial storage loop which is fault tolerant and has improved operating characteristics. The switch provides on-chip correction capability and, as well, enhanced switching capability to render defective loops or propagation path portions separable in a positive manner.
Abstract: A logic system is disclosed for using a memory device of the serial read type having redundant elements in excess of the nominal memory size and consists of a Programmable Read Only Memory having a defect map programmed into it with respect to the associated memory device, a shift register of a predetermined length equivalent to the maximum number of allowable defects, a multiplexer associated with the shift register, a position counter for controlling the multiplexer and, finally, appropriate logic to control the system. This system is disclosed in connection with a bubble memory system of the field access major loop -- minor loop type having extra minor loops. As defects are encountered in writing, data is shifted through the shift register while the multiplexer is incremented to the proper output position of the shift register based on the number of encountered defects. As data is read, an analogous reverse to writing operation is performed with the multiplexer being decremented.
Abstract: A wafer indexing and mapping system is useful for precisely locating artifacts, defects, and fabricated structural components on a wafer. A permanent micrometer grid pattern is applied to the backside of the wafer, for example, a transparent bubble wafer. The grid pattern forms an array of uniform size cells, for example, 40 unit cells wide by 40 unit cells long. Each unit cell is divided into smaller units on each side. Each cell contains a coding or indexing system to identify the row and column of the cell in the grid pattern. The grid pattern contains orientation bars which identify orientation with respect to particular wafer reference lines. The simultaneous viewing of the wafer and the grid pattern permits an accurate permanent mapping of the artifacts, defects, and fabricated structural components on the wafer, as well as on the individual small chips formed by dicing the wafer.
Type:
Grant
Filed:
March 24, 1977
Date of Patent:
January 9, 1979
Assignee:
International Business Machines Corporation
Abstract: A shift register type memory device according to this invention includes on the same chip as that of an information storing medium, a functional part which identifies defect loops and controls the writing and reading of information so as to exclude them. The functional part includes a defect loop address memory which stores locations of the defect loops in the binary expression, and a common detector which reads out information from the defect loop address memory and information from storage loops.
Abstract: A display arrangement including a source of polarized radiation; a magnetic material capable of supporting magnetic bubble domains in the path of the polarized beam, for producing a modulated beam; a device for representing an image encoded signal by means of the magnetic bubble domains; and a display device in the path of the modulated polarized beam for providing a visual display of the encoded image.
Type:
Grant
Filed:
March 8, 1976
Date of Patent:
October 31, 1978
Assignee:
U.S. Philips Corporation
Inventors:
Ronald F. Pearson, David E. Lacklison, George B. Scott, John S. Palfreeman
Abstract: A bias field control arrangement for correcting the bias field in accordance with stability range variations in magnetic domain thin film layers. A thin film layer is provided auxiliary to the layers, which auxiliary layer responds to external environmental conditions such as temperature in a manner substantially identical to that of the magnetic domain layers. A pair of register-detectors are defined on the layer in the form of permalloy domain propagating elements, the dimensions of the elements of one being optimized to propagate domains of a diameter larger than that of a domain of a diameter which is optimum in view of the stability range of the layers and the dimensions of the elements of the other being optimized to propagate domains of a diameter smaller than that of the optimum diameter domain. For normal operation, the domains will be propagated along both channels with equal facility and an output comparison section at the output of the detectors produces no control signal.
Type:
Grant
Filed:
May 25, 1977
Date of Patent:
September 26, 1978
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: An acoustic surface wave bubble switch in which a magnetic bubble domain traveling in a thin film magnetic platelet can be guided in alternate directions by application of an acoustic wave. An array of longitudinal magnetic elements in the form of single bars and bars combined to form a T configuration together with a rotating in-plane magnetic field causes the magnetic bubble to propagate across the magnetic platelet. One of the configurations of the magnetic element is a T with a second horizontal bar and the bubble will have equal attraction for either of the horizontal bars. At the proper time an acoustic wave can direct the bubble to propagate in the direction of a chosen horizontal bar thereby effecting a switching action.
Type:
Grant
Filed:
April 22, 1976
Date of Patent:
July 25, 1978
Assignee:
The United States of America as represented by the Secretary of the Air Force
Abstract: This invention relates to an improved network and technique for correcting bubble domain memories of the major/minor loop type. In particular, a selectively insertable correction loop can be provided in a major loop path to insert or remove blank bits so that the effect of defective minor loops can be overcome. The correction networks include propagation loops formed of conventional magnetic bubble domain device elements and a conductor which is selectively alterable to provide a bypass or insertion mode of operation for the correction loop relative to the major loop.
Abstract: Magnetic bubble memory chips herein are characterized by circuits of permalloy and/or electrical conductors which include patterns designed to be sacrificed if electrical charges build up during processing or handling. Improved chip yield results.
Type:
Grant
Filed:
March 21, 1977
Date of Patent:
June 6, 1978
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: A single, compact bias structure to efficiently package a plurality of magnetic bubble domain device chips having different bias requirements. The vertical magnetic field distribution within the bias structure air gap is selectively controlled by a magnetically soft field adjusting assembly suitably attached within the bias structure. The size and configuration of the field adjusting assembly tailors local field variations within the air gap to correspond with the bias requirements of the bubble domain chips disposed therein.
Abstract: A magnetic bubble domain memory device is provided that includes a magnetic domain data chip having a major-minor loop organization with on-chip firmware providing redundancy information enabling the use of the chip even though one or more defective minor loops may be present thereon. The first page written in the minor loops, where a page is defined as a common bit position in each of the plurality of minor loops, presents a series of magnetic domains and voids where the magnetic domains represent the operable minor loops and the voids represent the defective minor loops. The second page in the minor loops is a series of magnetic domains and voids separated into bytes of information which are representative of the loop numbers of defective minor loops on the chip, and a third page in the minor loops is a repetition of the first page of data. Collectively, the three pages comprise the on-chip firmware providing redundancy information.
Type:
Grant
Filed:
June 9, 1977
Date of Patent:
May 16, 1978
Assignee:
Texas Instruments Incorporated
Inventors:
James Steven Flannigan, Dennie Joel Shadrick, Bennett Sanford Scott
Abstract: A display system for providing a real-time, dynamic presentation of an analog signal waveform is disclosed. The system includes an A-D converter that is coupled to a 1-out-of-M decoder that, in turn, drives a serial string of bubble domain generators. The bubble domain generators generate moving columns of bubbles, the heights of the columns representing the amplitudes of the analog signal waveform at each of the associated sample times. The bubble domain memory plane is of a construction to permit the columns of moving bubbles to appear as moving columns of bright spots when seen by an observer utilizing a plane polarized light beam and an analyzer.
Abstract: An apparatus for sorting of equal length records with the sorting time maximally overlapped by the time taken for loading and unloading of records. The minimal structure consists of a decision mechanism linked to and associated with a network of ladder structures. The activity within the network is so synchronized that the sorting activity in most ladders occurs while some ladder within the network is still undergoing the loading of input data; and during the unloading phase, the individually sorted data from each ladder are merged concurrently to produce a sequence of sorted records. The overlap between sorting and loading varies from 0 for records requiring no loading/unloading, to 100% for multi-ladder networks with loading/unloading.A single ladder structure supporting a type of transposition sort is first described both in a full exchange scheme and a fast version. Then, the mechanism for loading/unloading equal length records to the single ladder is set forth.
Type:
Grant
Filed:
May 12, 1976
Date of Patent:
March 7, 1978
Assignee:
International Business Machines Corporation
Inventors:
Tien Chi Chen, Kapali P. Eswaran, Vincent Yu-Sun Lum, Chin Tung
Abstract: A large capacity bubble memory device using a basic major-minor loop storage cell design. The basic storage cell is repeated, typically in matrix form, on a suitable bubble domain structure. The cell design is arranged so that interconnecting elements between respective cells permit magnetic bubble domains to be selectively transferred between cells in accordance with the status of switch elements. Control signals control the switch status. The cells include redundancy features so that cells can be interconnected to form a large capacity storage loop whereby chip yield is increased.
Abstract: A large capacity bubble memory device using a basic storage cell design. The basic storage cell is repeated, typically in matrix form, on a suitable bubble domain structure. The cell design is arranged so that interconnecting elements between respective cells permit magnetic bubble domains to be transferred between cells. The cells include redundancy features so that the cells can be interconnected to form a large capacity storage loop.
Abstract: There is disclosed herein a fault-tolerant memory organization which permits through the incorporation of redundancy the utilization of circuit chips having defective sections. The apparatus involves the use of redundant sections fabricated on the chip in conjunction with a data relocation technique. The relocation scheme utilizes a code-decode arrangement which inserts zeros into the data stream to avoid the defective sections and provides a zero delete arrangement when the previously coded information is retrieved.
Abstract: An improved bias field assembly for reducing power losses in a magnetic domain memory device. A preferred embodiment employs rectangular permanent magnets positioned above and below a drive coil/substrates assembly. Ferrite shields of the same general size as the permanent magnets are interposed between the magnets and the drive coil/substrates assembly. These shields provide a highly resistive, relatively impermeable path for induced eddy currents and flux to reduce the effective resistance of the drive coil during high frequency operation and to minimize hysteresis losses.