Abstract: Radiation-emitting semiconductor diodes in the form of a laser diode or an LED form important components in information processing systems. There is a particular demand for diodes emitting in the visible range of the spectrum and having a high permissible operating temperature. A radiation-emitting diode including a semiconductor body with a semiconductor substrate on which a lower cladding layer, an active layer, and an upper cladding layer are present, the active layer and the two cladding layers each including different semiconductor materials which form a mixed crystal, partly fulfill the above requirements. According to the invention, such a diode is characterized in that the mixed crystal of the active layer is more strongly ordered than that of the two cladding layers. This makes the difference in bandgap between these layers greater than in the known diode. The diode thus has a comparatively high T.sub.o value and accordingly a high maximum operation temperature.

Abstract: A semiconductor device includes a thyristor (4,5,8,9) in which connection is made to the cathode region (9) of the thyristor by means of an MOS structure. The MOS structure is provided by a fifth region (11) forming a pn junction with the cathode region (9), a sixth region (13) in contact with the cathode electrode (C) and forming a pn junction (14) with the fifth region (11), and an insulated gate (15) overlying a conduction channel area (110) of the fifth region (11) for defining a gateable conductive path for charge carriers into the cathode region (9) to initiate thyristor action. The conductive path is thus controlled by the voltage applied to the insulated gate (15), enabling the flow of charge carriers to the cathode region (9) to be stemmed by application of an appropriate gate voltage oxide. The fifth region (11) is electrically connected to provide a path for extraction of charge carriers during turn-off of the thyristor, thereby improving the controllable current capability of the thyristor.

Abstract: An integrated circuit includes a lateral transistor which has emitter regions (7) and collector regions (8) of a first conductivity type laterally spaced apart and included in a region (4, 5) of a second conductivity type opposed to the first. The lateral space (4) of the region (4, 5) of the second type situated between the emitter (7) and collector (8) regions forms the base of the transistor, with the emitter region (7) having a depth and a doping level which are such that the diffusion length of the minority carriers injected vertically therein is greater than or equal to the width of the region, which region has an elongate shape in at least a longitudinal direction, while the lateral transistor has its contour surrounded by a deep insulating layer (12).

Abstract: A semiconductor device comprising a support (1) provided with a groove (2) having walls (3 and 4), on which conductors (6 and 7) are present, which conductors extend at least partially around the support (1), and with a semiconductor element (11) which is present in the groove and makes electrical contact with the conductors on the walls. The semiconductor element (11) is clamped in the groove (2), thus making electrical contact with conductors (6 and 7) on walls (3 and 4). Since the semiconductor element (11) is held clamped-in between the conductors (6 and 7) on the walls (3 and 4), it is achieved that both a mechanical and an electrical connection is realized between semiconductor element (11) and support (1) in a single process step and in a simple manner.

Abstract: A semiconductor integrated circuit including a detection circuit (e.g. an address transition detector) for detecting a change of a first and a second input signal. The detection circuit includes a first and a second resettable delay circuit and a gate circuit which is connected thereto. The gate circuit receives directly both the input signals and the output signals of the delay circuits for promptly outputting an output pulse signal with a minimum duration T for all durations of input signals.

Abstract: A TiW layer (14 and 14') between a nickel plug (16 and 16') and a silicon substrate (1) of a semiconductor device precludes the formation of nickel silicides. The nickel plugs are formed by means of an electroless nickel bath to which stabilizers are added which ensure that the contact holes (13 and 13') are filled with nickel right up to the edge.

Abstract: An imaging apparatus has an imaging system (PL) and a focus detection device for determining a deviation between the image plane of the imaging system and a second plane (WS) on which imaging is to take place. The focus error detection system includes a radiation source (S) which supplies a beam (b.sub.f) having a wide wavelength band, an object grating (G.sub.1) and an image grating (G.sub.2) which are imaged onto each other via the second plane. In the focus detection system a reference beam (b.sub.r) which is reflected by the outer surface (RP) of the imaging system can be used in combination or not in combination with the wideband beam and the gratings. By using a number of such focus detection systems a tilt detection device can be realized for detecting the position of the second plane (WS) with respect to the image plane.

Abstract: A semiconductor diode laser (1) with a monitor diode (2) includes a semiconductor body with a substrate (4) and a superimposed layer structure (5) having an active layer (6) and a pn junction (7) with which radiation (24) can be generated. The monitor diode (2) is separated from the diode laser by a groove (10) which extends into the substrate (4) and of which one of the walls forms an end face of the laser. The groove (10) and the monitor diode (2) are present at the side where the main radiation beam (24) emerges, while the active layer (6) extends over at most only a small portion, preferably at most 20%, of the length of the monitor diode (2). The length in the monitor diode over which absorption takes place is preferably smaller than the absorption length for the emitted laser radiation.

Abstract: In a method of manufacturing a raster transfer image sensor, the charge transport channels and the channel-bounding regions and the vertical anti-blooming channels are formed in a self-registering manner in that the channel-bounding regions are provided via a mask, and the intervening charge transport channels are provided in a maskless doping step. Since this doping is also carried out in the channel-bounding regions, a doping profile favorable for the photosensitivity is obtained in the channel-bounding regions with a maximum concentration at a distance from the surface.

Abstract: A gate circuit includes an N-channel and a P-channel insulated gate field-effect transistor whose parallel-connected drain-source paths constitute an analog signal gate and a control circuit, connected to the respective gate electrodes, to turn on and/or turn off the two field-effect transistors. In order to handle signals whose voltage value is higher than the maximum permissible drain-source voltage in the on-state of the N-channel field-effect transistor, means are provided, for turning on the N-channel field-effect transistor at least at a drain-source voltage below a predetermined value. In an embodiment of the invention the means include delay means coupled to the control circuit for turning on the N-channel field-effect transistor with a delay relative to the P-channel field-effect transistor. In another embodiment of the invention the means include switching means arranged in series with the analog signal gate, for temporarily connecting the signal gate to at least one auxiliary voltage.

Abstract: A reference generator includes a first, a second and an additional third current mirror for generating both a reference output current and a reference output voltage. As the reference output voltage only depends on the gate-source voltages of transistors which are fed with a constant current, the reference output voltage has a constant value and is substantially independent of the ambient temperature.

Abstract: An optical lithographic device having a machine frame (1) to which is fastened a lens system (11) having a vertical optical main axis (13). Below the lens system (11), a positioning device (35) is fastened on a support member (3) of the machine frame (1), by means of which device an object table (27) is displaceable relative to the lens system (11) over a guide surface (5) of the support member (3) extending perpendicular to the optical main axis (13).The device is provided with a force actuator system (67) fastened to a reference frame (83) and controlled by a feedforward control system (95). The force actuator system (67) exerts a compensatory force on the support member (3) with a direction opposite to a direction of a reaction force simultaneously exerted by the positioning device (35) on the support member (3), and with a value which is substantially equal to a value of the said reaction force.

Abstract: A circuit arrangement for defining the positions of extrema of a correlation function includes a memory (1), an address control unit (3) and a correlator (2). The elaborate computations for defining correlation functions can be reduced by the circuit arrangement described. The correlation function is an example. Two functions are present in digital form. Their sampling values are stored in the addressable memory (1). The address control unit (3) generates addresses by which the functions stored in the memory (1) are read in a sub-sampled manner. With these sub-sampled functions the extrema and their positions are defined in a first step by the correlator (2) and the address control unit (3). Proximate to an extremum thus defined the variation of the correlation functions is examined more precisely in this proximity in a smaller sub-sampling ratio and the extremum in this proximity is redefined. This process can be repeated with an increasingly smaller sub-sampling ratio.

Abstract: A circuit arrangement generates a preset number of output pulses each time between two consecutive input pulses, the distance between the input pulses being subject to variation. The output pulses should be approximately evenly distributed, which even distribution, however, cannot be maintained when the cycle of the input pulses changes. To achieve first and foremost that the total number of output pulses is reached as quickly as possible in the case of a change in the input pulse cycle, the circuit includes a first counter device, which supplies a measure for the cycle duration of the input pulses in relation to a clock pulse, and this measure is used as a preset value for the next cycle for a further counter, which counts down the preset value in period with the clock pulses.

Abstract: For the generation of a junction voltage with a negative temperature coefficient, a band gap reference circuit includes a first semiconductor element (T) and a voltage divider (R3, R4) adapted to generate a measure of the junction voltage across a main current path of a second semiconductor element (T5), a current source (J1) being adapted to generate a reference current with a positive temperature coefficient by means of a resistive element (R1) coupled in series with the main current path. Since the reference current generates a compensation voltage with a positive temperature coefficient across the resistive element (R1) the sum of the measure of the junction voltage and the compensation voltage yields a reference voltage with a specific temperature coefficient, the presence of the voltage divider (R3, R4) inter alia enabling a reference voltage with a temperature coefficient of zero volts per temperature unit to be obtained at comparatively low supply voltages.

Abstract: In CCD arrangements, such as bidimensional image sensors, it is usual to provide the output register in the form of two (or more) horizontal registers. Via transverse connections between the horizontal registers, charge packets are transported from one horizontal register to the other horizontal register. In order to avoid delays during this transverse transport due to narrow channel effects, the clock electrodes of the first horizontal register adjoining the transverse connections are widened at the expense of adjacent clock electrodes. These widened electrodes may be in the trapezoidal form, as a result of which additional drift fields are induced below these electrodes.

Abstract: Using a NAND and a NOR gate as input gates provides a simple and efficient input buffer. In the input buffer circuit, a chip select signal is applied in inverted form to the NOR gate and in non-invented form to the NAND gate. The resulting input buffer is both simpler and faster than earlier circuits.

Abstract: An optical amplifier with a semiconductor body includes a layer structure grown on a substrate, with an active layer between two cladding layers, and a strip-shaped amplification region bounded by two end faces of low reflection which form the input and output faces for the radiation to be amplified. The active layer has a number of quantum well (QW) layers with direct band transition, and separated by barrier layers of a different semiconductor material, a first portion of the QW layers being under tensile stress. Another portion of the layers forming part of the active layer is under compressive stress. Owing to the compressive stress present locally in the amplification region, the TE-mode is more strongly amplified there than the TM-mode, while in the tensile portion of the amplification region the TM-mode is more strongly amplified than the TE-mode. This results in a polarization-insensitive amplifier with higher stress and thus with a large amplification at a relatively low current.

Abstract: A semiconductor body (1 ) is provided having a first region (4) of one conductivity type adjacent one major surface (2). An insulating layer (5) is formed on the one major surface and masking means (6,7) are used to form over first and second areas (20 and 21) of the one major surface (2) windows (8,9,10) in the insulating layer (5) through which impurities are introduced to form a relatively highly doped region (11) of the opposite conductivity type adjacent the first area (20) and a relatively lowly doped region (12) of the opposite conductivity type adjacent the second area (21). The surface (5a) of the insulating layer (5) is exposed prior to introducing impurities of the one conductivity type for forming a region (13) within the relatively lowly doped region (12) of the opposite conductivity type and with a dose sufficient to form the region (13) but not sufficient to overdope the relatively highly doped region (11) so avoiding the need to mask the first area (20) during this step.

Abstract: In power integrated circuits having both control circuit components and at least one power device, the circuit components are typically isolated from the power device by placing them in separate "wells" of opposite conductivity type to that of the underlying substrate. However, when these power integrated circuits are used in applications (such as automotive electronics) where supply voltage can be inadvertently reversed, large and potentially damaging currents can flow through the circuit components. In order to prevent such large reverse currents from flowing, an additional p-n junction is incorporated within the circuit "well", thus preventing undesirably large reverse current flow. However, introduction of this addition p-n junction creates a vertical transistor within the device, thus creating another potentially damaging current path and also creating potential reverse breakdown voltage problems.