Patents Assigned to Advanced Semiconductor Engineering
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Publication number: 20240178158Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.Type: ApplicationFiled: February 6, 2024Publication date: May 30, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-Hsien KE, Teck-Chong LEE, Chih-Pin HUNG
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Patent number: 11997888Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.Type: GrantFiled: December 13, 2021Date of Patent: May 28, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Hung Chen, Sheng-Yu Chen, Chang-Lin Yeh, Yung-I Yeh
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Patent number: 11996373Abstract: A semiconductor device package includes a substrate and a shielding layer. The substrate has a first surface, a second surface opposite to the first surface and a first lateral surface extending between the first surface and the second surface. The substrate has an antenna pattern disposed closer to the second surface than the first surface. The shielding layer extends from the first surface toward the second surface of the substrate. The shielding layer covers a first portion of the first lateral surface adjacent to the first surface of the substrate. The shielding layer exposes a second portion of the first lateral surface adjacent to the second surface of the substrate.Type: GrantFiled: February 14, 2023Date of Patent: May 28, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Jenchun Chen, An-Ping Chien
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Patent number: 11997783Abstract: The present disclosure provides an electronic device. The electronic device includes a first insulating layer, a first antenna pattern, a second insulating layer, and a second antenna pattern. The first antenna pattern is configured to operate at a first frequency and at least partially disposed over the first insulating layer. The second insulating layer is disposed over the first insulating layer. The second antenna pattern is configured to operate at a second frequency different from the first frequency and at least partially disposed over the second insulating layer. A dielectric constant of the first insulating layer is different from a dielectric constant of the second insulating layer.Type: GrantFiled: May 27, 2022Date of Patent: May 28, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Po-An Lin, Huei-Shyong Cho, Shih-Wen Lu
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Patent number: 11997798Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.Type: GrantFiled: August 30, 2022Date of Patent: May 28, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
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Publication number: 20240168238Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shao Hsuan CHUANG, Huang-Hsien CHANG
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Publication number: 20240170396Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yung-Shun CHANG, Sheng-Wen YANG, Teck-Chong LEE, Yen-Liang HUANG
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Publication number: 20240170829Abstract: The present disclosure provides an electronic package. The electronic package includes an antenna structure having a first antenna and a second antenna at least partially covered by the first antenna. The electronic package also includes a directing element covering the antenna structure. The directing element has a first portion configured to direct a first electromagnetic wave having a first frequency to transmit via the first antenna and a second portion configured to direct a second electromagnetic wave having a second frequency different from the first frequency to transmit via the second antenna. A method of manufacturing an electronic package is also provided.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jenchun CHEN, Ya-Wen LIAO
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Publication number: 20240170437Abstract: A package structure is disclosed. The package structure includes a first substrate, a second substrate, a gap, and a directing structure. The second substrate is disposed under the first substrate. The gap is between the first substrate and the second substrate. The gap includes a first region and a second region. The first region is configured to accommodate a filling material. The directing structure is disposed in a flow path of the filling material and configured to reduce a migration of the filling material from the first region to the second region.Type: ApplicationFiled: November 23, 2022Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chun Fu KUO, Shang Min CHUANG, Ching Hung CHUANG, Hsu Feng TSENG, Jia Zhen WANG
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Publication number: 20240170364Abstract: A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes at least one electronic component, a heat source, and a heat dissipation element. The heat source is adjacent to the electronic component. The heat dissipation element is disposed adjacent to the heat source and the electronic component. The heat dissipation element includes a heat transmitting structure configured to reduce heat, which is from the heat source, through the heat dissipation element, and transmitting in a direction toward the electronic component.Type: ApplicationFiled: November 23, 2022Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hung-Hsien HUANG, Wen Chun WU, Chih-Pin HUNG
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Publication number: 20240170345Abstract: A method of manufacturing a circuit pattern structure, a measurement method, and a circuit pattern structure are provided. The method of manufacturing the circuit pattern structure includes: forming a dielectric layer; forming at least one first pad at least partially in the dielectric layer; forming a second pad adjacent to the at least one first pad and having a height greater than that of the at least one first pad.Type: ApplicationFiled: November 17, 2022Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Kai LIN, Chih-Cheng LEE
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Publication number: 20240170603Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface, an optical device disposed on the first surface of the substrate, and an electronic device disposed on the second surface of the substrate. A power of the electronic device is greater than a power of the optical device. A vertical projection of the optical device on the first surface is spaced apart from a vertical projection of the electronic device on the second surface by a distance greater than zero.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Mei-Yi WU, Chang Chin TSAI, Bo-Yu HUANG, Ying-Chung CHEN
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Publication number: 20240170302Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) measuring an amount of a molding powder; (b) controlling the amount of a molding powder; and (c) dispensing the molding powder on an assembly structure including a carrier and at least one semiconductor device disposed on the carrier.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Chenghan SHE
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Patent number: 11991827Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.Type: GrantFiled: October 14, 2022Date of Patent: May 21, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun-Yen Ting, Pao-Nan Lee, Hung-Chun Kuo, Jung Jui Kang, Chang Chi Lee
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Patent number: 11988553Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.Type: GrantFiled: September 20, 2022Date of Patent: May 21, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Kuo Sin Huang, Tien-Chia Liu, Ko-Fan Tsai, Cheng-Te Chou, Yan-Te Chou
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Patent number: 11990385Abstract: An electronic device is provided. The electronic device includes an electronic component and a heat dissipation structure. The electronic component has a passive surface and a plurality of conductive vias exposed from the passive surface. The heat dissipation structure is disposed on the passive surface and configured to transmit a plurality of independent powers to the conductive vias through the passive surface.Type: GrantFiled: February 25, 2022Date of Patent: May 21, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Li-Chieh Hung, Hung-Chun Kuo
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Publication number: 20240164021Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.Type: ApplicationFiled: January 23, 2024Publication date: May 16, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Fan CHEN, Chien-Hao WANG
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Publication number: 20240162612Abstract: The present disclosure provides an electronic device. The electronic device includes a first transceiving element, a second transceiving element disposed over the first transceiving element, and a radiating structure configured to radiate a first EM wave having a lower frequency and a second EM wave having a higher frequency. The first transceiving element and the second transceiving element are collectively configured to provide a higher gain or bandwidth for the first EM wave than for the second EM wave.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-An LIN, Guan-Wei CHEN, Shih-Wen LU
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Patent number: 11982853Abstract: An optoelectronic package and a method of manufacturing an optoelectronic package are provided. The optoelectronic package includes a carrier. The carrier includes a first region and a second region. The first region is configured to supply power to a processing unit disposed on the carrier. The second region is for accommodating at least one optoelectronic device electrically coupled to the processing unit.Type: GrantFiled: October 1, 2021Date of Patent: May 14, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Jr-Wei Lin, Mei-Ju Lu
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Patent number: 11985479Abstract: An electronic module is provided. The electronic module includes a first transducer and a second transducer. The first transducer is configured to radiate a first ultrasonic wave. The second transducer is configured to radiate a second ultrasonic wave. The first transducer and the second transducer are disposed on noncoplanar surfaces.Type: GrantFiled: February 14, 2023Date of Patent: May 14, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chih Lung Lin, Kuei-Hao Tseng, Kai Hung Wang