Patents Assigned to Advanced Semiconductor Engineering
  • Patent number: 11961808
    Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Jen Wang, Po-Jen Cheng, Fu-Yuan Chen, Yi-Hsin Cheng
  • Patent number: 11961799
    Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Publication number: 20240120640
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a carrier, an antenna element and a cladding element. The carrier defines a first area and a second area adjacent to the first area. The antenna element is in the first area. The cladding element covers the antenna element and is configured for enhancing antenna gain of the antenna element. The second area is exposed from the cladding element and is distant from the antenna element.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Ya-Wen LIAO
  • Publication number: 20240120288
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate, an encapsulant and an electronic component. The encapsulant is disposed over the substrate, and has a first top surface, a second top surface and a first lateral surface extending between the first top surface and the second top surface. A roughness of the first lateral surface is less than or equal to a roughness of the second top surface. The electronic component is disposed over the second top surface of the encapsulant and electrically connected to the substrate.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Hsin LAI, Chih-Cheng LEE, Shao-Lun YANG, Wei-Chih CHO
  • Patent number: 11950926
    Abstract: An electronic device is provided. The electronic device includes a flexible body having a first portion and a second portion, an electronic component in the first portion and the second portion of the flexible body, a first magnetic element in the first portion of the flexible body and a second magnetic element in the second portion of the flexible body. The first magnetic and the second magnetic generate a repulsive force with each other when the flexible body is bent and the first portion and the second portion of the flexible body are moved toward each other.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chao Wei Liu
  • Patent number: 11955419
    Abstract: The present disclosure provides a semiconductor device package including a first substrate and an adhesive layer. The first substrate has a first surface and a conductive pad adjacent to the first surface. The conductive pad has a first surface exposed from the first substrate. The adhesive layer is disposed on the first surface of the first substrate. The adhesive layer has a first surface facing the first substrate. The first surface of the adhesive layer is spaced apart from the first surface of the conductive pad in a first direction substantially perpendicular to the first surface of the first substrate. The conductive pad and the adhesive layer are partially overlapping in the first direction.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Yi Chun Chou
  • Patent number: 11956897
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • Publication number: 20240112978
    Abstract: An electronic package is provided. The electronic package includes an insulating carrier, a first conductive layer, and an electronic component. The first conductive layer is disposed over the insulating carrier. The electronic component is disposed over the first conductive layer and electrically connected to the first conductive layer, wherein the insulating carrier is configured to dissipate heat from the electronic component to a second side of the insulating carrier opposite to a first side facing the electronic component.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Vikas GUPTA, Mark GERBER
  • Publication number: 20240113061
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Publication number: 20240112848
    Abstract: A package structure is provided. The package structure includes an electronic component and a connection element. The electronic component includes a conductive wire and a magnetic layer encapsulating the conductive wire. The connection element penetrates and contacts the magnetic layer and the conductive wire.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hung Yi CHUANG
  • Publication number: 20240109768
    Abstract: A sensor device package and method of manufacturing the same are provided. The sensor device package includes a carrier, a sensor component, an encapsulation layer and a protection film. The sensor component is disposed on the carrier, and the sensor component includes an upper surface and edges. The encapsulation layer is disposed on the carrier and encapsulates the edges of the sensor component. The protection film covers at least a portion of the upper surface of the sensor component.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chieh-An YEH, Tai-Hung KUO
  • Publication number: 20240102799
    Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ying-Chung CHEN, Hsun-Wei CHAN, Lu-Ming LAI, Kuang-Hsiung CHEN
  • Patent number: 11942385
    Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: March 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Sheng-Yu Chen, Chang-Lin Yeh, Ming-Hung Chen
  • Patent number: 11942585
    Abstract: An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: March 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsuan Wu, Chang-Yu Lin, Yu-Sheng Huang
  • Publication number: 20240096779
    Abstract: A flexible package is provided. The flexible package includes a first carrier and a second carrier. The second carrier is electrically connected to the first carrier. The second carrier is at least partially embedded in the first carrier, and an electrical connection interface between the first carrier and the second carrier is within the first carrier.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Hao CHANG
  • Publication number: 20240096862
    Abstract: A semiconductor package and a lid structure are disclosed. The semiconductor package includes a carrier, a lid structure, a first die, and a second die. The lid structure is disposed over the carrier and includes a gas inlet and a gas outlet. The first die is disposed over the carrier. The second die is disposed over the carrier. The lid structure includes a first protrusion pattern protruding toward the carrier and extending between the first die and the second die.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Ying-Chung CHEN
  • Publication number: 20240096864
    Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiang-Cheng TSAI, Ying-Chung CHEN
  • Publication number: 20240094052
    Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuo Sin HUANG, Tien-Chia LIU, Ko-Fan TSAI, Cheng-Te CHOU, Yan-Te CHOU
  • Publication number: 20240094460
    Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic component, a connection structure, and an electronic component. The photonic component has an active surface. The connection structure is in contact with the active surface of the photonic component. The electronic component is embedded in the connection structure. The connection structure includes a first redistribution structure in contact with the active surface of the photonic component.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • Patent number: 11935841
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Meng-Wei Hsieh, Yu-Pin Tsai