Patents Assigned to Advanced Semiconductor Engineering
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Publication number: 20230245963Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.Type: ApplicationFiled: April 11, 2023Publication date: August 3, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Chang-Lin YEH
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Publication number: 20230244049Abstract: The present disclosure relates to an electronic device that includes a waveguide, a plurality of transceiving portions over the waveguide, and a cavity between the waveguide and the transceiving portions and connecting the waveguide with the transceiving portions. The cavity is configured for resonating of an electromagnetic wave from the waveguide or the transceiving portions.Type: ApplicationFiled: January 28, 2022Publication date: August 3, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-I WU, Ming-Fong JHONG
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Publication number: 20230240057Abstract: An electronic device is disclosed. The electronic device includes a first electronic component, a first power regulator disposed above the first electronic component. The first power regulator is configured to receive a first power along a lateral surface of the first electronic component without passing the first electronic component and to provide a second power to the first electronic component. The electronic device also includes a passive component disposed in an electrical path between the first electronic component and the first power regulator.Type: ApplicationFiled: January 26, 2022Publication date: July 27, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Li-Chieh HUNG, Chen-Chao WANG
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Publication number: 20230230966Abstract: The present disclosure provides an electronic package. The electronic package includes a substrate, a first component disposed on the substrate and configured to detect an external signal, and an encapsulant disposed on the substrate. The electronic package also includes a protection element disposed on the substrate and physically separating the first device from the encapsulant and exposing the first device. The present disclosure also provides an electronic device.Type: ApplicationFiled: January 14, 2022Publication date: July 20, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wei-Hao CHANG
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Publication number: 20230230953Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.Type: ApplicationFiled: March 20, 2023Publication date: July 20, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yi Dao WANG, Tung Yao LIN, Rong He GUO
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Publication number: 20230223352Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.Type: ApplicationFiled: March 14, 2023Publication date: July 13, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG
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Publication number: 20230223354Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.Type: ApplicationFiled: March 14, 2023Publication date: July 13, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei Da LIN, Meng-Jen WANG, Hung Chen KUO, Wen Jin HUANG
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Publication number: 20230223676Abstract: A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.Type: ApplicationFiled: March 7, 2023Publication date: July 13, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Yuanhao YU
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Publication number: 20230215810Abstract: A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Pao-Nan LEE, Chen-Chao WANG, Chang Chi LEE
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Publication number: 20230215790Abstract: An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.Type: ApplicationFiled: January 5, 2022Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chiung-Ying KUO, Hung-Chun KUO
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Publication number: 20230216174Abstract: An electronic package and a method of manufacturing an electronic package are provided. The electronic package includes a carrier, an antenna substrate, and an electronic component. The carrier has a first surface and a second surface. The antenna substrate includes a resonant cavity and is disposed over the first surface. The antenna substrate is closer to the first surface than the second surface of the carrier. The electronic component is disposed between the antenna substrate and the second surface of the carrier.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chung Ju YU, Shao-Lun YANG, Chun-Hung YEH, Hong Jie CHEN, Tsung-Wei LU, Wei Shuen KAO
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Publication number: 20230215775Abstract: An electronic package is provided in the present disclosure. The electronic package comprises: an electronic component; a thermal conductive element above the electronic component, wherein thermal conductive element includes a first metal; an adhesive layer between the electronic component and the thermal conductive element, wherein the first adhesive layer includes a second metal; and an intermetallic compound (IMC) between the first metal and the second metal.Type: ApplicationFiled: January 5, 2022Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Chang-Lin YEH
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Publication number: 20230215822Abstract: An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Meng-Wei HSIEH, Hung-Yi LIN, Hsu-Chiang SHIH, Cheng-Yuan KUNG
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Publication number: 20230215816Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yuan KUNG, Hsu-Chiang SHIH, Hung-Yi LIN, Chien-Mei HUANG
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Publication number: 20230208394Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: ApplicationFiled: February 21, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
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Publication number: 20230208175Abstract: An electronic device package and a method for manufacturing the electronic device are provided. The electronic device includes a charging element, a housing covering the charging element and a sensing element electrically connected to the housing. The sensing element is configured to detect an external device and to drive the charging element.Type: ApplicationFiled: December 23, 2021Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wei-Hao Chang
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Publication number: 20230207729Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.Type: ApplicationFiled: February 28, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tang-Yuan CHEN, Meng-Wei HSIEH, Cheng-Yuan KUNG
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Publication number: 20230207521Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.Type: ApplicationFiled: February 21, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yung-Hsing CHANG, Wen-Hsin LIN
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Publication number: 20230207524Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: ApplicationFiled: February 28, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
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Publication number: 20230199378Abstract: An electronic module is provided. The electronic module includes a first transducer and a second transducer. The first transducer is configured to radiate a first ultrasonic wave. The second transducer is configured to radiate a second ultrasonic wave. The first transducer and the second transducer are disposed on noncoplanar surfaces.Type: ApplicationFiled: February 14, 2023Publication date: June 22, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chih Lung LIN, Kuei-Hao TSENG, Kai Hung WANG
