Patents Assigned to Advanced Semiconductor Engineering
  • Patent number: 12021044
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first conductive component, a second conductive component, a planarization layer and an antenna layer. The second conductive component is disposed adjacent to the first conductive component. The second conductive component and the first conductive component have different thicknesses. The planarization layer is disposed on the first conductive component. The antenna layer is disposed on the first conductive component and the second conductive component.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: June 25, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Publication number: 20240197176
    Abstract: The present disclosure provides a sensing device. The sensing device includes a flexible element having a first sensing area, an electronic component embedded within the flexible element, and an adjustable conductive element disposed in the flexible element and configured to electrically connect the first sensing area of the flexible element with the electronic component.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuei-Hao TSENG, Kai Hung WANG, Kai-Di LU, Yu-Chih LEE, Cheng-Tsao PENG, Pang Yuan LEE
  • Publication number: 20240203896
    Abstract: The present disclosure provides a semiconductor device package including a carrier, an electronic component, and a shielding layer. The carrier includes a predetermined non-shielding region. The electronic component is disposed over the predetermined non-shielding region. The shielding layer includes a first portion disposed over the predetermined non-shielding region.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240203897
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface, an electrical contact disposed over a first region of the substrate, and an EMI shielding layer disposed over the substrate. The EMI shielding layer includes a non-uniform thickness and an elevation of the EMI shielding layer is higher than an elevation of the electrical contact with respect to the first surface of the substrate. A method for manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240194620
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Publication number: 20240194609
    Abstract: An electronic device is disclosed. The electronic device includes a first component, a second component, and a first bridge component configured to electrically connect the first component with the second component. The first component is configured to transmit a first signal downwardly without passing the first bridge component and the second component is configured to transmit/receive a second signal to/from outside of the electronic device. A transmission speed of the second signal is higher than a transmission speed of the first signal.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Ying-Nan LIU, Min-Yao CHENG, Eelco BERGMAN
  • Publication number: 20240194493
    Abstract: A substrate includes a dielectric structure, a conductive layer, a first hole and a second hole. The conductive layer is stacked on the dielectric structure. The first hole extends from a top surface of the conductive layer and exposes the dielectric structure. The second hole is spaced apart from the first hole, extends from the top surface of the conductive layer and exposes the dielectric structure. A first depth of the first hole is substantially equal to a second depth of the second hole. An elevation of a topmost end of the first hole is different from an elevation of a topmost end of the second hole.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Hung YEH, Bing-Xiu LU, Yu Lin LU, Tai-Yuan HUANG
  • Patent number: 12009353
    Abstract: An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tsung-Yueh Tsai, Meng-Jen Wang, Yu-Fang Tsai, Meng-Jung Chuang
  • Patent number: 12009317
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate, a semiconductor device, an encapsulant, a balance structure, and a warpage-resistant layer. The semiconductor device is disposed on the substrate. The encapsulant encapsulates the semiconductor device. The balance structure is on the semiconductor device and contacting the encapsulant. The warpage-resistant layer is between the semiconductor device and the balance structure. The encapsulant contacts a lateral surface of the warpage-resistant layer.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt, Kay Stefan Essig
  • Patent number: 12009313
    Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Jen Wang, Chien-Yuan Tseng, Hung Chen Kuo, Ying-Hao Wei, Chia-Feng Hsu, Yuan-Long Chiao
  • Patent number: 12009351
    Abstract: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The semiconductor device package includes a first substrate, a second substrate disposed over the first substrate and having a first surface facing away from the first substrate and a second surface facing the first substrate, a first component disposed on the first surface of the second substrate, a second component disposed on the second surface of the second substrate; and a support member covering the first component.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wei-Hao Chang
  • Patent number: 12009312
    Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a substrate having a first face and an opposing second face, wherein the first face is mounted with a first semiconductor component and a plurality of connectors; and a first shielding member covering the first semiconductor component and a first group of the plurality of connectors, while exposing a second group of the plurality of connectors.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chanyuan Liu, Kuo-Hsien Liao, Yu-Hsiang Sun
  • Publication number: 20240180487
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier having a component side and a sensing side opposite to the component side. The sensing side has a thinned portion. The electronic device also includes a first sensing element disposed over the sensing side and a second sensing element disposed over the sensing side. The first sensing element and the second sensing element are arranged along a primary direction of the electronic device. The thinned portion is between the first sensing element and the second sensing element and is configured to provide adjustment to a relative position between the first sensing element and the second sensing element.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chun-Kai CHANG
  • Publication number: 20240186193
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Chih-Yi HUANG, Keng-Tuan CHANG
  • Publication number: 20240186201
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Han WANG, Ian HU
  • Publication number: 20240186226
    Abstract: A semiconductor device package includes a substrate, a first insulation layer and an electrical contact. The first insulation layer is disposed on the first surface of the substrate. The electrical contact is disposed on the substrate and has a first portion surrounded by the first insulation layer and a second portion exposed from the first insulation layer, and a neck portion between the first portion and the second portion of the electrical contact. Further, the second portion tapers from the neck portion.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering Korea, Inc.
    Inventors: Soonheung BAE, Hyunjoung KIM
  • Publication number: 20240186223
    Abstract: A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Wen LU
  • Patent number: 12002729
    Abstract: A electronic package and a method of manufacturing the same are provided. The electronic package includes an electronic component, a thermal spreading element, and an encapsulant. The electronic component has a first surface. The thermal spreading element is disposed over the electronic component and has a first surface facing the first surface of the electronic component. The encapsulant covers the electronic component and has a first surface closer to the first surface of the thermal spreading element than the first surface of the electronic component.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: June 4, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Patent number: 12002743
    Abstract: An electronic carrier and a method of manufacturing an electronic carrier are provided. The electronic carrier includes a first interconnection structure and a second interconnection structure. The first interconnection structure includes a first patterned conductive layer having a first pattern density. The second interconnection structure is laminated to the first interconnection structure and includes a second patterned conductive layer having a second pattern density higher than the first pattern density. The first interconnection structure is electrically coupled to the second interconnection structure through a first non-soldering joint between and outside of the first interconnection structure and the second interconnection structure.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: June 4, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Publication number: 20240175745
    Abstract: An optical system and a method of manufacturing an optical system are provided. The optical system includes a carrier, a light emitter, a light receiver, a block structure and an encapsulant. The light emitter is disposed on the carrier. The light receiver is disposed on the carrier and physically spaced apart from the light emitter. The light receiver has a light detecting area. The block structure is disposed on the carrier. The encapsulant is disposed on the carrier and covers the light emitter, the light receiver and the block structure. The encapsulant has a recess over the block structure.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Ying-Chung CHEN