Patents Assigned to Advanced Semiconductor Engineering
  • SUBSTRATE, SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20240030120
    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE
  • PACKAGE STRUCTURE, ASSEMBLY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20240021540
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Application
    Filed: August 15, 2023
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
  • OPTOELECTRONIC PACKAGE
    Publication number: 20240019647
    Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic component, an optical component, and a connection element. The photonic component includes an optical transmission portion, which includes a plurality of first terminals exposed from a first surface of the photonic component. The optical component faces the first surface of the photonic component. The optical component is configured to transmit optical signals to or receive optical signals from the optical transmission portion. The connection element is disposed between the first surface of the photonic component and the optical component. The connection element is configured to reshape the optical signals.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • ELECTRONIC DEVICE
    Publication number: 20240023239
    Abstract: An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE
  • OPTICAL DEVICE
    Publication number: 20240006396
    Abstract: An optical device is provided. The optical device includes a processing component, a first electronic component, a second electronic component, a first pillar, and an encapsulant. The first electronic component is disposed over and electrically connected to the processing component. The second electronic component is disposed over the processing component and electrically connected to the first electronic component. The first pillar is disposed between the first electronic component and the second electronic component and electrically connected to the processing component. The encapsulant is disposed over the processing component. The encapsulant encapsulates the first electronic component, the second electronic component, and the first pillar.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • ELECTRONIC DEVICE
    Publication number: 20240008184
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • ELECTRONIC DEVICES
    Publication number: 20230420418
    Abstract: An electronic device is provided. The electronic device includes a first die and a second die. The second die is disposed over the first die. A backside surface of the second die faces a backside surface of the first die. An active surface of the second die is configured to receive a first power. The second die is configured to provide the first die with a second power through the backside surface of the second die and the backside surface of the first die.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • SEMICONDUCTOR PACKAGE STRUCTURE
    Publication number: 20230420416
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a carrier, a first electronic component, a second electronic component, a third electronic component, a fourth electronic component, and a connection element. The first electronic component is disposed over a surface of the carrier. The second electronic component is disposed over the first electronic component. The third electronic component is spaced apart from the first electronic component and disposed over the surface of the carrier. The fourth electronic component is disposed over the third electronic component. The connection element is electrically connecting the second electronic component to the fourth electronic component.
    Type: Application
    Filed: September 12, 2023
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Chi LEE, Jyan-Ann HSIA
  • ELECTRONIC DEVICES
    Publication number: 20230420395
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Cheng LIN, Hung-Yi LIN, Cheng-Yuan KUNG, Hsu-Chiang SHIH, Cheng-Yu HO
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230413454
    Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: August 29, 2023
    Publication date: December 21, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Yung I YEH, Chang-Lin YEH, Sheng-Yu CHEN
  • SEMICONDUCTOR DEVICE PACKAGES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20230411349
    Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.
    Type: Application
    Filed: August 29, 2023
    Publication date: December 21, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tang-Yuan CHEN, Meng-Kai SHIH, Teck-Chong LEE, Shin-Luh TARNG, Chih-Pin HUNG
  • ELECTRONIC PACKAGE
    Publication number: 20230400648
    Abstract: The present disclosure provides an electronic package. The electronic package includes a photonic component including a first input/output (I/O) port and a second I/O port both at a side of the photonic component. The electronic package also includes a connector disposed adjacent to the side of the photonic component and configured to guide a first light carrying medium to be optically coupled with at least one of the first I/O port and second I/O port of the photonic component.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Min-Yao CHENG, Hung-Yi LIN
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230402738
    Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Guo-Cheng LIAO, Yi Chuan DING
  • SYSTEM COMPRISING PACKAGED OPTICAL DEVICES
    Publication number: 20230403078
    Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Yu LIN, Cheng-Yuan KUNG, Hung-Yi LIN
  • PACKAGE STRUCTURE AND TESTING METHOD
    Publication number: 20230393194
    Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 7, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Tsung-Tang TSAI, Chih-Yi HUANG
  • SEMICONDUCTOR DEVICE PACKAGE INCLUDING STRESS BUFFERING LAYER
    Publication number: 20230387092
    Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Mei HUANG, Shih-Yu WANG, I-Ting LIN, Wen Hung HUANG, Yuh-Shan SU, Chih-Cheng LEE, Hsing Kuo TIEN
  • WIRING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20230386990
    Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a lower conductive structure, an upper conductive structure and a conductive via. The lower conductive structure includes a first dielectric layer and a first circuit layer in contact with the first dielectric layer. The upper conductive structure is attached to the lower conductive structure. The upper conductive structure includes a plurality of second dielectric layers, a plurality of second circuit layers in contact with the second dielectric layers, and defines an accommodating hole. An insulation material is disposed in the accommodating hole. The conductive via extends through the insulation material, and electrically connects the lower conductive structure.
    Type: Application
    Filed: August 15, 2023
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • ELECTRONIC DEVICE
    Publication number: 20230389173
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first insulating layer, a first antenna pattern, a second insulating layer, and a second antenna pattern. The first antenna pattern is configured to operate at a first frequency and at least partially disposed over the first insulating layer. The second insulating layer is disposed over the first insulating layer. The second antenna pattern is configured to operate at a second frequency different from the first frequency and at least partially disposed over the second insulating layer. A dielectric constant of the first insulating layer is different from a dielectric constant of the second insulating layer.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-An LIN, Huei-Shyong CHO, Shih-Wen LU
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230387046
    Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • CONDUCTIVE STRUCTURE AND WIRING STRUCTURE INCLUDING THE SAME
    Publication number: 20230387034
    Abstract: A conductive structure includes a core portion, a plurality of electronic devices and a filling material. The core portion defines a cavity. The electronic devices are disposed in the cavity of the core portion. The filling material is disposed between the electronic devices and a sidewall of the cavity of the core portion.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG