Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20230033515
    Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, and a first circuit layer disposed on the substrate. The first circuit layer includes a conductive wiring pattern, and the conductive wiring pattern is an uppermost conductive pattern of the first circuit layer. The stress buffering structure is disposed on the first conductive structure. The second conductive structure is disposed over the stress buffering structure. The conductive wiring pattern extends through the stress buffering structure and electrically connected to the second conductive structure, and an upper surface of the conductive wiring pattern is substantially coplanar with an upper surface of the stress buffering structure.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 2, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsing Kuo TIEN, Chih-Cheng LEE
  • Publication number: 20230030133
    Abstract: A semiconductor device package includes a carrier, a first conductive post and a first adhesive layer. The first conductive post is disposed on the carrier. The first conductive post includes a lower surface facing the carrier, an upper surface opposite to the lower surface and a lateral surface extended between the upper surface and the lower surface. The first adhesive layer surrounds a portion of the lateral surface of the first conductive post. The first adhesive layer comprises conductive particles and an adhesive. The first conductive post has a height measured from the upper surface to the lower surface and a width. The height is greater than the width.
    Type: Application
    Filed: October 11, 2022
    Publication date: February 2, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Yu-Ying LEE
  • Publication number: 20230023398
    Abstract: An antenna device and a method for manufacturing the same are provided. The antenna device includes a carrier, an antenna portion, a first portion and a second portion. The antenna portion is located on the carrier. The first portion is located on the carrier. The second portion is located on the carrier and is configured for blocking a material from entering the antenna area, wherein the material covers a lateral surface of the carrier.
    Type: Application
    Filed: July 22, 2021
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Shyue-Long LOUH
  • Publication number: 20230025850
    Abstract: A circuit structure and an electronic structure are provided. The circuit structure includes a low-density conductive structure, a high-density conductive structure and an electrical connection structure. The high-density conductive structure is disposed on the low-density conductive structure. The electrical connection structure extends through the high-density conductive structure and is electrically connected to the low-density conductive structure. The electrical connection structure includes a shoulder portion.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Publication number: 20230026633
    Abstract: A semiconductor package device includes a substrate, an electronic component, and a thermal conductive layer. The electronic component is disposed on the substrate and includes a first surface facing away from the substrate. The thermal conductive layer is disposed above the first surface of the electronic component. The thermal conductive layer includes a plurality of portions spaced apart from each other.
    Type: Application
    Filed: October 4, 2022
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shiu-Fang YEN, Chang-Lin YEH, Jen-Chieh KAO
  • Publication number: 20230024293
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.
    Type: Application
    Filed: July 22, 2021
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Meng-Wei HSIEH
  • Publication number: 20230027674
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng CHEN, Huang-Hsien CHANG, Wen-Long LU, Shao Hsuan CHUANG, Ching-Ju CHEN, Tse-Chuan CHOU
  • Publication number: 20230017424
    Abstract: The present disclosure provides an electronic apparatus including a first surface, a second surface, a third surface, a plurality of conductive elements, and an encapsulant. The second surface is nonparallel to the first surface. The third surface is distinct from the first surface and the second surface. The plurality of conductive elements are exposed from the second surface. The encapsulant covers the third surface and exposes the first surface and the second surface.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pang Yuan LEE, Kuei-Hao TSENG, Chih Lung LIN
  • Publication number: 20230016985
    Abstract: A package structure and a method for manufacturing a package structure are provided. The package structure includes a substrate, at least one redistribution structure, at least one electronic component and at least one semiconductor die. The substrate has a first surface and a second surface opposite to the first surface. The at least one redistribution structure is disposed on the first surface of the substrate. The at least one electronic component is disposed on the first surface of the substrate. The at least one semiconductor die is disposed on the at least one redistribution structure and electrically connected to the at least one electronic component through the substrate.
    Type: Application
    Filed: September 28, 2022
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Publication number: 20230017013
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a second electronic component, and a reinforcement component. The reinforcement component is disposed above the first electronic component and the second electronic component. The reinforcement component is configured to reduce warpage.
    Type: Application
    Filed: July 15, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Hsiu-Chi LIU
  • Publication number: 20230018031
    Abstract: An electronic device, a package structure and an electronic manufacturing method are provided. The electronic device includes a substrate, a first bump, a second bump and a first reflowable material. The first bump is disposed over the substrate, and has a first width. An end portion of the first bump defines a first recess portion. The second bump is disposed over the substrate, and has a second width less than the first width. The first reflowable material is disposed on the first bump and extends in the first recess portion.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Pei-Jen LO
  • Publication number: 20230019715
    Abstract: The present disclosure provides a detection module including a carrier configured to be adjustable to at least partially conform to a shape of a wearable object. The detection module further includes a sensing element in contact with the carrier and at least partially exposed from the carrier.
    Type: Application
    Filed: July 15, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Chih LEE, Chih Lung LIN
  • Publication number: 20230018762
    Abstract: An electronic structure, an electronic package structure and method of manufacturing an electronic device are provided. The electronic structure includes a carrier and a protection layer. The carrier includes a first pad, a second pad and a first dielectric layer. The first pad is at a side of the carrier and configured to bond with a conductive pad. The second pad is at the side of carrier and configured to electrically connect an exterior circuit. The first dielectric layer includes a first portion around the first pad and a second portion around the second pad, wherein a top surface of the first portion and a top surface of the second portion are substantially coplanar. The protection layer is on the second pad and covers the second pad.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shun-Tsat TU
  • Publication number: 20230009219
    Abstract: A semiconductor device, a semiconductor device package, and a method of manufacturing a semiconductor device package are provided. The semiconductor device includes an electronic component and a first protection layer. The electronic component includes a first conductive pad protruded out of a first surface of the electronic component. The first protection layer covers an external surface of the first conductive pad. The first surface of the electronic component is exposed from the first protection layer.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsing Kuo TIEN, Chih-Cheng LEE
  • Publication number: 20230011464
    Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung HUANG, Meng-Kai SHIH, Wei-Hong LAI, Wei Chu SUN
  • Publication number: 20230006114
    Abstract: An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.
    Type: Application
    Filed: July 2, 2021
    Publication date: January 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Hsuan WU, Chang-Yu LIN, Yu-Sheng HUANG
  • Publication number: 20230005970
    Abstract: A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.
    Type: Application
    Filed: September 6, 2022
    Publication date: January 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Yung I YEH, Chang-Lin YEH, Sheng-Yu CHEN
  • Publication number: 20230003956
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. A semiconductor package structure includes a first electronic component and a light emitter. The photonic component includes a substrate and a first port. The light emitter is disposed over the substrate of the photonic component. The light emitter is configured to emit light through the first port. A coupling loss between the first port of the photonic component and the light emitter is less than 3 dB.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Feng YOU, Yu-Yuan YEH, Jun-Wei CHEN
  • Publication number: 20230005841
    Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.
    Type: Application
    Filed: September 12, 2022
    Publication date: January 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yencheng KUO, Shao-Lun YANG
  • Publication number: 20220418115
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Application
    Filed: August 30, 2022
    Publication date: December 29, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN