Patents Assigned to Advanced Semiconductor Engineering
  • Recessed portion in a substrate and method of forming the same
    Patent number: 11886015
    Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: January 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao Hsuan Chuang, Huang-Hsien Chang
  • ELECTRONIC DEVICE
    Publication number: 20240030135
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first region and a second region distinct from the first region. The electronic device also includes an electronic component covering the first region and at least partially exposing the second region. The electronic device also includes a first power regulating element in the second region of the carrier and a second power regulating element. The second power regulating element is disposed adjacent to the first power regulating element and electrically connected to the electronic component through the first power regulating element to provide a first power path.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • SUBSTRATE, SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20240030120
    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE
  • ELECTRONIC DEVICE
    Publication number: 20240030125
    Abstract: An electronic device is disclosed. The electronic device includes a first circuit structure, a first die, a second die, and a third die. The first die is disposed below the first circuit structure. The second die is disposed below the first circuit structure. The third die is disposed above the first circuit structure and electrically connects the first die to the second die. The first die communicates with the second die through the third die.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE
  • Embedded component package structure and manufacturing method thereof
    Patent number: 11882660
    Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: January 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Fan Chen, Chien-Hao Wang
  • Semiconductor package structure having substrate with embedded electronic component and conductive pillars
    Patent number: 11881448
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: January 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt, Kay Stefan Essig
  • PACKAGE STRUCTURE, ASSEMBLY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20240021540
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Application
    Filed: August 15, 2023
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
  • ELECTRONIC DEVICE
    Publication number: 20240023239
    Abstract: An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE
  • OPTOELECTRONIC PACKAGE
    Publication number: 20240019647
    Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic component, an optical component, and a connection element. The photonic component includes an optical transmission portion, which includes a plurality of first terminals exposed from a first surface of the photonic component. The optical component faces the first surface of the photonic component. The optical component is configured to transmit optical signals to or receive optical signals from the optical transmission portion. The connection element is disposed between the first surface of the photonic component and the optical component. The connection element is configured to reshape the optical signals.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • Electronic module
    Patent number: 11876551
    Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Wen Lu, Chun-Jen Chen, Po-Hsiang Tseng, Hsin-Han Lin, Ming-Lun Yu
  • Electronic device
    Patent number: 11874515
    Abstract: The present disclosure relates to an electronic device that includes a waveguide, a plurality of transceiving portions over the waveguide, and a cavity between the waveguide and the transceiving portions and connecting the waveguide with the transceiving portions. The cavity is configured for resonating of an electromagnetic wave from the waveguide or the transceiving portions.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: January 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po-I Wu, Ming-Fong Jhong
  • Electronic device
    Patent number: 11870152
    Abstract: The present disclosure relates to an electronic device that includes a first radiating element configured to radiate a first electromagnetic wave and a second radiating element configured to radiate a second electromagnetic wave. A first radiation pattern of the first electromagnetic wave is configured to be adjusted, and a second radiation pattern of the second electromagnetic wave is configured to be fixed.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Shih-Wen Lu
  • Optoelectronic device
    Patent number: 11867956
    Abstract: An optoelectronic device includes a photonic component. The photonic component includes an active side, a second side different from the active side, and an optical channel extending from the active side to the second side of the photonic component. The optical channel includes a non-gaseous material configured to transmit light.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jr-Wei Lin, Sin-Yuan Mu, Chia-Sheng Cheng
  • Semiconductor package through hole with lever arms and insulating layers with different coefficient of thermal expansion
    Patent number: 11869828
    Abstract: A semiconductor package includes a first die. The first die includes a semiconductor substrate. The semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall. The inner wall has a first lever arm. A length of the first lever arm is less than a thickness of the semiconductor substrate.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: January 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi-Chi Chen, Ming-Han Wang
  • OPTICAL DEVICE
    Publication number: 20240006396
    Abstract: An optical device is provided. The optical device includes a processing component, a first electronic component, a second electronic component, a first pillar, and an encapsulant. The first electronic component is disposed over and electrically connected to the processing component. The second electronic component is disposed over the processing component and electrically connected to the first electronic component. The first pillar is disposed between the first electronic component and the second electronic component and electrically connected to the processing component. The encapsulant is disposed over the processing component. The encapsulant encapsulates the first electronic component, the second electronic component, and the first pillar.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • ELECTRONIC DEVICE
    Publication number: 20240008184
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Electronic package structure and method of manufacturing the same
    Patent number: 11862550
    Abstract: An electronic package structure and a method of manufacturing an electronic package structure are provided. The electronic package structure includes a substrate, a conductive element, and a support structure. The substrate has a bottom surface and a lateral surface angled with the bottom surface. The conductive element is on the lateral surface of the substrate. The support structure is on the bottom surface of the substrate and configured to space the bottom surface from an external carrier. A lateral surface of the support structure is spaced apart from the lateral surface of the substrate by a first distance.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 2, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Yu-Ying Lee
  • Semiconductor package structure and method of manufacturing the same
    Patent number: 11862587
    Abstract: A semiconductor package structure and a method of manufacturing the semiconductor package structure are disclosed. The semiconductor package structure includes a first semiconductor device having an active surface, a redistribution structure in electrical connection with the first semiconductor device, and a second semiconductor device bonded to the active surface of the first semiconductor device, and disposed between the first semiconductor device and the redistribution structure.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: January 2, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Mark Gerber
  • Electronic assembly
    Patent number: 11862544
    Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: January 2, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang-Lin Yeh, Jen-Chieh Kao
  • Antenna module and semiconductor device package
    Patent number: 11862855
    Abstract: The present disclosure provides an antenna module including a substrate, a first antenna disposed on the substrate and a second antenna disposed on the substrate and spaced apart from the first antenna. The first antenna is configured to have a first operating frequency and the second antenna is configured to have a second operating frequency different from the first operating frequency. The antenna module further includes an element configured to focus an electromagnetic wave transmitted or received by the first antenna and the second antenna. A semiconductor device package is also disclosed.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: January 2, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jenchun Chen, Ya-Wen Liao