Abstract: The present disclosure provides an electronic device. The electronic device includes a display module having a grounding element disposed under the display module and an antenna pattern. The grounding element is configured to function as a reference ground of the antenna pattern. A wearable device is also provided.
Type:
Application
Filed:
April 23, 2021
Publication date:
October 27, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Yuanhao YU, Wei Fan WU, Feng Chuan TSAI, Mingjhih TSAI, Shih Yuan HO
Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
Type:
Application
Filed:
April 23, 2021
Publication date:
October 27, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a semiconductor device package including a first substrate, a second substrate disposed over the first substrate, an electronic component disposed between the first substrate and the second substrate, a spacer disposed between the first substrate and the electronic component, and a supporting element disposed on the first substrate and configured to support the second substrate. The spacer is configured to control a distance between the first substrate and the second substrate through the electronic component. A method of manufacturing a semiconductor device package is also disclosed.
Type:
Application
Filed:
April 23, 2021
Publication date:
October 27, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An electronic module is provided. The electronic module includes a first transducer and a second transducer. The first transducer is configured to radiate a first ultrasonic wave. The second transducer is configured to radiate a second ultrasonic wave. A location of the first transducer is configured to be adjustable with respect to the second transducer.
Type:
Application
Filed:
April 27, 2021
Publication date:
October 27, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Chih Lung LIN, Kuei-Hao TSENG, Kai Hung WANG
Abstract: The present disclosure provides an electronic device and method of manufacturing the same. The electronic device includes a first region, a second region, an electronic component, and a first sensing element. The second region is adjacent to the first region. The first region has a first pliability. The second region has a second pliability. The second pliability is greater than the first pliability. The electronic component is disposed at the first region. The first sensing element is disposed at the second region and electrically connected to the electronic component.
Type:
Application
Filed:
April 23, 2021
Publication date:
October 27, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The semiconductor device package includes a first substrate with a aperture, a second substrate disposed on the first substrate, a first electronic component disposed on the second substrate, an encapsulant disposed on the first substrate and covering the second substrate and a first heat dissipation structure extending through the aperture and attached to the second substrate.
Type:
Application
Filed:
April 16, 2021
Publication date:
October 20, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A conductive structure, a package structure and a method for manufacturing the same are provided. The conductive structure includes a main portion, a first electrical contact, a second electrical contact, a first post and a second post. The main portion has a first surface and a second surface opposite to the first surface. The first electrical contact is disposed adjacent to the first surface of the main portion. The second electrical contact is disposed adjacent to the second surface of the main portion and electrically connected to the first electrical contact. The first post is electrically connected to the first electrical contact. The second post is electrically connected to the second electrical contact.
Type:
Application
Filed:
April 16, 2021
Publication date:
October 20, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.
Type:
Application
Filed:
April 16, 2021
Publication date:
October 20, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.
Type:
Application
Filed:
April 8, 2021
Publication date:
October 13, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
Abstract: A bonding device for bonding an electronic element includes an engaging component. The engaging component has a first surface and a second surface opposite to the first surface. The engaging component includes a plurality of recesses at the second surface. The plurality of recesses are configured to cover a plurality of projections of an electronic element. The engaging component is coupled to a heating component.
Type:
Application
Filed:
April 8, 2021
Publication date:
October 13, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides an antenna module including a substrate, a first antenna disposed on the substrate and a second antenna disposed on the substrate and spaced apart from the first antenna. The first antenna is configured to have a first operating frequency and the second antenna is configured to have a second operating frequency different from the first operating frequency. The antenna module further includes an element configured to focus an electromagnetic wave transmitted or received by the first antenna and the second antenna. A semiconductor device package is also disclosed.
Type:
Application
Filed:
April 7, 2021
Publication date:
October 13, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface, an optical device disposed on the first surface of the substrate, and an electronic device disposed on the second surface of the substrate. A power of the electronic device is greater than a power of the optical device. A vertical projection of the optical device on the first surface is spaced apart from a vertical projection of the electronic device on the second surface by a distance greater than zero.
Type:
Application
Filed:
April 9, 2021
Publication date:
October 13, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a wearable device. The wearable device includes a first sensing element configured to be disposed adjacent to a right ear of a user while the wearable device is worn by the user and a second sensing element configured to be disposed adjacent to a left ear of the user and coupled to the first sensing element while the wearable device is worn by the user. The second sensing element and the first sensing element are configured to sense a biological signal from the user. The wearable device also includes a reference electrode configured to reduce an interference to the biological signal. A headset device and a method for operating a wearable device is also provided in the present disclosure.
Type:
Application
Filed:
March 31, 2021
Publication date:
October 6, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a wearable device. The wearable device includes a first element and a second element. The first element is configured to sense a bio-signal from a user. The second element is configured to transmit the bio-signal to a processor. The second element has a first surface and a second surface non-coplanar with the first surface. The first element is in contact with the first surface and the second surface of the second element.
Type:
Application
Filed:
March 31, 2021
Publication date:
October 6, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a dielectric layer, an electronic component, a first conductive layer, and a conductive element. The dielectric layer has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the dielectric layer. The first conductive layer is embedded in the dielectric layer and adjacent to the first surface of the dielectric layer. The conductive element is disposed on the first surface of the dielectric layer and in contact with the first conductive layer.
Type:
Application
Filed:
April 6, 2021
Publication date:
October 6, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first substrate, a second substrate, and a solid solution layer. The first substrate includes a first metal layer, and the first metal layer includes a first metal. The second substrate includes a second metal layer. The solid solution layer electrically connects the first metal layer to the second metal layer. The solid solution layer includes a first metal-rich layer.
Type:
Application
Filed:
March 31, 2021
Publication date:
October 6, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.
Type:
Application
Filed:
March 26, 2021
Publication date:
September 29, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An assembly structure and a method for manufacturing an assembly structure are provided. The assembly structure includes a wiring structure and a semiconductor element. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the at least one dielectric layer, and defines an accommodating recess recessed from a top surface of the wiring structure. The wiring structure has a smooth surface extending from the top surface of the wiring structure to a surface of the accommodating recess. The semiconductor element is disposed in the accommodating recess.
Type:
Application
Filed:
March 25, 2021
Publication date:
September 29, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, an encapsulant, a second carrier and one or more supporters. The first carrier has a first surface and a first side contiguous with the first surface. The encapsulant is on the first surface of the first carrier, and the first side of the first carrier is exposed from the encapsulant. The second carrier is disposed over the first carrier. The one or more supporters are spaced apart from the first side of the first carrier and connected between the first carrier and the second carrier. The one or more supporters are arranged asymmetrically with respect to the geographic center of the first carrier. The one or more supporters are fully sealed in the encapsulant.
Type:
Application
Filed:
June 14, 2022
Publication date:
September 29, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A substrate structure, a package structure, and a method for manufacturing an electronic package structure provided. The substrate structure includes a dielectric layer, a trace layer, and at least one wettable flank. The dielectric layer has a first surface and a second surface opposite to the first surface. The trace layer is embedded in the dielectric layer and exposed from the first surface of the dielectric layer. The at least one wettable flank is stacked with a portion of the trace layer embedded in the dielectric layer.
Type:
Application
Filed:
March 25, 2021
Publication date:
September 29, 2022
Applicant:
Advanced Semiconductor Engineering, Inc.