Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20220236480
    Abstract: An optical communication package structure includes a wiring structure, at least one via structure, a redistribution structure, at least one optical device and at least one electrical device. The wiring structure includes a main portion and a conductive structure disposed on an upper surface of the main portion. The main portion defines at least one through hole extending through the main portion. The via structure is disposed in the at least one through hole of the main portion and electrically connected to the conductive structure. The redistribution structure is disposed on a lower surface of the main portion and electrically connected to the via structure. The optical device is disposed adjacent to the upper surface of the main portion and electrically connected to the conductive structure. The electrical device is disposed on and electrically connected to the conductive structure.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Hsuan WU, Yung-Hui WANG
  • Publication number: 20220238457
    Abstract: A semiconductor device package includes a first substrate, a second substrate, a first electronic component, a second electronic component and a shielding layer. The second substrate is disposed over the first substrate. The first electronic component is disposed between the first substrate and the second substrate. The second electronic component is disposed between the first substrate and the second substrate and adjacent to the second substrate than the first electronic component. The shielding element electrically connects the second electronic component to the second substrate. The second electronic component and the shielding element define a space accommodating the first electronic component.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hao-Chih HSIEH, Tzu-Cheng LIN, Chun-Jen CHEN
  • Publication number: 20220230915
    Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a substrate, a conductive trace, a passivation layer and an upper wiring. The conductive trace is disposed over the substrate. The conductive trace includes a body portion disposed on the substrate, and a cap portion disposed on the body portion, and the cap portion is wider than the body portion. The passivation layer covers the conductive trace. The upper wiring is disposed on the passivation layer and electrically connected to the cap portion of the conductive trace through an opening of the passivation layer.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Wei LIU, Huei-Siang WONG
  • Publication number: 20220230950
    Abstract: The present disclosure provides a semiconductor device package including a first substrate and an adhesive layer. The first substrate has a first surface and a conductive pad adjacent to the first surface. The conductive pad has a first surface exposed from the first substrate. The adhesive layer is disposed on the first surface of the first substrate. The adhesive layer has a first surface facing the first substrate. The first surface of the adhesive layer is spaced apart from the first surface of the conductive pad in a first direction substantially perpendicular to the first surface of the first substrate. The conductive pad and the adhesive layer are partially overlapping in the first direction.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Yi Chun Chou
  • Publication number: 20220230946
    Abstract: A substrate structure and a semiconductor package structure are provided. The substrate structure includes a first dielectric layer, a pad and a conductive structure. The first dielectric layer has a first surface and a second surface opposite to the first surface. The pad is adjacent to the first surface and at least partially embedded in the first dielectric layer. The first dielectric layer has an opening exposing the pad, and a width of the opening is less than a width of the pad. The conductive structure is disposed on the pad and composed of a first portion outside the opening of the first dielectric layer and a second portion embedded in the opening of the first dielectric layer. The first portion has an aspect ratio exceeding 1.375.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Wei SHIH, Sheng-Wen YANG, Chung-Hung LAI, Chin-Li KAO
  • Publication number: 20220223507
    Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Tsung-Tang TSAI, Huang-Hsien CHANG, Ching-Ju CHEN
  • Publication number: 20220221332
    Abstract: An optical system and a method of manufacturing an optical system are provided. The optical system includes a carrier, a light emitter, a light receiver, a block structure and an encapsulant. The light emitter is disposed on the carrier. The light receiver is disposed on the carrier and physically spaced apart from the light emitter. The light receiver has a light detecting area. The block structure is disposed on the carrier. The encapsulant is disposed on the carrier and covers the light emitter, the light receiver and the block structure. The encapsulant has a recess over the block structure.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Ying-Chung CHEN
  • Publication number: 20220223489
    Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Sheng-Yu CHEN, Chang-Lin YEH, Ming-Hung CHEN
  • Publication number: 20220214488
    Abstract: A device is provided. The device may be an optical device, a light coupling device, or a tunable light coupling device. The device includes a first portion, a lens, a light emitting element, and a waveguide. The first portion is disposed adjacent to a surface of a substrate and has a first side and a second side opposite to the first side. The light emitting element is disposed adjacent to the second side of the first portion. The lens is disposed adjacent to the first side of the first portion and between the light emitting element and the waveguide.
    Type: Application
    Filed: January 7, 2021
    Publication date: July 7, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Feng YOU, Jr-Wei LIN, Chieh-Chen FU, Kao-Ming SU, Chen Yuan Weng
  • Publication number: 20220216136
    Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a circuit layer and an electronic component. The circuit layer includes a dielectric layer having an opening, and an electrical contact. A width of an aperture of the opening increases from a first surface toward a second surface. The electrical contact is at least partially disposed in the opening and exposed through the opening. The electronic component is disposed on the second surface and electrically connected to the circuit layer.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 7, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-Jen CHENG, Chien-Fan CHEN
  • Publication number: 20220208623
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 30, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
  • Publication number: 20220199559
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsu-Nan FANG
  • Publication number: 20220199509
    Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a lower conductive structure, an upper conductive structure and a conductive via. The lower conductive structure includes a first dielectric layer and a first circuit layer in contact with the first dielectric layer. The upper conductive structure is attached to the lower conductive structure. The upper conductive structure includes a plurality of second dielectric layers, a plurality of second circuit layers in contact with the second dielectric layers, and defines an accommodating hole. An insulation material is disposed in the accommodating hole. The conductive via extends through the insulation material, and electrically connects the lower conductive structure.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Publication number: 20220199538
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a lower conductive structure, a first semiconductor device and a second semiconductor device. The upper conductive structure is disposed on the lower conductive structure. The second semiconductor device is electrically connected to the first semiconductor device by a first path in the upper conductive structure. The lower conductive structure is electrically connected to the first semiconductor device through a second path in the upper conductive structure under the first path.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20220199550
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, Yu-Che HUANG
  • Publication number: 20220200130
    Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu Ho, Sheng-Chi Hsieh, Chih-Pin Hung
  • Publication number: 20220200129
    Abstract: The present disclosure provides an antenna module. The antenna module includes an antenna layer, a ground layer, and an electronic component. The ground layer is disposed over the antenna layer. The electronic component is disposed between the antenna layer and the ground layer.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH
  • Publication number: 20220199552
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia Hsiu HUANG, Chun Chen CHEN, Wei Chih CHO, Shao-Lun YANG
  • Publication number: 20220196918
    Abstract: An optoelectronic structure includes a substrate, an electronic die and a photonic die. The electronic die is disposed on the substrate and includes a first surface, wherein the first surface is configured to support an optical component. The photonic die is disposed on the first surface of the electronic die and has an active surface toward the first surface of the electronic die and a side surface facing the optical component.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • Publication number: 20220196934
    Abstract: A device is provided. The device may be an optical device, a light coupling device, or a device containing an optical structure. The device includes a waveguide, a cladding, and a light coupling material. The light coupling material is disposed adjacent to the waveguide and has a first surface and a second surface, where the second surface is disposed further away from the waveguide than the first surface and a thickness of the second surface is greater than that of the first surface.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Sin-Yuan MU, Mei-Ju LU