Abstract: An electronic meter includes a sensing circuit for sensing voltage and current values of a waveform, an analog-to-digital converter for converting the sensed voltage and current values to digital voltage and current values, a digital filter for delaying one or both of the digital voltage and current values to compensate for a phase shift error in the sensing circuit, and a computation circuit for computing one or more parameters of the waveform in response to the phase compensated voltage and current values. The electronic meter may be calibrated by applying to the meter a test waveform having a known phase shift, measuring the phase shift using the electronic meter, determining a phase shift error based on the difference between the known phase shift and the measured phase shift and determining digital filter coefficients to produce a digital filter delay that corresponds to the phase shift error.

Abstract: A gain-phase detector differentially processes the outputs from two logarithmic amplifiers to provide ratiometric gain measurement, thereby eliminating intercept as a parameter. Hard-limited outputs from the dual amplifiers are multiplied in a logarithmic scalable phase detector core to provide a calibrated phase measurement output. In the preferred embodiment, two logarithmic amplifiers and other circuitry are co-integrated on a single substrate to provide a high degree of matching between the amplifiers, thereby canceling errors in the individual frequency responses of the individual amplifiers, extending the usable frequency response, and improving effective noise figure. Other numbers of logarithmic amplifiers can be used, and their various outputs can be added, subtracted, multiplied and combined in other manners to produce continuous products, continuous quotients, mixtures of products and quotients, etc., all of RF demodulated signals.

Abstract: A shadow mask material is selected so that the expansion characteristics of the shadow mask during thin film deposition closely match the expansion characteristics of the substrate. The shadow mask material is typically one with a low coefficient of thermal expansion (CTE). The shadow mask material must typically meet additional criteria, such as mechanical strength, feature quality, and dimensional accuracy criteria.

Abstract: Synthesizer structures and alignment methods are provided that facilitate quadrature demodulation. The structures are realized with phase-locked loops that include half-rate frequency dividers to provide loop output signals with a wide range of output frequencies and with frequency dividers that provide quadrature signals in response to the output signals. The structures include controllers that direct alignment methods which lock a VCO to a reference signal from a reference frequency divider to thereby provide the output signals.

Abstract: A method for communicating between a controller and a device with double-buffered inputs comprises the steps of providing one or more communication paths for exchanging data between the controller and the device, providing a data transfer control signal from the controller to the device for transferring input data from one or more input registers into one or more latchable data registers, and providing a data transfer delay signal from the device to the controller, wherein, in a first logic state, the data transfer delay signal prevents transfer of input data from the input registers into the latchable data registers until after a transition to a second logic state occurs on the data transfer delay signal. An apparatus for communicating between a controller and a device is also described.

Abstract: A programmable processor includes a execution pipeline and an exception pipeline. The execution pipeline may be a multi-stage execution pipeline that processes instructions. The exception pipeline may be a multi-stage exception pipeline that propagates exceptions resulting from the execution of the instructions. The execution and exception pipelines may have the same number of stages and may operate on the same clock cycles. When an instruction passes from a stage of the execution pipeline to a later stage of the execution pipeline, an exception may similarly pass from a corresponding stage of the exception pipeline to a corresponding later stage of the exception pipeline.

Abstract: A high gain amplifier includes a differential amplifier stage having a pair of transistors; first and second input circuits for providing input signals to the pair of transistors; transistor means arranged as a differential-to-single-ended converter driven by the differential amplifier stage to provide a single ended output signal; an intermediate gain stage having an input responsive to the single ended output signal; bias means for the differential amplifier, the bias means including circuit means for maintaining the currents through the pair of transistors in constant ratio independently of changes in load at the intermediate gain stage; and an inverting gain output stage driven by the intermediate gain stage and having an output for driving a load substantially from rail to rail. Also disclosed is a frequency compensation capacitor circuit connected between the input of the intermediate gain stage and the output of the inverting gain output stage.

Abstract: A microactuator is disclosed including one or more stationary plates formed on a substrate, a mirror base plate on which a mirror is formed, and one or more actuation plates coupled to the mirror base plate by one or more microspring mechanisms. The mirror base plate, the one or more actuation plates and the one or more microspring mechanisms are suspended over the stationary plates by one or more anchors. The stationary plates and the actuation plates are formed of a doped material so as to be electrically conductive. Upon application of a voltage potential between the respective plates, the actuation plates are pulled down toward the stationary plates, thus exerting a drive force on the base mirror plate to actuate the mirror between switching positions.

Abstract: Efficient re-computation of an error detection code is achieved with an original data message that includes a payload and an error detection code. The error detection code comprises a value determined according to an error detection formula using the payload. The payload is modified using a payload transformation formula. The error detection code is re-computed from the original error detection code, rather than from the modified payload. The formula for re-computing the error detection code is different from the formula used to originally obtain the error detection formula, and does not use the original payload or the modified payload.

Abstract: A method is disclosed for operating a MEMS device having a flap that is movable with respect to a base. The method includes applying a force to the flap to move the flap at least partially out of contact with an underlying base. Means for applying such a biasing force may be incorporated into a microelectromechanical (MEMS) apparatus having a base and a flap with a portion coupled to the base so that the flap may move out of the plane of the base between first and second position. The base may have a cavity with largely vertical sidewalls that contact a portion of the flap when the flap is in the second position Electrodes may be placed on the vertical sidewalls and electrically isolated from the base to provide electrostatic clamping of the flap to the sidewall. The base may be made from a substrate portion of a silicon-on-insulator (SOI) wafer and the flap defined from a device layer of the SOI wafer. The flap may be connected to the base by one or more flexures such as torsional beams.

Abstract: A multi-stage integrator achieves a relatively high small-signal gain, broad bandwidth, and very clean transient pulse response. Only simple amplifying stages (typically including an inverting amplifier(s)) are used. A high gain amplifier is coupled between an integrator input node and amplifier output node. A broadband single stage amplifier (which may comprise or act as a transconductor), may act as a current source for the output transistor and load, coupled between the integrator input node and output node. Preferably, a capacitance is coupled from the integrator input to the amplifier output. A frequency-selective element or network steers signal components to the single stage amplifier or the integrator appropriately to produce a combined output that has the desired characteristics.

Abstract: In one embodiment, a digital-signal processor (DSP) is described for multi-level global accumulation. The DSP includes a plurality of absolute difference determinators in a first stage. The absolute difference determinators may include arithmetic logic-units (ALUS) in combination with multiplexers. By using multiple absolute difference determinators, the throughput of the DSP is increased. An existing multiplier may be reconfigured into an adder tree to process the absolute difference results obtained in the first stage. To further increase, throughput, multiple DSPs with multiple absolute difference determinators may be operated in parallel.

Abstract: A computation core for executing programmed instructions includes an execution block for performing digital signal processor operations in response to digital signal processor instructions and for performing microcontroller operations in response to microcontroller instructions, a register file for storing operands for and results of the digital signal processor operations and the microcontroller operations, and control logic for providing control signals to the execution block and the register file in response to the instructions. The digital signal processor instructions each have a first length and the microcontroller instructions each have a second length that is less than the first length.

Abstract: A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibers to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibers are a tight fit therein for securing the optical fibers in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions.

Abstract: A two-dimensional scanner consists of a rotatable gimbal structure with vertical electrostatic comb-drive actuators and sensors. The scanner's two axes of rotation may be controlled independently by activating two sets of vertical comb-drive actuators. The first set of vertical comb-drive actuator is positioned in between a outer frame of the gimbal structure and the base, and the second set of vertical comb-drive actuator is positioned in between the inner part of the gimbal structure and the outer frame of the gimbal structure. The inner part of the gimbal structure may include a reflective surface, and the device may be used as a mirror. Furthermore, the capacitance of the vertical comb-drives may be measured to monitor the angular position of the mirror, and the capacitive position-monitoring signal may be used to implement closed-loop feedback control of the mirror angle. The two-dimensional scanner may be fabricated in a semiconductor process.

Abstract: A noise-shaper system includes a scrambler coupled to receive the output of a randomizer. The randomizer has an input for receiving a plurality of parallel equally weighted bits in a first sequence, and a first output which provides said bits in a pseudorandom sequence with a transformation that is not dependant on said first sequence. The scrambler is coupled to receive the randomizer's output and, in response, to produce a second non-pseudorandom sequence of the bits at a second output with a transformation that is dependent on the pseudorandom sequence. The resultant output is noise shaped to reduce distortion.

Abstract: A voltage regulator with dynamically boosted bias current includes a pass device for providing current to a load; an error circuit responsive to a difference between a predetermined reference voltage and a function of the voltage on the load to produce an error signal, a driver circuit responsive to the error signal for controlling the pass device to adjust the current to the load to reduce the error signal, the driver circuit including an amplifier responsive to the error signal for controlling the pass device, a bias current source for biasing the amplifier, a sensing circuit for sensing a portion of the error signal, a reference current source for providing a reference current, a second error circuit responsive to a difference between the portion of the error signal and the reference current to produce a second error current; and a boost circuit responsive to the second error signal to increase the bias current provided to the amplifier when the load demands more current.

Abstract: A low quiescent power class AB current mirror circuit includes a first input transistor for receiving an input current and a second output transistor for providing an output current; the first and second transistors having bases connected together; and a first current supply for sinking current from the bases in response to a decrease in input current to lower the quiescent point of the transistors.

Abstract: An improved bipolar transistor power amplifier circuit including a bias input node, an RF input node, an RF output node, and a plurality of HBTs. Each HBT includes a base, an emitter, a collector, a base resistor connected to the base and selected to offset a portion of the voltage drop across the base and emitter of each transistor, an emitter resistor connected to the emitter, and a base capacitor having two electrodes one of which is coupled to the base. The HBTs are grouped together in two or more groups and each group includes a base resistor selected to offset another portion of the voltage drop across the base and emitter of the transistors.

Abstract: A system and method for battery isolation in a charging system includes an isolation diode connected to a charger input voltage and a PNP pass transistor connected in series between the isolation diode and a battery. The pass device conducts a charging current in response to a drive signal applied to its base; the pass transistor side of the diode is at a voltage Vchg. A first switch couples the pass transistor's base to Vchg when Vchg>Vbat such that the pass transistor's base-collector junction blocks current from Vchg from flowing through the pass transistor when the charger is not in use, and a second switch couples the base to Vbat when Vbat>Vchg such that the pass transistor's base-emitter junction blocks current from the battery from flowing through the pass transistor when the charger is not in use.