Patents Assigned to Applied Material
  • Silicon dioxide-polysilicon multi-layered stack etching with plasma etch chamber employing non-corrosive etchants
    Patent number: 10643854
    Abstract: Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF6 and/or NF3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: May 5, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Daisuke Shimizu, Jong Mun Kim
  • SYSTEMS AND METHODS FOR ETCHING METALS AND METAL DERIVATIVES
    Publication number: 20200135491
    Abstract: Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a transition-metal-containing material. The methods may also include removing the transition-metal-containing material. The flowing and the contacting may be plasma-free operations.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 30, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Zhenjiang Cui, Hanshen Zhang, Siliang Chang, Daniella Holm
  • Apparatus for transportation of a substrate carrier in a vacuum chamber, system for vacuum processing of a substrate, and method for transportation of a substrate carrier in a vacuum chamber
    Patent number: 10636687
    Abstract: An apparatus for transportation of a substrate carrier in a vacuum chamber is provided. The apparatus includes a first track providing a first transportation path for the substrate carrier, and a transfer device configured for contactlessly moving the substrate carrier from a first position on the first track to one or more second positions away from the first track. The one or more second positions include at least one of a position on a second track and a process position for processing of a substrate. The transfer device includes at least one first magnet device configured to provide a magnetic force acting on the substrate carrier to contactlessly move the substrate carrier from the first position to the one or more second positions.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Simon Lau, Wolfgang Buschbeck
  • High pressure and high temperature anneal chamber
    Patent number: 10636677
    Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing semiconductor substrates. In one embodiment, a batch processing chamber is disclosed. The batch processing chamber includes a chamber body enclosing a processing region, a gas panel configured to provide a processing fluid into the processing region, a condenser fluidly connected to the processing region and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The processing region is configured to retain a plurality of substrates during processing. The condenser is configured to condense the processing fluid into a liquid phase.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jean Delmas, Steven Verhaverbeke, Kurtis Leschkies
  • Laminated top plate of a workpiece carrier in micromechanical and semiconductor processing
    Patent number: 10636690
    Abstract: A laminated top plate of a workpiece carrier is described that is particularly suitable for mechanical and semiconductor processing. In one example, A method of fabricating a workpiece carrier top plate includes dispensing conductive paste onto at least one of a plurality of ceramic sheets, embedding the paste between the plurality of ceramic sheets, compacting ceramic sheets together with the paste, and sintering the paste.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventor: Kadthala R. Narendrnath
  • Recursive inject apparatus for improved distribution of gas
    Patent number: 10633741
    Abstract: Apparatus and methods for processing a substrate including an injector unit insert with a plurality of flow paths leading to a first plenum, each of the flow paths providing one or more of substantially the same residence time, length and/or conductance. Injector units including the injector unit inserts have increased flow uniformity.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Aaron Miller, Kallol Bera
  • Selective deposition for simplified process flow of pillar formation
    Patent number: 10636659
    Abstract: Methods comprising depositing a film material to form an initial film in a trench in a substrate surface are described. The film is treated to expand the film to grow beyond the substrate surface.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Yihong Chen, Ziqing Duan, Yong Wu, Abhijit Basu Mallick, Srinivas Gandikota
  • Method for forming brace structures for additive manufacturing
    Patent number: 10625338
    Abstract: Additive manufacturing of an object includes dispensing a plurality of successive layers of powder over a top surface of a platform, fusing an object region in each of the plurality of successive layers to form the object, and fusing a brace region in a particular layer from the plurality of layers to form a brace structure to inhibit lateral motion of the powder. The brace structure is spaced apart from the particular object region by a gap of unfused powder.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Hou T. Ng, Nag B. Patibandla, Ajey M. Joshi, Bharath Swaminathan, Ashavani Kumar, Eric Ng, Bernard Frey, Kasiraman Krishnan
  • Gate all-around device
    Patent number: 10629752
    Abstract: Gate all-around devices are disclosed in which an angled channel including a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Russell Chin Yee Teo, Benjamin Colombeau
  • Method and device for shallow trench isolation in a fin type field effect transistors
    Patent number: 10629741
    Abstract: A method of forming a semiconductor device may include providing a semiconductor device structure. The semiconductor device structure may include semiconductor fins pitched at a fin pitch on a substrate. The semiconductor device structure may include an isolation oxide layer on the substrate and between the semiconductor fins and a mask. The mask may be disposed over the isolation oxide layer and the mask may define at least one opening. The method may further comprise directing hot ions into the at least one opening, to implant hot ions in a volume of isolation oxide in the isolation oxide layer. The volume may be adjacent to at least one of the semiconductor fins.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Min Gyu Sung, Johannes Van Meer
  • Plasma abatement solids avoidance by use of oxygen plasma cleaning cycle
    Patent number: 10625312
    Abstract: Embodiments disclosed herein include a plasma abatement process that takes effluent from a processing chamber and reacts the effluent with water vapor reagent within a plasma source placed in a foreline by injecting the water vapor reagent into the foreline or the plasma source. The materials present in the effluent as well as the water vapor reagent are energized by the plasma source, converting the materials into gas species such as HF that is readily scrubbed by typical water scrubbing abatement technology. An oxygen containing gas is periodically injected into the foreline or the plasma source relative to the water vapor injection to reduce or avoid the generation of solid particles. The abatement process has good destruction removal efficiency (DRE) with minimized solid particle generation.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventor: Colin John Dickinson
  • Bottom-up growth of silicon oxide and silicon nitride using sequential deposition-etch-treat processing
    Patent number: 10626495
    Abstract: Methods for gapfill of high aspect ratio features are described. A first film is deposited on the bottom and upper sidewalls of a feature. The first film is etched from the sidewalls of the feature and the first film in the bottom of the feature is treated to form a second film. The deposition, etch and treat processes are repeated to fill the feature.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Rui Cheng, Abhijit Basu Mallick, Pramit Manna
  • Footing removal for nitride spacer
    Patent number: 10629473
    Abstract: Processing methods may be performed to remove unwanted materials from a substrate, such as an oxide footing. The methods may include forming an inert plasma within a processing region of a processing chamber. Effluents of the inert plasma may be utilized to modify a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor chamber. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jungmin Ko, Tom Choi
  • Method of forming self-aligned via
    Patent number: 10629484
    Abstract: Electronic devices and methods to form electronic devices having a self-aligned via are described. An adhesion enhancement layer is utilized to promote adhesion between the conductive material and the sidewalls of the at least one via opening. The self-aligned vias decrease via resistance and reduce the potential to short to the wrong metal line.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Suketu Arun Parikh, Mihaela Balseanu
  • SYSTEMS AND METHODS FOR HAFNIUM-CONTAINING FILM REMOVAL
    Publication number: 20200118829
    Abstract: Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The halogen-containing precursor may be characterized by a gas density greater than or about 5 g/L. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a hafnium-containing material. The methods may also include removing the hafnium-containing material.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Zhenjiang Cui, Hanshen Zhang, Daniella Holm
  • SYSTEMS AND METHODS FOR IMPROVED SEMICONDUCTOR ETCHING AND COMPONENT PROTECTION
    Publication number: 20200118845
    Abstract: Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 16, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Tien Fak Tan, Lok Kee Loh, Dmitry Lubomirsky, Soonwook Jung, Martin Yue Choy, Soonam Park
  • Methods for wordline separation in 3D-NAND devices
    Patent number: 10622251
    Abstract: Methods of wordline separation in semiconductor devices (e.g., 3D-NAND) are described. A metal film is deposited in the wordlines and on the surface of a stack of spaced oxide layers. The metal film is removed by high temperature oxidation and etching of the oxide or low temperature atomic layer etching by oxidizing the surface and etching the oxide in a monolayer fashion. After removal of the metal overburden, the wordlines are filled with the metal film.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Yihong Chen, Ziqing Duan, Abhijit Basu Mallick, Kelvin Chan
  • Electrostatic chuck with independent zone cooling and reduced crosstalk
    Patent number: 10622229
    Abstract: An electrostatic chuck is described with independent zone cooling that leads to reduced crosstalk. In one example, the chuck includes a puck to carry a substrate for fabrication processes, and a cooling plate fastened to and thermally coupled to the ceramic puck, the cooling plate having a plurality of different independent cooling channels to carry a heat transfer fluid to transfer heat from the cooling plate.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Vijay Parkhe, Konstantin Makhratchev
  • Methods of etching metal oxides with less etch residue
    Patent number: 10622221
    Abstract: Processing methods to etch metal oxide films with less etch residue are described. The methods comprise etching a metal oxide film with a metal halide etchant, and exposing the etch residue to a reductant to remove the etch residue. Some embodiments relate to etching tungsten oxide films. Some embodiments utilize tungsten halides to etch metal oxide films. Some embodiments utilize hydrogen gas as a reductant to remove etch residues.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Amrita B. Mullick, Abhijit Basu Mallick, Srinivas Gandikota, Susmit Singha Roy, Yingli Rao, Regina Freed, Uday Mitra
  • Plasma source liner
    Patent number: D882536
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventor: Eric Kihara Shono