Abstract: Techniques for inverting implanter process model for parameter generation are described. A method comprises receiving a set of process parameters and associated values for an ion implanter by an inverted control model, the inverted control model comprising an artificial neural network (ANN), predicting a set of control parameters and associated values for the ion implanter based on the set of process parameters and associated values by the inverted control model, and presenting the set of control parameters and associated values on a graphical user interface (GUI) of an electronic display. Other embodiments are described and claimed.

Abstract: Disclosed herein are methods for passivating SiC substrate defects using a low-energy treatment. In some embodiments, a method may include providing a silicon carbide (SIC) substrate, treating the SiC substrate using an ion implant or a plasma doping process, forming a first epitaxial layer over an upper surface of the SiC substrate after the SiC substrate is treated, and forming a second epitaxial layer over the first epitaxial layer.

Abstract: Exemplary methods of semiconductor processing may include providing an etchant precursor to a processing region of a semiconductor processing chamber. A structure may be disposed within the processing region. The structure may include a first silicon-containing material. The structure may include a second silicon-containing material, an oxygen-containing material, or both. The methods may include contacting the structure with the etchant precursor. The contacting with the etchant precursor may etch at least a portion of the second silicon-containing material or the oxygen-containing material from the structure. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the structure with the carbon-containing precursor. The contacting with the carbon-containing precursor may replenish carbon in the first silicon-containing material.

Abstract: Embodiments of the disclosure include a method of processing a substrate in a plasma processing system, comprising delivering an RF signal, by an RF generator, through an RF match to an electrode assembly disposed within the plasma processing system, wherein while delivering the RF signal the RF match is set to a first matching point, and delivering a voltage waveform, by a waveform generator, to the electrode assembly disposed within the plasma processing system while the RF signal is delivered to the electrode assembly.

Abstract: A cool cluster comprises one or more transfer chambers; a plurality of process chambers connected to the one or more transfer chambers; and a computing device of the tool cluster. The computing device is to receive first measurements generated by sensors of a first process chamber during or after a process is performed within the first process chamber; determine that the first process chamber is due for maintenance based on processing the first measurements using a first trained machine learning model; after maintenance has been performed on the first process chamber, receive second measurements generated by the sensors during or after a seasoning process is performed within the first process chamber; and determine that the first process chamber is ready to be brought back into service based on processing the second measurements using a second trained machine learning model.

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.

Abstract: A method for selective barrier metal etching includes performing a hydrogen implantation process, in an inductively coupled plasma (ICP) etch chamber, to chemically reduce an oxidized portion of a barrier metal layer formed within a feature in a metal layer on the barrier metal layer, and performing an etch process, in the ICP etch chamber, to remove the hydrogen implanted portion of the barrier metal layer.

Abstract: An electronic device manufacturing system capable of obtaining metrology data associated with a deposition process performed on a substrate according to a process recipe, wherein the deposition process generates a plurality of layers on a surface of the substrate. The manufacturing system can further obtain an expected profile associate with the process recipe, wherein the expected profile comprises a plurality of values indicative of a desired thickness for a plurality of layers of the process recipe. The manufacturing system can further generate a correction profile based on the metrology data and the expected profile, wherein the correction profile comprises a deposition time offset value for at least one layer of the plurality of layers. The manufacturing system can further generate an updated process recipe by applying the correction profile to the process recipe and cause a deposition step to be performed on the substrate according to the updated process recipe.

Abstract: A method includes identifying first parameters of a first processing chamber of a semiconductor fabrication facility. The first parameters include first input parameters and first output parameters. The method further includes identifying second parameters of a second processing chamber of the semiconductor fabrication facility. The second parameters include second input parameters and second output parameters. The method further includes generating, by a processing device based on the first parameters and the second parameters, composite parameters comprising composite input parameters and composite output parameters. Semiconductor fabrication is based on the composite parameters.

Abstract: Embodiments of the present disclosure relate to apparatus, systems and methods for substrate processing. A detachable substrate support is disposed within a processing volume of a processing chamber and the substrate support includes a substrate interfacing surface and a back surface. The pedestal hub has a supporting surface removably coupled to the substrate support. A hub volume of the pedestal hub includes temperature measuring assembly disposed therein positioned to receive electromagnetic energy emitted from the back surface of the substrate support. The temperature measuring assembly measures an intensity of the electromagnetic energy entering the assembly and generates intensity signals. An apparent temperature of the substrate is determined based on the intensity signals.

Abstract: Exemplary substrate processing systems may include a plurality of processing regions. The systems may include a transfer region housing defining a transfer region fluidly coupled with the plurality of processing regions. The systems may include a plurality of substrate supports. Each substrate support of the plurality of substrate supports may be vertically translatable between the transfer region and an associated processing region of the plurality of processing regions. The systems may include a transfer apparatus including a rotatable shaft extending through the transfer region housing. The transfer apparatus may also include an end effector coupled with the rotatable shaft. The systems may include an exhaust foreline including a plurality of foreline tails. Each foreline tail of the plurality of foreline tails may be fluidly coupled with a separate processing region of the plurality of processing regions. The systems may include a plurality of throttle valves.

Abstract: Provided herein are approaches for angle control of neutral reactive species ion beams. In one approach, a workpiece processing apparatus may include a plasma source operable to generate a plasma within a plasma chamber enclosed by a chamber housing, and an extraction plate coupled to the chamber housing. The extraction plate may include a recombination array having a plurality of channels operable to direct one or more radical beams to a workpiece at a non-zero angle relative to a perpendicular extending from a main surface of the workpiece.

Abstract: The present technology includes vertical cell array transistor (VCAT) with improved gate induced leakage current. The arrays one or more bit lines arranged in a first horizontal direction and one or more word lines arranged in a second horizontal direction. The arrays include one or more channels extending in a vertical direction generally orthogonal to the first direction and the second horizontal direction, such that the bit lines intersect with a source/drain region of the plurality of channels, and the word lines intersect with gate regions of the plurality of channels. Arrays include where at least one word includes a first section adjacent to the source/drain region and a second section adjacent to the gate region, where the second section contains a high work function material and the first section contains a low work function material.

Abstract: Metal stacks and methods of depositing a metal stack on a semiconductor substrate are disclosed. The metal stack is formed by depositing a tungsten (W) layer on the semiconductor substrate and depositing a molybdenum (Mo) layer on the tungsten (W) layer. The tungsten (W) layer has a thickness in a range of from 5 ? to 30 ? and the molybdenum (Mo) layer has a thickness in a range of from 80 ? to 200 ?. In some embodiments, the metal stack has a resistivity of less than or equal to 10 ??-cm prior to treatment and a resistivity of less than or equal to 11 ??-cm after treatment when the metal stack has a total thickness of 140 ?.

Abstract: Exemplary semiconductor structures may include a stack of layers overlying a substrate. The stack of layers may include a first portion of layers, a second portion of layers overlying the first portion of layers, and a third portion of layers overlying the second portion of layers. The first portion of layers, the second portion of layers, and the third portion of layers may include alternating layers of a silicon oxide material and a silicon nitride material. One or more apertures may be formed through the stack of layers. A lateral notch in each individual layer of silicon nitride material at an interface of the individual layer of silicon nitride material and an overlying layer of silicon oxide material may extend a distance less than or about 100% of a distance corresponding to a thickness of the individual layer of silicon nitride material.

Abstract: Described herein is a method for selectively cleaning and/or etching a sample. The method includes selectively forming a film in a trench of a substrate such that the trench may be selectively etched. A polymer film is deposited on the bottom surface of the trench without being deposited on the side wall. A second film is selectively formed in the trench without forming the second film on the polymer film. The polymer is then removed from the bottom surface of the trench and then etching is performed on the bottom surface of the trench using an etch chemistry, wherein the second film protects the side wall from being etched.

Abstract: An electronic device manufacturing system configured to receive, by a processor, input data reflecting a feature related to a manufacturing process of a substrate. The manufacturing system is further configured to generate a characteristic sequence defining a relationship between at least two manufacturing parameters, and determine a relationship between one or more variables related to the feature and the characteristic sequence. The manufacturing system is further configured to determine a weight based on the determined relationship and apply the weight to the feature. The manufacturing system is further configured to train a machine-learning model in view of the weighted feature.

Abstract: There is provided a system and method of runtime examination of a semiconductor specimen. The method includes obtaining a runtime image representative of an inspection area of the specimen, the runtime image having a relatively low signal-to-noise ratio (SNR); and processing the runtime image using a machine learning (ML) model to obtain examination data specific for a given examination application, wherein the ML model is previously trained for the given examination application using one or more training samples, each training sample representative of a respective reference area sharing the same design pattern as the inspection area and comprising: a first training image of the respective reference area having a relatively low SNR; and label data indicative of ground truth in the respective reference area pertaining to the given examination application, the label data obtained by annotating a second training image of the respective reference area having a relatively high SNR.

Abstract: During chemical mechanical polishing of a substrate, a signal value that depends on a thickness of a layer in a measurement spot on a substrate undergoing polishing is determined by a first in-situ monitoring system. An image of at least the measurement spot of the substrate is generated by a second in-situ imaging system. Machine vision processing, e.g., a convolutional neural network, is used to determine a characterizing value for the measurement spot based on the image. Then a measurement value is calculated based on both the characterizing value and the signal value.

Abstract: Methods of forming an oxide layer over a semiconductor substrate are provided. The method includes forming a first oxide containing portion of the oxide layer over a semiconductor substrate at a first growth rate by exposing the substrate to a first gas mixture having a first oxygen percentage at a first temperature. A second oxide containing portion is formed over the substrate at a second growth rate by exposing the substrate to a second gas mixture having a second oxygen percentage at a second temperature. A third oxide containing portion is formed over the substrate at a third growth rate by exposing the substrate to a third gas mixture having a third oxygen percentage at a third temperature. The first growth rate is slower than each subsequent growth rate and each growth rate subsequent to the second growth rate is within 50% of each other.