Abstract: A method for single side band transmissions begins by mixing, in a current domain, an in-phase component of outbound formatted data with an in-phase component of a local oscillation to produce a first mixed signal. The method continues by mixing, in the current domain, a quadrature phase component of the outbound formatted data with a quadrature component of the local oscillation to produce a second mixed signal. The method continues by summing the first and second mixed signals to produce a radio frequency signal. The method continues by amplifying the radio frequency signal prior to transmission.
Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Type:
Grant
Filed:
August 8, 2000
Date of Patent:
June 30, 2009
Assignee:
Broadcom Corporation
Inventors:
Ahmadreza Rofougaran, Maryam Rofougaran, Brima Ibrahim, Jacob Rael, Shahla Khorram, Shervin Moloudi, Stephen Wu, Hooman Darabi, William T. Colleran, Ed Chien, Meng-An Pan
Abstract: Method and apparatus for receiving an estimate of time in a satellite signal receiver receives an estimate of time from a server and compensates for error of a clock in the satellite signal receiver using the estimate of time. The output of the compensated clock is used when computing a position of the satellite signal receiver. The estimate of time is received using a network time protocol (NTP), a simple network time protocol (SNTP), or by one-way broadcast from the server.
Type:
Grant
Filed:
March 26, 2007
Date of Patent:
June 30, 2009
Assignee:
Broadcom Corporation
Inventors:
Charles Abraham, Sergi Podshivalov, Frank van Diggelen
Abstract: A radio frequency transmitter includes a baseband transmit processing module, a mixing module, a power amplifier, a transmit power sense module, and a transmit power control module. The baseband transmit processing module is operably coupled to encode outbound data into outbound baseband signals in accordance with one of a plurality of encoding protocols. The mixing module is operably coupled to convert the outbound baseband signals into outbound radio frequency signals. The power amplifier is operably coupled to amplify the outbound RF signals prior to transmission to produce amplified outbound RF signals. The transmit power sense module is operably coupled to sense the amplified outbound RF signals to provide a transmit signal strength indication (TSSI). The transmit power control module is operably coupled to adjust gain of the baseband transmit processing module, the mixing module, and/or the power amplifier based on the TSSI and the particular encoding protocol used to produce the baseband signals.
Type:
Grant
Filed:
December 19, 2003
Date of Patent:
June 30, 2009
Assignee:
Broadcom Corporation
Inventors:
Jason A. Trachewsky, Tim Robinson, George Kondylis, Ling Su
Abstract: UWB (Ultra Wide Band) waveform design to minimize narrowband interference. A novel solution is presented such that a PN (Pseudo-Noise) code may be intelligently designed so as to null portions of a UWB spectrum that have a significant amount of noise. These narrowband blocking intervals will effectively block off all of the interference within these portions of the UWB signal. These spectrum portions having interference may be predetermined beforehand or determined by one or more of the devices within the communication system; in addition, any changes in the interference may also be assessed in real time or successively (e.g., after the elapse of every predetermined period of time). Moreover, the position of the devices within the communication system may also be employed when selecting the nulling codes, and they may be adaptively changed, in real time, to respond to changes in the interference and/or changes in the devices' positions.
Abstract: Systems and methods for generation of time-dependent control signals for video signals are provided. A system is provided that includes a set of microsequencers, a programmable combinational logic (PCL) module, shared memory, an arbiter for sharing of memory by the microsequencers, stacks containing registers for microsequencer control, and a control interface. The system can efficiently provide control signals for video signals, implement the MACROVISION copy protection process, and provide other value added features. The method includes accessing programs from shared memory, such that a set of microsequencers can generate flags. These flags are then processed to generate one or more control signals used to support the outputting of video signals including those requiring MACROVISION copy protection.
Abstract: A method and apparatus are provided for enabling a transmitter to have a substantially linear magnitude response and a substantially linear phase response. The transmitter includes first and second programmable gain amplifiers (PGAs). The first PGA is tuned to have a resonant frequency that is less than an operating frequency of the first PGA. The second PGA is tuned to have a resonant frequency that is greater than an operating frequency of the second PGA. A magnitude response at an output of the first PGA and a magnitude response at an output of the second PGA combine to provide a substantially linear magnitude response across a frequency range that includes the operating frequency of the first or second PGA. According to an embodiment, the first and second PGAs have the same operating frequency.
Abstract: A network device for processing packets. The network device includes applying specific fields from a packet to an associated memory device and comparing means for comparing input to the memory device with entries in the memory device. The network device also includes enabling means for enabling selection of bits, by the memory device, that are required to match exactly with bits from the input to the memory device. The network device further includes outputting means for outputting an address for a matched entry by the memory device and applying means for applying a match from the memory device to an associated entry in a table for applying actions from the table that are associated with the match to the packet.
Abstract: Handover of call serviced by modular ear-pience/microphone between servicing base portions is presented. A wireless headset includes wireless interface(s), earpiece, a microphone, processing module, and a user interface. The wireless interface(s) wirelessly couples the wireless headset to a base unit via a wireless personal area network (WPAN). The earpiece renders inbound portions of the service calls audible while the microphone is operable to produce the outbound portion of the call. Both the earpiece and microphone are communicatively coupled to the wireless interface(s). The processing module also coupled to the wireless interface(s) allows the wireless headset to initiate call functions between the wireless headset and a servicing network made available through the base unit, service a call and call control functions, and anchor the call to the wireless headset.
Type:
Grant
Filed:
May 4, 2005
Date of Patent:
June 30, 2009
Assignee:
Broadcom Corporation
Inventors:
Nambirajan Seshadri, James D. Bennett, Jeyhan Karaoguz
Abstract: A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.
Abstract: An integrated circuit can include an I/O pad, an internal circuit, an inductor, an electrostatic discharge (ESD) protection circuit, and an ESD clamp. The internal circuit can be biased with a first voltage supply and a second voltage supply, where the internal circuit is connected to the I/O pad at a first node. The ESD protection circuit can be connected between the first node and a second node. The inductor can be connected between the second node and a third voltage supply. Further, the ESD clamp can be connected between the second node and the second voltage supply.
Abstract: A capacitor sharing surge protection circuit for protecting multiple ports from harmful energy surges, such as electrostatic discharge (ESD) and cable discharge events (CDE), is provided. The protection circuit includes a plurality of diodes with respective cathodes and anodes. Each anode of the plurality of diodes is coupled to one of the plurality of ports. A bypass capacitor is coupled between the cathodes of the plurality of diodes and ground. In an embodiment, a bulk capacitor is further coupled between the cathodes of the plurality of diodes and ground.
Abstract: A system and method for enabling power over Ethernet (PoE) for legacy devices. Legacy devices often represent a large installed base of devices. This installed base of devices (e.g., mobile computing devices) may have little or no PoE functionality. It is a feature of the present invention that an external device (e.g., dongle) can be used to retrofit such an installed base of devices for use with state of the art PoE functionality.
Abstract: According to an example embodiment, an apparatus may be provided that is configurable to operate in either a separate power amplifier configuration or a combined power amplifier configuration.
Abstract: Systems and methods for perform a method for reducing interference from Multimedia over Coax Alliance (MOCA) signals in a cable television double conversion tuner are provided. The method may include receiving an indication of the channel in which MoCA signals are operating. When the channel in which the MoCA signals are operating is in the same frequency band as an intermediate frequency of the tuner, the method may require shifting an intermediate frequency of the tuner out of the frequency band occupied by the channel in which the MoCA signals are operating.
Abstract: Low voltage LOGEN. LOGEN is a local oscillator generator. Two separately implemented dividers allow for relatively lower power dissipation while supporting multiple modes of operation within the communication device. Each of these two or more dividers has different phase noise characteristics. These at least two separately implemented dividers also allows for the supporting of at least two modes of operational within an apparatus. In certain applications (e.g., wireless applications), there is a need for relatively low phase noise characteristics therein, and the use of these at least two separately implemented dividers allows for the appropriate implementation of the relatively higher grade dividers in those areas that can benefit more there from.
Abstract: Digital divider for low voltage LOGEN. LOGEN is a local oscillator generator. One implementation presented herein provides for a pseudo-complementary metal-oxide-semiconductor (CMOS), in that, it is not a true CMOS type circuitry that has no DC current dissipation, but nevertheless does operate well at relatively high frequencies and relatively low power supply voltage levels. Appropriately placed p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs) and n-channel MOSFETs (e.g., N-MOSFETs) are employed to provide for an all digital divider circuitry. In some embodiments, four active circuitry element levels are stacked between a power supply voltage and ground voltage level. In other embodiments, three active circuitry element levels are stacked between a power supply voltage and ground voltage level. The three active circuitry element levels embodiment provides for a greater area savings (e.g.
Abstract: An apparatus and a method for routing data in a radio data communication system having one or more host computers, one or more intermediate base stations, and one or more RF terminals organizes the intermediate base stations into an optimal spanning-tree network to control the routing of data to and from the RF terminals and the host computer efficiently and dynamically. Communication between the host computer and the RF terminals is achieved by using the network of intermediate base stations to transmit the data.
Type:
Grant
Filed:
September 8, 2003
Date of Patent:
June 23, 2009
Assignee:
Broadcom Corporation
Inventors:
Ronald L. Mahany, Robert C. Meier, Ronald E. Luse
Abstract: A voltage domain crossing circuit and method are disclosed. In one embodiment, the voltage domain crossing circuit comprises an AC coupling component, a DC biasing component and a high voltage output amplifier. The AC coupling component receives an input low voltage signal and AC couples and splits the signal into two voltages. The two voltages are then DC biased to a predetermined bias voltage using the DC biasing component. The high voltage output amplifier then amplifies the biased voltages in the high voltage domain yielding a signal in the high voltage domain. Other embodiments of the voltage domain crossing circuit and method are also disclosed.
Type:
Grant
Filed:
August 24, 2006
Date of Patent:
June 23, 2009
Assignee:
Broadcom Corporation
Inventors:
Jan Roelof Westra, Franciscus Maria Leonardus van der Goes, Erol Arslan
Abstract: In a ball grid array (BGA) package, a first stiffener is attached to a surface of a substrate. A second stiffener is attached to the surface of the substrate to be co-planar with the first stiffener. The second stiffener is separated from the first stiffener by a channel therebetween. An integrated circuit (IC) die is mounted to a surface of the second stiffener.