Abstract: A complementary SONOS-type (CSONOS) logic device is programmed and erased with a common voltage. The programming method involves reading the logic state of a complementary pair without disturbing the logic state after setting the complementary pair of non-volatile trapped-charge memory devices, including a first memory device and a second memory device, to a first logic state or a second logic state with a common voltage to control the complementary pair. The CSONOS device retains data integrity over extended read endurance cycles.

Abstract: Disclosed are various embodiments of a differential logic to CMOS logic translator including a level-shifting and buffering stage configured to receive differential inputs and to provide resulting signals with lower common mode voltage. Further, a gain stage is included to receive the resulting signals and to provide increased swing signals. A CMOS buffer is also included and is configured to receive the increased swing signals and to provide a CMOS logic output. Also disclosed is a method of translating a differential logic signal to a CMOS logic signal including level-shifting and buffering differential input signals to provide resulting signals with lower common mode voltage. The method also includes using a gain stage to provide increased swing signals from the resulting lower common mode signals and using a CMOS buffer to provide a CMOS output from the increased swing signals.

Abstract: A memory cell array includes reference cells each associated with a plurality of data cells of the array.

Abstract: A charge pump circuit can include a pump-up circuit having a first disable switch coupled between a pump-up output node and a first power supply node that is enabled and then disabled in response to a source current path between the pump-up node and a second power supply node being disabled, and a source off switch coupled in series with the first disable switch that is enabled in response to the source current path being disabled. The charge pump circuit can also include a pump-down circuit having a second disable switch coupled between a pump-down output node and the second power supply node that is enabled and then disabled in response to a sink current path between the pump-down node and a first power supply node being disabled. A sink off switch can be coupled in series with the second disable switch that is enabled in response to the sink current path being disabled.

Abstract: A complementary field-effect (CMOS) circuit is provided which includes a current-limiting device arranged along a power-supply bus or a ground bus of the circuit. The current-limiting device is configured to prevent latch up of the CMOS circuit. More specifically, the current-limiting device is configured to maintain a junction of the parasitic pnpn diode structure as reverse-biased. A method is also provided which includes creating a current-voltage plot of a pnpn diode arranged within a first CMOS circuit which is absent of a current-limiting device arranged along a power bus of the circuit. In addition, the method includes determining a holding current level from the current-voltage plot and sizing a current-limiting device to place along a power bus of a second CMOS circuit comprising similar design specifications as the first CMOS circuit such that the current through the second CMOS circuit does not exceed the holding current level.

Abstract: A method and apparatus for performing sleep and stall operations in a system that includes a device under test and that includes an emulator device that operates to perform a sequence of instructions in lock-step fashion with the device under test. When a first signal is received at the device under test, the device under test initiates the sleep function and turns off its clocks. When the clocks are turned off, the emulator device discontinues execution of the sequence of instructions. When the sleep function has been completed by the device under test a second signal is sent to the emulator device. Execution of the sequence of instructions is resumed when the number of clock signals received at the emulator device since the second signal was received equals a predetermined value.

Abstract: One embodiment relates to an optical displacement sensor for sensing movement of a data input device across a surface by determining displacement of optical features in a succession of frames. The sensor includes at least an illuminator, telecentric imaging optics on the object (scattering surface) side, and an array of photosensitive elements. The illuminator is configured to illuminate a portion of the surface. The telecentric imaging optics is configured to image the optical features emanating from the illuminated portion of the surface, and the array of photosensitive elements is configured to detect intensity data relating to the optical features imaged by the telecentric imaging optics. Other embodiments are also disclosed.

Abstract: A system and method for dynamically generating a project configuration datasheet. Module and device descriptions are stored in extensible markup language (XML) format. The IDE includes an XSL (extensible stylesheet language) stylesheet. The module and device descriptions are combined with parameterization information as prescribed by the XSL stylesheet to produce a project configuration report. The project configuration report may be formatted in hypertext markup language (HTML) and may be rendered as a visual datasheet by a browser.

Abstract: A semiconductor topography and a method for forming a drain extended metal oxide semiconductor (DEMOS) transistor is provided. The semiconductor topography includes at least a portion of an extended drain contact region formed within a well region and a plurality of dielectrically spaced extension regions interposed between the well region and a channel region underlying a gate structure of the topography. The channel region of a first conductivity type and the well region of a second conductivity type opposite of the first conductivity type. In addition, the plurality of dielectrically spaced extension regions and the extended drain contact region are of the second conductivity type. Each of the plurality of dielectrically spaced extension regions has a lower net concentration of electrically active impurities than the well region. Moreover, the extended drain contact region has a greater net concentration of electrically active impurities than the well region.

Abstract: A method of operating a matrix checksum includes the steps of determining a column checksum for the data bytes in an information packet. A row checksum for the data bytes in an information packet is determined. The information packet including the column checksum and the row checksum is transmitted.

Abstract: A method and apparatus for creating USB peripheral device report descriptors: A short, compressed, report descriptor is stored in a peripheral device. This short report descriptor is transmitted to a USB wireless bridge and combined with templates stored in the bridge to create a USP report descriptor. Power is saved because less time is required to transmit the short report descriptor than would be required to transmit a full USB report descriptor. Hardware is also saved in the peripheral device since less memory is required to store the short report descriptors as compared to storing a full USB report descriptor.

Abstract: An In-Circuit Emulation system. A real microcontroller (device under test) operates in lock-step with a virtual microcontroller so that registers, memory locations and other debugged data can be retrieved from the virtual microcontroller without disrupting operation of a real microcontroller. When an I/O read instruction is carried out followed by a conditional jump instruction dependent upon the I/O read data, the virtual microcontroller does not have adequate time to compute the jump address after receipt of I/O read data from the real microcontroller. Thus, when this sequence of instructions is detected, the virtual microcontroller pre-calculates the jump address and makes the jump decision after receipt of the I/O read data from the real microcontroller.

Abstract: An apparatus and method for coupling a host computer to one or more peripherals or for coupling peripherals to one another. In one example, the apparatus includes a hub having an upstream port for coupling with the host computer and one or more downstream ports for coupling with the one or more peripherals; and a local host dynamically coupled with the upstream port. In one example, when the host computer is not coupled with the upstream port, the local host communicates with the peripherals; and when the host computer is coupled with the upstream port, the local host disconnects from the upstream port so that the host computer communicates with the peripherals through the hub. In this manner, the apparatus may be used to couple peripherals to a host computer, or when a host computer is not present, the data from the peripherals may be communicated through the local host. Other embodiments are also disclosed.

Abstract: An averaging circuit and method are provided to compute a running average over a number of samples without the need for maintaining a large sample queue or register. Generally, the method includes the steps of (i) receiving and accumulating data samples in a plurality of sample-accumulators while counting the number of samples received in a sample-counter; (ii) alternately selecting the sum of the samples accumulated in each of the sample-accumulators; (iii) dividing the sum of the samples accumulated in a selected sample-accumulator by the number of samples received to provide an average of the samples accumulated therein; and (iv) interleaving selection of the plurality of sample-accumulators and alternating reset of each to provide a running average over a number of samples.

Abstract: A semiconductor memory array having a first memory cell array with a number of first memory cells and a second cell array with a number of second memory cells. The memory cells in the first and second memory cell arrays are arranged in rows and columns. Each column of second memory cells in the second memory array is coupled to a column of first memory cells in the first memory array.

Abstract: A wireless tracking device and method of operation. A processor connected to a positioning system may periodically determine a location of the device. A wireless radio is connected to the processor for transmitting the location of the device across a wireless area network. The processor may be a microcontroller in a vehicle monitoring system, configured to receive vehicle location input from the positioning system as well as sensor input to determine vehicle condition. The wireless transmitter may be configured to transmit vehicle position and vehicle condition data to a remote data network access point.

Abstract: A method for parameterizing a user module. A first design application corresponding to a parameter of a user module is accessed, wherein the user module is a pre-configured electronic design to be implemented on a microcontroller. The parameter is adjusted within the first design application to derive parameterized data. In response to a command, the parameterized data is automatically loaded into a second design application.

Abstract: A wireless device decodes Direct Sequence Spread Spectrum (DSSS) encoded data and identifies data that can not be successfully DSSS decoded (invalid data). A checksum operation uses successfully decoded DSSS data (valid data) to correct the identified invalid corrupted data. The improved error correction leverages the valid and invalid bit information normally provided in DSSS systems to more effectively correct corrupted data bits. The improved error correction increases the processing gain of wireless devices thus increasing the effective wireless range without having to increase transmit power.

Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.

Abstract: Analog channel calibration methods, devices and systems are disclosed. One embodiment of the present invention pertains to a method for calibrating a channel offset of a current sensor which comprises measuring a channel offset native to a current sensor channel. The method also comprises storing the channel offset native to the current sensor channel to a register associated with the current sensor channel as a value. Additionally, the method comprises calibrating an output signal generated in response to an input signal to the current sensor channel based on the value.