Patents Assigned to Cypress Semiconductor
  • Patent number: 7702369
    Abstract: Disclosed is a circuit, comprising a device having a minimum operating voltage, a voltage supply, wherein the voltage supply may have a value above or below or equal to the minimum operating voltage of the device, a voltage boost converter circuit having a boosted voltage output, a switch coupled between the voltage supply, the boosted voltage output and the device, wherein the switch is capable of passing one of the voltage supply or the boosted voltage output to the device, and a processing element capable of controlling the switch. A system comprising the circuit and a method of using the circuit are further described.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: April 20, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Wright
  • Patent number: 7701297
    Abstract: A frequency synthesizer is described illustrating a method for modulation having improved frequency shape for spread spectrum modulation. In particular, the a standard curve is generated, wherein the standard curve modulates an input signal to generate a spread spectrum of frequencies with reduced amplitude and spreading of bandwidth. The standard curve is sampled at a sampling frequency. The length of the standard curve is adjusted such that critical points of the standard curve are captured.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 20, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shuliang Li
  • Patent number: 7698015
    Abstract: An integrated back-end integrated circuit (IC) manufacturing assembly is disclosed. In one embodiment, the present invention has a front-of-line portion comprising a plurality of integrated sub-stations for operating on a first plurality of die-strips on an in-line basis to produce a second plurality of die-strips. The present embodiment further comprises an end-of-line portion coupled to the front-of-line portion and comprising a plurality of integrated sub-stations for operating on the second plurality of die-strips on an in-line basis to produce die-strip components. The present embodiment also comprises an in-line test portion coupled to the end-of-line portion for testing the die-strip components. The present embodiment further comprises a finish portion coupled to the in-line test portion and comprising a plurality of integrated sub-stations operating on tested die-strip components.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: April 13, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventor: Bo Soon Chang
  • Patent number: 7692419
    Abstract: A system and method for enhanced frequency measurement. Embodiments provide an effective mechanism for reducing error associated with frequency measurements by amplifying the frequency of the signal fed to the frequency counter, thereby increasing the number of counts and reducing the error associated with each frequency measurement. Reductions in error enable the gate time for the frequency counter to be reduced, thereby increasing efficiency and cost-savings. After accessing the counts provided for the amplified frequency, the original frequency before amplification may be determined by reducing the amplified frequency (e.g., represented by the accessed counts) by the amount by which the original frequency was amplified. Embodiments provide an effective and efficient mechanism for automatically determining the amount of amplification for a given signal based upon its frequency and a maximum frequency of at least one of the frequency amplification component and the frequency counter.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: April 6, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventor: John Peel
  • Publication number: 20100079074
    Abstract: A light emitting driver circuit, system, and method are provided. The driver circuit system and method can be implemented in various ways. An embodiment includes a bypass circuit which diverts current from the LEDs whenever a switch coupled to the LEDs incurs residual current when turned off. In an additional or alternative embodiment, the residual current can be sensed and the amount of residual current used to trigger fetching of a compensation value. That compensation value can change a dimming function forwarded to the switch in order to compensate for, offset, or substantially eliminate the residual current through that switch.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Kedar Godbole
  • Publication number: 20100082861
    Abstract: In an embodiment, an apparatus includes a memory controller configured to control first and second memory components. A point-to-point data bus configured to pass data between the memory controller and the memory components may include a direct connection from each memory component to the memory controller. A daisy chained address bus configured to pass commands between the memory controller and the memory components may include a direct connection from the first memory component to the memory controller and a daisy chain connection from the first memory component to the second memory component.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: Cypress Semiconductor Corporation
    Inventors: Bruce Barbara, Gabriel Li, Thinh Tran, Joseph Tzou
  • Publication number: 20100079083
    Abstract: Remote lighting control methods, devices and systems are disclosed. One embodiment of the present invention pertains to a light device. The light device includes a light source for emitting light and a control circuit for setting an intensity level of the light source based on receipt of control data via a power line when the light device is electrically coupled to the power line. The control data is generated in response to user input to an input panel of a remote lighting control module for the light device. In addition, the light device comprises a unique address associated with a region on the input panel.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Dennis Seguine
  • Publication number: 20100079384
    Abstract: A touch screen is described. The touch screen is configured to have an array of conductive, optically transmissive sensor elements coupled to sensor circuitry. The sensor elements are disposed over a display to have a single layer of conductive, optically transmissive material positioned over pixels of the display.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: Cypress Semiconductor Corporation
    Inventor: Edward L. Grivna
  • Publication number: 20100079090
    Abstract: A light emitting driver circuit, system, and method are provided. The driver circuit system and method can be implemented in various ways. An embodiment includes a bypass circuit which diverts current from the LEDs whenever a switch coupled to the LEDs incurs residual current when turned off. In an additional or alternative embodiment, the residual current can be sensed and the amount of residual current used to trigger fetching of a compensation value. That compensation value can change a dimming function forwarded to the switch in order to compensate for, offset, or substantially eliminate the residual current through that switch.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: Cypress Semiconductor Corporation
    Inventors: Kedar Godbole, Hariom Rai
  • Patent number: 7685705
    Abstract: A probe card for testing dice on a wafer includes a substrate, a number of cantilevers formed on a surface thereof, and a number of probes extending from unsupported ends of the cantilevers. The unsupported ends of the cantilevers project over cavities on the surface of the substrate. The probes have tips to contact pads on the dice under test. The probe card may include a compressive layer above the surface of the substrate with a number of holes through which the probes extend.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: March 30, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: James E. Nulty, James A. Hunter, Alexander J. Herrera
  • Patent number: 7689724
    Abstract: An apparatus, system and method of sharing device data from a peripheral device by at least a first and a second computer where the peripheral device coupled with the first computer. The apparatus includes a device emulator coupled between the first computer and the second computer, the device emulator adapted to pass the device data from the first computer to the second computer in a format used by the peripheral device. Device data is received at the first computer, and it is determined whether the device data should be processed by the first computer, and the device data is passed to the device emulator for transmission to the second computer. In a method implementation, the determining operation may examine whether the first computer is the intended target of device data. The device data may be received at the device emulator and the device data may be encoded in a format used by the peripheral device, and transmitted in the format to the second computer.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: March 30, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Barry Sullivan Hatton, David Gordon Wright
  • Publication number: 20100073090
    Abstract: A system includes a current sense amplifier to receive an input voltage based on a sense current provided to load circuitry. The current sense amplifier is configured to generate an output voltage from the input voltage based, at least in part, on one or more reconfigurable characteristics of the current sense amplifier. The system also includes a microcontroller to compare the output voltage from the current sense amplifier to one or more programmable thresholds. The microcontroller is configured to direct a current controller to regulate the sense current provided to the load circuitry according to the comparison.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Derwin W. Mattos
  • Publication number: 20100074028
    Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.
    Type: Application
    Filed: December 24, 2008
    Publication date: March 25, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Ryan T. Hirose, Fredrick Jenne, Vijay Raghavan, Igor G. Kouznetsov, Paul Fredrick Ruths, Cristinel Zonte, Bogdan I. Georgescu, Leonard Vasile Gitlan, James Paul Myers
  • Patent number: 7684257
    Abstract: Disclosed is an accumulation memory circuit for providing a fast read, modify, and write operation in a single clock cycle time. The memory circuit is configured to read data stored in the memory device at an address. The memory circuit includes a reconfigurable adder unit generating read, accumulate and write output in a single clock cycle. The memory circuit is further configured to minimize data overflow. A high speed accumulation method comprises resetting a memory circuit; reading from an address of the memory circuit; performing internal addition within the memory circuit and rewriting into the address of the memory circuit in a single clock cycle.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 23, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Christopher Lee, Thinh Tran, Joseph Tzou, Morgan Whately
  • Patent number: 7683730
    Abstract: A clock circuit has a crystal. A differential amplifier has a first input coupled to a first node of the crystal and a second input of the differential amplifier coupled to a bias signal and an output of the differential amplifier coupled to a second node of the crystal.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: March 23, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Joseph Andrew Cetin, Jason Faris Muriby
  • Patent number: 7683701
    Abstract: Bandgap reference (BGR) circuits and methods are described herein for providing high accuracy, low power Bandgap operation when using small, low voltage devices in the analog blocks of the BGR circuit. In some cases, chopped input stabilization and dynamic current matching techniques may be combined to compensate for input voltage offsets in the operational amplifier portion and current offsets in the current mirror portion of the Bandgap circuit. When used together, the chopped stabilization and dynamic current matching techniques provide a significant increase in accuracy, especially when using small, low voltage devices in the analog blocks to reduce layout area and support low power supply operation (e.g., power supply values down to about 1.4 volts and below).
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: March 23, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bogdan I. Georgescu, Iulian C. Gradinariu
  • Publication number: 20100067551
    Abstract: An improved method of framing data packets in a direct sequence spread spectrum (DSSS) system that uses one pseudo-noise code (PN-Code) to frame the packet with a start-of-packet (SOP) and end-of-packet (EOP) indicator, and a different PN-Code to encode the data payload. Furthermore, the SOP is represented by the framing PN-Code, and the EOP is represented by the inverse of the framing PN-Code. This method creates a robust framing system that enables a DSSS system to operate with a low threshold of detection, thus maximizing transmission range even in noisy environments. Additionally, the PN-Code used for the SOP and EOP indicators can be used to indicate an acknowledgement response.
    Type: Application
    Filed: October 19, 2009
    Publication date: March 18, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: David Wright
  • Patent number: 7679422
    Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: March 16, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold Kutz
  • Patent number: 7679302
    Abstract: Disclosed is a controller circuit, comprising a plurality of sense inputs, an instrumentation amplifier block having inputs coupled to the plurality of sense inputs, a filter block coupled to the instrumentation amplifier block, a sum function coupled to the filter block, and a crossing detector block coupled to the filter block and the sum function. A method of controlling motor signals is further described.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: March 16, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Andrey Magarita
  • Patent number: 7678640
    Abstract: Methods are provided for manufacturing a semiconductor circuit on a substrate of a first conductivity type to control threshold voltages of devices in the circuit. One method involves: (i) forming a photoresist mask on a surface of the substrate defining a well boundary around an area in which a well is to be formed; (ii) implanting ions into the substrate to form a well of a second conductivity type, wherein a region proximal to the well boundary is effected by lateral scattering of the ions by the mask; and (iii) forming a channel of a device, at least a portion of the channel formed in the region proximal to the well boundary, wherein the ions are implanted at an acute angle to the surface substrate to shadow the portion of the channel from at least some of the ions implanted to form the channel. Other embodiments are also provided.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: March 16, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Polishchuk, Oliver Pohland