Patents Assigned to Cypress Semiconductor
  • Integrated circuit device with programmable analog subsystem
    Patent number: 9960773
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: May 1, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Carl Ferdinand Liepold, Onur Ozbek
  • Combined analog architecture and functionality in a mixed-signal array
    Patent number: 9952282
    Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: April 24, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
  • PSoC architecture
    Patent number: 9954528
    Abstract: An example semiconductor chip includes analog circuits, digital circuits, and a digital input port. The digital input port is to receive an input signal. The analog circuit is to receive the input signal from the digital input port and produce a digital signal based on the input signal.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: April 24, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Warren S. Snyder, Monte Mar
  • Programmable switched capacitor block
    Patent number: 9948286
    Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: April 17, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold Kutz, Jaskarn Singh Johal, Erhan Hancioglu, Hans Klein, Bruce Byrkett, Mark Hastings, Dennis Seguine, Kendall Castor-Perry, Monte Mar, Gajender Rohilla
  • FAST RAMP LOW SUPPLY CHARGE PUMP CIRCUITS
    Publication number: 20180102704
    Abstract: Techniques for fast ramp, low supply charge-pump circuits are described herein. In an example embodiment, a non-volatile memory device comprises a flash memory array coupled to a fast charge-pump circuit. The charge-pump circuit comprises a first charge pump, an active charge pump coupled as input to the first charge pump, and a power supply coupled as input to the active charge pump. The active charge pump is configured to initialize the first charge pump to a greater absolute voltage than the power supply and to provide power to the first charge pump during an active mode of the flash memory array.
    Type: Application
    Filed: September 27, 2017
    Publication date: April 12, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Michael Achter, Evrim Binboga
  • Security network controller
    Patent number: 9942207
    Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: April 10, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Mikami
  • Stochastic signal density modulation for optical transducer control
    Publication number: 20180098397
    Abstract: A controller for optical transducers uses stochastic signal density modulation to reduce electromagnetic interference.
    Type: Application
    Filed: July 27, 2017
    Publication date: April 5, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: David Van Ess, Patrick N Prendergast
  • Low-Power Type-C Receiver with High Idle Noise and DC-Level Rejection
    Publication number: 20180095511
    Abstract: Techniques for low-power USB Type-C receivers with high DC-level shift tolerance are described herein. In an example embodiment, a USB-enabled device comprises a receiver circuit coupled to a Configuration Channel (CC) line of a USB Type-C subsystem. The receiver circuit is configured to receive data from an incoming signal on the CC line even when the incoming signal has more than 250 mV of DC offset with respect to local ground, and to operate in presence of a VBUS charging current that is specified in a USB-PD specification.
    Type: Application
    Filed: October 18, 2017
    Publication date: April 5, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Rishi Agarwal, Nicholas Alexander Bodnaruk
  • MUTUAL CAPACITANCE SENSING ARRAY
    Publication number: 20180095558
    Abstract: A method and apparatus for sensing a conductive object by a mutual capacitance sensing array is described according to an embodiment of the present invention. The mutual capacitance sensing array comprises one or more sensor elements. Each sensor element comprises an outer frame including a conductive material. A cavity is formed within the interior of the outer frame.
    Type: Application
    Filed: September 1, 2017
    Publication date: April 5, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventor: Tao Peng
  • TECHNIQUES FOR GENERATING MICROCONTROLLER CONFIGURATION INFORMATION
    Publication number: 20180088912
    Abstract: An example includes accessing multiple configurations stored in a memory, where each configuration is associated with a corresponding circuit function implementable by an electronic device and associated with a corresponding set of resources of the electronic device. The example includes determining that one or more sets of resources of the electronic device are available for use by one or more configurations of the multiple configurations. Based on the determination, an embodiment includes representing a first configuration of the one or more configurations, using a graphical interface, and generating instructions that when executed cause the electronic device to be configured according the first configurations.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 29, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Douglas H. Anderson, Matthew A. Pleis, Fredrick Redding Hood
  • Capacitance sensing circuits, methods and systems having ground insertion electrodes
    Patent number: 9927926
    Abstract: A capacitance sensing system can include a plurality of transmit (TX) electrodes disposed in a first direction; a plurality of first electrodes disposed in a second direction and coupled to the TX electrodes by a mutual capacitance, and coupled to a capacitance sense circuit when at least one TX electrode receives a transmit signal; and a plurality of second electrodes structures, interspersed with the first electrodes and coupled to a ground node at least while the one TX electrode receives the transmit signal.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: March 27, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventor: Tao Peng
  • Memory transistor with multiple charge storing layers and a high work function gate electrode
    Patent number: 9929240
    Abstract: An example memory device includes a channel positioned between and electrically connecting a first diffusion region and a second diffusion region, and a tunnel dielectric layer, a multi-layer charge trapping layer, and a blocking dielectric layer disposed between the gate structure and the channel. The multi-layer charge trapping layer includes a first dielectric layer disposed abutting a second dielectric layer and an anti-tunneling layer disposed between the first and second dielectric layers. The anti-tunneling layer includes an oxide layer. The first dielectric layer includes oxygen-rich nitride and the second dielectric layer includes oxygen-lean nitride.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: March 27, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Polishchuk, Sagy Charel Levy, Krishnaswamy Ramkumar
  • Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices
    Patent number: 9928919
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: March 27, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Optical navigation systems and methods for background light detection and avoiding false detection and auto-movement
    Patent number: 9927915
    Abstract: A method of operating an optical navigation system which includes disabling a light source to measure the ambient or external light level, comparing the measurement to a threshold level to determine whether the ambient light would cause false detection and light induced motion, and adjusting sensing parameter(s) to mitigate the effect of the ambient light.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: March 27, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: John Frame, Jing Mu
  • SYSTEM FOR RE-ENUMERATION OF USB 3.0 COMPATIBLE PERIPHERAL DEVICES
    Publication number: 20180081697
    Abstract: Described herein is a system comprising a peripheral device that is connected to a host device over a bus compatible with USB 3.0. The host device comprises a reduced functionality USB host controller configured to perform a set of one or more preprogrammed functions from the USB 3.0 specification, and a universal asynchronous receiver and transmitter (UART) configured to sample USB response data received from the peripheral device over the bus.
    Type: Application
    Filed: August 24, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Pradeep Kumar Bajpai, Robert G. Rundell
  • SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES
    Publication number: 20180082746
    Abstract: A method for operating a memory device includes the steps of providing a first voltage to a first transistor of a first memory cell and a third transistor of a second memory cell, providing a second voltage to a gate of a second transistor of the first memory cell and a gate of a fourth transistor of the second memory cell, and providing a third voltage to a gate of the first transistor of the first memory cell and a gate of the third transistor of the second memory cell. Other embodiments are also described.
    Type: Application
    Filed: October 12, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Xiaojun Yu, Venkatraman Prabhakar, Igor Kouznetsov, Long Hinh, Bo Jin
  • Ratio-Metric Self-Capacitance-to-Code Convertor
    Publication number: 20180083650
    Abstract: A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a switch network, a sensor capacitor or modulation capacitor, and an integration capacitor may be coupled to a comparator to produce a data signal representative of the capacitance of the sensor capacitor of one of the charge transfer circuits. The data signal may be used to indicate a capacitance value of the self capacitance through conversion by a circuit.
    Type: Application
    Filed: October 11, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventor: Andriy Maharyta
  • Force Sensing
    Publication number: 20180081479
    Abstract: An apparatus including a first signal generator of a force sensing circuit to output a first excitation (TX) signal on a first terminal and a second TX signal on a second terminal. The first terminal and the second terminal are configured to couple to a first force sensor and a reference sensor. The apparatus includes a first receiver channel coupled to a third terminal and a fourth terminal. The third terminal is configured to couple to the first force sensor and the fourth terminal is configured to couple to the reference sensor. The force sensing circuit is configured to measure a first receive (RX) signal from the first force sensor via the third terminal and a second RX signal from the reference sensor via the fourth terminal. The force sensing circuit is configured to measure a force value indicative of a force applied to the first force sensor.
    Type: Application
    Filed: June 29, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Igor Kravets, Igor Kolych, Oleksandr Hoshtanar, Jens Weber, Oleksandr Karpin
  • Method of ONO Stack Formation
    Publication number: 20180083024
    Abstract: A method of controlling the thickness of gate oxides in an integrated CMOS process which includes performing a two-step gate oxidation process to concurrently oxidize and therefore consume at least a first portion of the cap layer of the NV gate stack to form a blocking oxide and form a gate oxide of at least one metal-oxide-semiconductor (MOS) transistor in the second region, wherein the gate oxide of the at least one MOS transistor is formed during both a first oxidation step and a second oxidation step of the gate oxidation process.
    Type: Application
    Filed: September 29, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventor: Krishnaswamy Ramkumar
  • MEMORY SUBSYSTEM WITH WRAPPED-TO-CONTINUOUS READ
    Publication number: 20180081564
    Abstract: Disclosed herein are system, method, and computer program product embodiments for accessing data of a memory. A method embodiment operates by receiving one or more requests for data stored across at least a first memory area and a second memory area of a memory. The method continues with performing, by at least one processor, a wrapped read of data within a first memory area of the memory. The method then performs, by the at least one processor, a continuous read of data within a second memory area of the memory, the second memory area being adjacent to the first memory area. The continuous read starts at a first boundary of the second memory area, and is performed automatically after the wrapped read of data within the first memory area.
    Type: Application
    Filed: October 12, 2017
    Publication date: March 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Qamrul Hasan, Shinsuke Okada, Yuichi Ise, Kai Dieffenbach, Kioymatsu SHOUJI