Patents Assigned to Cypress Semiconductor
  • Patent number: 8902174
    Abstract: An apparatus for and method of resolving multiple presences over a touch sensor are described. The method includes logically grouping data from a touch sensor array in order to convert the data into X-Y coordinates.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: December 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Jonathan R. Peterson
  • Patent number: 8902172
    Abstract: An apparatus and method for preventing unintentional activation of the one or more touch-sensor buttons caused by a presence of conductive liquid on the touch panel. The apparatus may include a processing device to prevent unintentional activations of one or more touch-sensor buttons caused by a presence of conductive liquid on the one or more touch-sensor buttons.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: December 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Tao Peng, Guanghai Li
  • Patent number: 8902173
    Abstract: Apparatuses and methods for determining a deflection of a moveable conductive plate that is moved over a capacitive sensing device. The method may include moving the moveable conductive plate over sensor elements of the capacitive sensing device, and determining the deflection of the moveable conductive plate. In determining the deflection, a deflection magnitude and a deflection direction may be determined by calculating a vector of x- and y-directions or a vector of a radius and an angle.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: December 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dennis Seguine
  • Patent number: 8902131
    Abstract: Embodiments of the invention relate to a configurable LCD driver system having a plurality of configurable LCD drivers. Each LCD driver may be configured as a common or segment driver by selecting a drive voltage from an appropriate set of drive voltages associated with a common or segment driver in accordance with certain parameters, such as whether a user may configure the LCD driver as a common driver or segment driver, a multiplex ratio, and/or bias ratio of an LCD panel. The drive time and drive strength associated with the LCD driver may also be configurable. The selected drive voltage may be provided to a drive buffer to output an LCD drive voltage waveform for driving one or more segments or pixels in an LCD panel. A memory may store appropriate display data for both the segment and common drivers to control the output drive capability of the LCD driver.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Wright, Jason Muriby, Erhan Hancioglu
  • Patent number: 8902554
    Abstract: Over-voltage tolerant circuits and methods are provided. In one embodiment, the circuit includes a pull-up transistor coupled to an I/O pad, a sensing circuit coupled to the I/O pad and to a voltage supply (Vcc), the sensing circuit configured to sense a voltage applied to the pad (Vpad), a latch coupled to the sensing circuit to retain an output of the sensing circuit, and a selection circuit coupled to the sensing circuit through the latch. The selection circuit includes a first bias circuit to apply Vcc to a well and gate of the pull-up transistor, a second bias circuit to apply Vpad to the gate and the well of the pull-up transistor, and a non-overlap circuit configured to ensure the gate and the well of the pull-up transistor is substantially always driven by either the first or the second bias circuit depending on the output of the sensing circuit.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: December 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Supreet Bhanja Deo, Timothy Williams, Pat Madden
  • Patent number: 8897067
    Abstract: A memory cell can include at least a first programmable section coupled between a supply node and a first data node; a volatile storage circuit coupled to the first data node; and the programmable section includes a programmable transistor having a first source/drain (S/D) region shared with a first transistor, and a second S/D region shared with a second transistor; wherein the first S/D region has a different dopant diffusion profile than the second S/D region, and the programmable transistor has a charge storage structure formed between its control gate and its channel. Methods of forming such a memory cell are also disclosed.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: November 25, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Venkatraman Prabhakar, Kaveh Shakeri, Long T Hinh, Sarath C. Puthenthermadam
  • Patent number: 8896553
    Abstract: A hybrid sensor module and methods of operating the same are provided. In one embodiment, the hybrid sensor module includes: (i) a touch sensor configured to sense motion of an object in proximity to a surface of the touch sensor; (ii) an optical navigation sensor (ONS) configured to illuminate the object through the surface of the touch sensor and to sense motion of the object based on light returned from the object; and (iii) a controller electrically coupled to the touch sensor and the ONS to process the sensed motion of the object and to generate an output signal in response to the sensed motion, wherein the controller is configured to dynamically adjust a tracking resolution of the hybrid sensor module based on a characteristic of the sensed motion. Other embodiments are disclosed.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: November 25, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Yansun Xu, Jinghui Mu
  • Publication number: 20140340978
    Abstract: A method can include storing a plurality of addresses within one cycle of a timing clock, each address corresponding to a storage location of a memory device; and following the one cycle, accessing a plurality of banks of the memory device in response to the stored addresses corresponding to different banks and preventing access to any one of the plurality of banks by more than one address of the one cycle; wherein each bank includes memory cells arranged into rows and columns that comprise the storage locations.
    Type: Application
    Filed: April 22, 2014
    Publication date: November 20, 2014
    Applicant: Cypress Semiconductor Corporation
    Inventors: Thinh Tran, Joseph Tzou, Jun Li
  • Patent number: 8892397
    Abstract: A device includes sensor substantially coplanar with one another in a sensor plane, each sensor generating a sense value that varies according to a physical distance between the sensor and an object without physically contacting the object. The device also includes control circuits configured to generate a first position value, a second position value, and a third value using the sense values. The first position value and the second position values identify a two-dimensional position of the object in the sensor plane and the third value varies in response to movement of the object in a Z-direction substantially perpendicular to the sensor plane. The control circuits include a programmable integrated circuit including an analog portion and a digital portion.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: November 18, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Richard Harding, John B. Foreman
  • Patent number: 8890547
    Abstract: A capacitive sensor may include a transmit electrode and a receive electrode capacitively coupled with the transmit electrode. A capacitance sensing circuit senses a capacitance between the transmit and receive electrodes by applying a signal to the transmit electrode and rectifying a signal induced at the receive electrode. A compensation circuit reduces the effect of a mutual and parasitic capacitances of the transmit and receive electrode pair by adding a compensation signal to the rectified signal.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: November 18, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Viktor Kremin
  • Patent number: 8883624
    Abstract: Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and depositing a high-k dielectric material over the gate stack of the NVM transistor and the plurality of MOS regions to concurrently form a blocking dielectric comprising the high-k dielectric material in the gate stack of the NVM transistor and high-k gate dielectrics in the plurality of MOS regions. In one embodiment, a first metal layer is deposited over the high-k dielectric material and patterned to concurrently form a metal gate over the gate stack of the NVM transistor, and a metal gate of a field effect transistor in one of the MOS regions.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: November 11, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Krishnaswamy Ramkumar
  • Publication number: 20140327553
    Abstract: A system can include a passive wireless interface circuit that generates data from a wireless signal and further includes an energy harvesting circuit that generates first operating power from the wireless signal; a meter interface circuit configured to receive at least one input signal and second operating power from a metering device; logic circuits configured to arbitrate accesses to nonvolatile storage circuits from the passive wireless interface and meter interface circuits using the first or second operating power.
    Type: Application
    Filed: September 26, 2013
    Publication date: November 6, 2014
    Applicant: Cypress Semiconductor Corporation
    Inventors: Mark R. Whitaker, Douglas D. Moran, Craig Taylor
  • Patent number: 8878823
    Abstract: An apparatus comprising a stylus with a dynamically switch tip shield is provided. The apparatus includes an elongated stylus housing having an end, a conductive tip disposed at least partially inside the stylus housing and extending from the end, a force sensor coupled to the conductive tip and configured to detect contact between the conductive tip and an object, a tip shield coupled with the stylus housing and extending from the end, and a switch coupled to the tip shield and the conductive tip.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: November 4, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Andriy Ryshtun
  • Patent number: 8878811
    Abstract: Apparatuses and methods for coupling a group of sensor elements together in one mode to collectively measure a capacitance on the group of sensor elements, in addition to individually measuring a capacitance on each of the sensor elements in another mode. The apparatus may include a processing device, and a plurality of sensor elements that are individually coupled in a first mode for normal sensing and collectively coupled in a second mode for proximity sensing.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: November 4, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Jason G. Baumbach
  • Patent number: 8873743
    Abstract: A touchpad has interleaved conductive traces across a touchpad surface. Each conductive trace has a first end and a second end. The width of the first end is larger than the width of the second end. The interleaved conductive traces have a first group of conductive traces alternated with a second group of conductive traces.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Tao Peng, Zheng Qin
  • Patent number: 8873264
    Abstract: A memory device can include a memory array section; a write first-in-first-out circuit (FIFO) configured to transfer write data to the memory array portion; at least one store circuit configured to store a copy of at least a portion of the write data stored in the write FIFO; and an address compare section configured to store write addresses corresponding to the write data of the forwarding circuit.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Thinh Tran, Joseph Tzou
  • Patent number: 8871595
    Abstract: An embodiment of a method of integrating a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming in a first region of a substrate a channel of a memory device from a semiconducting material overlying a surface of the substrate, the channel connecting a source and a drain of the memory device; forming a charge trapping dielectric stack over the channel adjacent to a plurality of surfaces of the channel, wherein the charge trapping dielectric stack includes a blocking layer on a charge trapping layer over a tunneling layer; and forming a MOS device over a second region of the substrate.
    Type: Grant
    Filed: March 31, 2012
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Krishnaswamy Ramkumar, Fredrick Jenne, Sagy Levy
  • Patent number: 8875002
    Abstract: A device includes a controller configured to provide a data word and check bits for the data word to decoding logic, the decoding logic configured to generate a decoding of the data word and check bits for the data word in conformance with an H-matrix having the following properties: (a) no all 0 columns; (b) all columns are distinct; (c) no linear dependency involving three or less columns; (d) no linear dependency involving columns Ci, Cj, Ck, Cm, where m>k>j>i, where j=i+1 and m=k+1; and (e) no linear dependency involving columns Ci, Cj, Ck, Cm, where m>k>j>i, where (j=i+1 and m?k=q) or (k=j+1 and m?i=q) or (m=k+1 and j?i=q) for all integer values of q such that q>1 and q<=d, where d>=2 and d<=n?1 where n?k is a number of the check bits.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Avijit Dutta
  • Patent number: 8872526
    Abstract: Apparatuses and methods of sense arrays with interleaving sense elements are described. One capacitive-sense array includes a first electrode and a second electrode disposed adjacent to the first electrode in a first axis. The capacitive-sense array comprises a sensor pitch in the first axis. The first electrode includes a first sense element including a first shape and a first interleaving sense element that interleaves with a first portion and a second portion of the second electrode to extend a first dimension of the first electrode to be greater than the sensor pitch in the first axis. The second electrode includes a second sense element including the first shape and a second interleaving sense element that interleaves with a first portion and a second portion of the first electrode to extend a second dimension of the second electrode to be greater than the sensor pitch in the first axis.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Oleksandr Hoshtanar, Igor Kravets
  • Patent number: 8874396
    Abstract: A processing device configured to induce, during a listening scan of a sense array, an injected touch to produce similar data as would be present during a touch scan of the sense array with a conductive object at a known location on the sense array. The processing device is further configured to compute, using the data, an estimate of a noise metric based on the injected touch.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: October 28, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Dana Olson, Andriy Maharyta, Steve Kolokowsky