Patents Assigned to Cypress Semiconductor
  • Patent number: 8813021
    Abstract: A design tool provides global resource conflict management. The design tool identifies a conflict in requested values of a global resource during development of an embedded application. The design tool further calculates new values of the global resource, and proposes the new values of the global resource as an alternative to the requested values to assist a user in resolution of the conflict.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Andrew Best
  • Patent number: 8810543
    Abstract: An apparatus for determining at least one centroid location for a contact at a touch-sensing surface may include a first slave controller coupled to a first capacitive touch panel comprising a first plurality of sensor elements, where the first slave controller is configured to measure a first set of capacitance values for a plurality of intersections of the first plurality of sensor elements, and a master controller coupled with the first slave controller, where the master controller is configured to receive the first set of capacitance values and calculate a first centroid position of a contact based on the first set of capacitance values and a second set of capacitance values.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Yohei Kurikawa
  • Patent number: 8810260
    Abstract: A system for sensing characteristics of a volume can include a mirror input configured to connect to a first mirror plate. The first mirror plate can be physically isolated from a first monitored space for containing a material. A sense input can be configured to connect to a first sense plate. The first sense plate can be positioned between the first mirror plate and the first monitored space, and can have a surface that faces the first monitored space. A capacitance sense section can generate a first sense value based on a capacitance at the sense input, and a mirror value based on a capacitance at the mirror input.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Yonghong Zhou
  • Patent number: 8810263
    Abstract: Apparatuses and methods of adaptive resolution circuits are described. One apparatus includes an input node coupled to a capacitance sense pin coupled to an electrode of a sense array and a capacitance-sensing circuit coupled to the input node and comprising an integrator configured to measure a capacitance with a first resolution. An adaptive resolution circuit is coupled to the capacitance-sensing circuit and the input node and is configured to selectively modify an integration capacitance of the integrator to set the integrator to measure the capacitance with a second resolution.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Cole Wilson, Jon Peterson, Benjamin Avery
  • Patent number: 8810546
    Abstract: Apparatuses and methods of frequency-response calculation are described. One method measures a charge on an electrode of a touch panel by a capacitance-sensing circuit of a processing device. The processing device measures a frequency response of the touch panel and selects an operating frequency of the touch panel in view of the frequency response.
    Type: Grant
    Filed: May 25, 2013
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Victor Kremin, Oleksandr Pirogov
  • Publication number: 20140225116
    Abstract: Nonvolatile charge trap memory devices with deuterium passivation of charge traps and methods of forming the same are described. In one embodiment, the device includes a channel formed from a semiconducting material overlying a surface on a substrate connecting a source and a drain of the memory device. A gate stack overlies the channel, the gate stack comprising a tunneling layer, a trapping layer, a blocking layer, a gate layer; and a deuterated gate cap layer. The gate cap layer has a higher deuterium concentration at an interface with the gate layer than at surface of the gate cap layer distal from the gate layer. In certain embodiments, the channel comprises polysilicon or recrystallized polysilicon. Other embodiments are also described.
    Type: Application
    Filed: March 28, 2014
    Publication date: August 14, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Krishnaswamy Ramkumar, Fredrick Jenne, William Koutny
  • Patent number: 8803813
    Abstract: An apparatus and method for reducing charge time and power consumption of a sensor element of a sensing device. The apparatus may include a sensor element of a sensing device that has a surface area of conductive material and one or more gaps in the conductive material. The sensor element may include a plurality of evenly-spaced, parallel bars of conductive material and a plurality of interconnect lines coupled to the evenly-spaced, parallel bars to form the one or more gaps in the conductive material of the sensor element.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: August 12, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jiang XiaoPing, Liu Hua
  • Patent number: 8806229
    Abstract: An integrated circuit device may include a plurality of external connections, any one of the connections providing both a power voltage path for the integrated circuit (IC) as well as an information signal path for the IC. At least one switch may be coupled to provide a power supply voltage to one of the external connections.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: August 12, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright
  • Patent number: 8797277
    Abstract: A method of estimating multiple touch positions on a touch sensor array, based on centroids calculated in the vicinity of a local maxima determined for the touch sensor array.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: August 5, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Vadym Grygorenko
  • Patent number: 8796098
    Abstract: Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a dielectric stack on a substrate, the dielectric stack including a tunneling dielectric on the substrate and a charge-trapping layer on the tunneling dielectric; patterning the dielectric stack to form a gate stack of a NVM transistor of a memory device in a first region of the substrate while concurrently removing the dielectric stack from a second region of the substrate; and performing a gate oxidation process of a baseline CMOS process flow to thermally grow a gate oxide of a MOS transistor overlying the substrate in the second region while concurrently growing a blocking oxide overlying the charge-trapping layer. In one embodiment, Indium is implanted to form a channel of the NVM transistor.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: August 5, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Krishnaswamy Ramkumar, Igor G. Kouznetsov, Venkatraman Prabhakar
  • Patent number: 8797301
    Abstract: Apparatuses and methods of active stylus to host device data transmitting. One method receives, at a stylus, an indication that a host device is performing a first coordinate scan to determine coordinates of the stylus proximate to a capacitive sense array of the host device. While the host device is performing the first coordinate scan, the stylus transmits at least two bits of stylus data to the host device.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: August 5, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andriy Ryshtun, Jeffrey M. Boschee, Viktor Kremin
  • Publication number: 20140210784
    Abstract: Described herein are capacitance sensing devices and methods for forming such devices. A capacitance sensing device includes a substrate and a plurality of electrodes disposed on an area of the substrate to form an active portion of the device. Each of the plurality of electrodes comprises at least one irregular edge formed along a non-linear path. The touch sensor also includes a first plurality of conductors disposed on the substrate. Each of the first plurality of conductors has an end electrically connected to one of the plurality of electrodes. The touch sensor can also include a second plurality of conductors that form a routing channel. Each of the second plurality of conductors has an end electrically connected to a second end of one of the first plurality of conductors. Each of the second plurality of conductors has an end electrically connected to a second end of one of the first plurality of conductors.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Applicant: Cypress Semiconductor Corporation
    Inventors: Alexandre Gourevitch, Peter G. Vavaroutsos, Vikas R. Dhurka
  • Publication number: 20140211547
    Abstract: A memory including current-limiting devices and methods of operating the same to prevent a spread of soft errors along rows in an array of memory cells in the memory are provided. In one embodiment, the method begins with providing a memory comprising an array of a plurality of memory cells arranged in rows and columns, wherein each of the columns is coupled to a supply voltage through one of a plurality of current-limiting devices, Next, each of the plurality of current-limiting devices are configured to limit current through each of the columns so that current through a memory cell in a row of the column due to a soft error rate event does not result in a lateral spread of soft errors to memory cells in the row in an adjacent column. Other embodiments are also provided.
    Type: Application
    Filed: March 29, 2014
    Publication date: July 31, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Ravindra M Kapre, Shahin Sharifzadeh, Helmut Puchner, Nayan Patel
  • Patent number: 8791862
    Abstract: An apparatus for a semiconductor-package includes a semiconductor device having a radio frequency (RF) input or output, an antenna pad, and a package structured to house the semiconductor device and the antenna pad. The antenna pad may be coupled to the radio frequency (RF) input or output, and the antenna pad is structured to reduce the inductance of the package. The antenna pad may include a pad disposed above the semiconductor device, a pad disposed to a side of the semiconductor device, or an antenna chip. An antenna may be coupled to the antenna pad. The antenna may include a trace antenna, a staggered antenna, or a helical antenna.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: July 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Paul Beard
  • Patent number: 8793635
    Abstract: A method and apparatus for configuring a microcontroller. An XML description of the microcontroller's hardware resources may be accessed. A user may select from available hardware resources and pre-defined user modules to select a configuration. Configuration information, which may include register bit patterns and microprocessor instructions, may be automatically generated. Additionally, application programming interface calls and structure, as well as interrupt vector tables may be automatically generated.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: July 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Doug Anderson, Matthew Pleis, Rick Hood
  • Patent number: 8791753
    Abstract: Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: July 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Saravanan Murugesan, Paul Walsh, Gerard Baldwin, Kaveh Hosseini
  • Patent number: 8788959
    Abstract: Target device monitoring systems and methods are presented. In one embodiment, a target device monitoring update method includes receiving a change in design element value in real time, wherein the design element values are associated with an operating target device. The changes in the design element value are analyzed. Express interface information is updated in accordance with results of the analyzing.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: July 22, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Ogami, Doug Anderson, Andrew Best, Marat Zhaksilikov
  • Patent number: 8786295
    Abstract: A capacitance-sensing device including a current-to-voltage converter and an analog-to-digital converter is described. A sense element is coupled to an input of the current-to-voltage converter. The current-to-voltage converter is configured to convert current changes in the coupled sense element to an output voltage and to maintain a constant voltage at the input. The analog-to-digital converter is configured to convert the output voltage generated by the current-to-voltage converter to a digital value.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: July 22, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Lokesh Chandra, Edward Grivna
  • Patent number: 8779780
    Abstract: A method and apparatus use a plurality of first region values to calculate a second region value, each of the plurality of first region values reflecting sensor element activity in a corresponding region of an input module, the second region value reflecting sensor element activity of a group of the corresponding regions. The method and apparatus determine that the input object is present relative to the group of the corresponding regions if the second region value meets or exceeds a threshold presence value.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 15, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jonathan R. Peterson, Dana Olson
  • Patent number: 8780073
    Abstract: An example capacitive sensor arrangement includes an integrated member residing within an interior region of a capacitive sensor element. The capacitive sensor element has a first resistance to a flow of current and the integrated member has a second resistance to the flow of current that is less than the first resistance.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: July 15, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Polishchuk, Vasyl Mandziy