Patents Assigned to Cypress Semiconductor
  • Programmable power mode sequencer
    Patent number: 8832475
    Abstract: A system includes a context file to store multiple contexts corresponding to different power modes of an electronic system, and a domain control device to generate control signals based, at least in part, on a context from the context file. The electronic system is configured to transition to a power mode corresponding to the context responsive to the control signals.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: September 9, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Michael Sheets
  • Compensation method and circuit for line rejection enhancement
    Patent number: 8829811
    Abstract: An embodiment of the present invention is directed to a method and circuit to control light emitting diode (LED) output. The method includes receiving a line voltage signal which powers a lighting circuit comprising an LED and determining an adjustment of a threshold based on a variation of the line voltage signal and/or a controller delay or other practical controller limitation or imperfection. The method further includes dynamically adjusting a threshold or other reference of a controller which controls a switch of said lighting circuit for compensating for line variations to maintain a substantially uniform LED current.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: September 9, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kedar Godbole, Hariom Rai
  • Gesture recognition system for a touch-sensing surface
    Patent number: 8830181
    Abstract: An apparatus and method for identifying gestures performed on a touch-sensing surface. In one embodiment, a gesture recognition unit processes an input signal to determine input metrics associated with contacts at the touch-sensing surface. The gesture recognition unit identifies a gesture based on comparing at least one of the input metrics with a threshold value associated with the gesture.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: September 9, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Paul Clark, Edward Grivna, Tony Park, Patrick Prendergast, Gabe Rowe, Ryan Seguine
  • Close touch detection and tracking
    Patent number: 8823664
    Abstract: A method of tracking touches at a touch-sensing surface may include, detecting an initial location of a first contact and an initial location of a second contact at the touch-sensing surface based on a first scan of a touch-sensing surface, detecting a plurality of signal levels caused by the first contact and the second contact during a second scan of the touch-sensing surface, identifying a first signal level of the plurality of signal levels as a local maximum, and locating a lost touch based on one or more signal levels associated with one or more unit cells within a fixed distance from a first unit cell associated with the local maximum.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Valeriy Kyrynyuk, Serhiy Prudkyy, Vasyl Mandziy
  • Oxide formation in a plasma process
    Patent number: 8822349
    Abstract: A method of making a semiconductor structure is provided. The method includes forming a dielectric layer using a high density plasma oxidation process. The dielectric layer is on a storage layer and the thickness of the storage layer is reduced during the high density plasma oxidation process.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jeong Soo Byun, Krishnaswamy Ramkumar
  • Systems and methods for super speed packet transfer
    Patent number: 8825925
    Abstract: An example method and system process a SuperSpeed packet transferred at a SuperSpeed transfer rate and based on processing the SuperSpeed packet, generate a Universal Serial Bus (USB) 2.0 packet to be transferred at a USB 2.0 transfer rate, the USB 2.0 transfer rate being less than the SuperSpeed transfer rate.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Gaurav Singh, Herve LeTourneur, Hans Van Antwerpen, Cathal G. Phelan
  • Detect and differentiate touches from different size conductive objects on a capacitive button
    Patent number: 8823399
    Abstract: Apparatuses and methods of capacitive buttons and detecting and differentiating touches from different size conductive objects on the capacitive buttons. One apparatus includes a capacitance-sensing circuit coupled to a capacitive button. The capacitive button includes a first sense element and a second sense element. The capacitance-sensing circuit is operative to measure signals from the first sense element and the second sense element with a sensing parameter (also referred to as tuning properties) set to a first value. The signals correspond to capacitances of the first sense element and second sense element. An inner perimeter of the first sense element is disposed to surround (at least in part) an outer perimeter of the second sense element. The apparatus further includes processing logic coupled to the capacitance-sensing circuit.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Vibheesh Bharathan
  • Bandgap ready circuit
    Patent number: 8823267
    Abstract: A bandgap ready circuit for an RFID tag includes a bandgap circuit for providing a bandgap voltage, a first comparator for monitoring first and second voltages in the bandgap circuit and for providing a first logic signal, a second comparator for monitoring third and fourth voltages in the bandgap circuit and for providing a second logic signal, and a logic circuit for combining the first and second logic signals to provide a bandgap ready logic signal.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Agustin Ochoa
  • EMBEDDED SONOS BASED MEMORY CELLS
    Publication number: 20140239374
    Abstract: Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a dielectric stack on a substrate, the dielectric stack including a tunneling dielectric on the substrate and a charge-trapping layer on the tunneling dielectric; patterning the dielectric stack to form a gate stack of a NVM transistor of a memory device in a first region of the substrate while concurrently removing the dielectric stack from a second region of the substrate; and performing a gate oxidation process of a baseline CMOS process flow to thermally grow a gate oxide of a MOS transistor overlying the substrate in the second region while concurrently growing a blocking oxide overlying the charge-trapping layer. In one embodiment, Indium is implanted to form a channel of the NVM transistor.
    Type: Application
    Filed: September 4, 2013
    Publication date: August 28, 2014
    Applicant: Cypress Semiconductor Corporation
    Inventors: Krishnaswamy Ramkumar, Igor G. Kouznetsov, Venkatraman Prabhakar
  • DEVELOPMENT, PROGRAMMING, AND DEBUGGING ENVIRONMENT
    Publication number: 20140245263
    Abstract: A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code.
    Type: Application
    Filed: May 7, 2014
    Publication date: August 28, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Haneef Mohammed, Jack Griffin
  • USB secure storage apparatus and method
    Patent number: 8819811
    Abstract: A secure media device preferably includes a Universal Serial Bus (USB) Mass Storage Class (MSC) interface. A storage media area is also preferably provided. The storage media is preferably divided into a first and second area by arranging the storage media into multiple Logical Units (LUNs). The second area is preferably accessed in a conventional manner using a host USB MSC driver through the USB MSC interface on the storage device. A password dialog application can be located in the second area of the storage device.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eric Luttmann, Jeff Miller
  • Integrated circuit device with programmable blocks and analog circuit control
    Patent number: 8816890
    Abstract: An integrated circuit device can include a plurality of analog blocks, including a plurality of programmable analog blocks configurable to provide different analog functions in response to configuration data, at least one programmable analog block including a programmable analog routing coupled to a plurality of external connections to the integrated circuit device; and a plurality of programmable digital blocks, at least one programmable digital block configurable into an analog block control circuit that configures the programmable analog routing.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jean-Paul Vanitegem, Haneef Mohammed, Hans Klein, Harold M. Kutz, Ata Khan
  • Hardware description language (HDL) incorporating statistically derived data and related methods
    Patent number: 8818784
    Abstract: A method of designing a circuit can include modeling one or more circuits in a hardware design language (HDL) (102) and confirming a basic behavior of such models (104). If a basic behavior has been met, the model can be modified to include an algorithm that is based on an experimental statistical analysis of manufactured circuits representing particular condition (e.g., factor) limits (referred to as “corners”) (106). Once a circuit model has been modified to include an algorithm that can represent performance corners, a simulation can be run that will represent circuit response at such an operational corner (110).
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jason Rubero, Jonathan Thurgood
  • Automatically balanced sensing device and method for multiple capacitive sensors
    Patent number: 8816704
    Abstract: A method includes generating a correction value for a capacitive sensor based on a difference between a capacitance of the capacitive sensor and a capacitance of at least one other capacitive sensor when an input to the capacitive sensor and the at least one other capacitive sensor is absent. The method further includes generating a compensated capacitance value for the capacitive sensor based on applying the correction value to a difference between the capacitance of the capacitive sensor when the input is absent and another capacitance of the capacitive sensor.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dennis Seguine
  • Finger position sensing for handheld sports equipment
    Patent number: 8814713
    Abstract: A finger position training sports device can include a surface for receiving at least a portion of a hand, a plurality of capacitance sensor areas formed on the surface, and a capacitance sense circuit attached to the sports device. The capacitance sense circuit can have an input coupled to each capacitance sensor area and a processor circuit that activates an indication value when predetermined sensor areas indicate contact with different portions of at least one hand.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Yuanyan Qin, Hua Liu
  • Current controlled recall schema
    Patent number: 8817536
    Abstract: A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andreas Scade, David Still, James Allen, Jay Ashokkumar, Jaskarn Singh Johal
  • Multiple touch detection
    Patent number: 8816986
    Abstract: An apparatus for and method of detecting multiple presences on a touch sensor device are described.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Seok-Pyong Park, Ryan D. Seguine
  • Methods and apparatus to detect a touch pattern
    Patent number: 8816985
    Abstract: A method and apparatus detect a first portion of a touch sequence through operating in a first scan mode and detect a second portion of the touch sequence through operating in a second scan mode. A touch sequence may be detected based on the detection of the first portion and the detection of the second portion.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 26, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Daniel Tate, Edward Grivna
  • METHOD OF INTEGRATING A CHARGE-TRAPPING GATE STACK INTO A CMOS FLOW
    Publication number: 20140235046
    Abstract: A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; forming a cap layer overlying the dielectric stack, wherein the cap layer comprises a multi-layer cap layer including at least a first cap layer overlying the charge-trapping layer, and a second cap layer overlying the first cap layer; patterning the cap layer and the dielectric stack to form a gate stack of a memory device; removing the second cap layer; and performing an oxidation process to oxidize the first cap layer to form a blocking oxide overlying the charge-trapping layer, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.
    Type: Application
    Filed: March 7, 2014
    Publication date: August 21, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Krishnaswamy Ramkumar
  • Global resource conflict management for an embedded application design
    Patent number: 8813021
    Abstract: A design tool provides global resource conflict management. The design tool identifies a conflict in requested values of a global resource during development of an embedded application. The design tool further calculates new values of the global resource, and proposes the new values of the global resource as an alternative to the requested values to assist a user in resolution of the conflict.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: August 19, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Andrew Best