Patents Assigned to Cypress Semiconductor
  • Predictive touch surface scanning
    Patent number: 8723827
    Abstract: A method for locating a conductive object at a touch-sensing surface may include detecting a first resolved location for the conductive object at the touch-sensing surface based on a first scan of the touch-sensing surface, predicting a location for the conductive object, and determining a second resolved location for the conductive object by performing a second scan of a subset of sensor electrodes of the touch-sensing surface, wherein the subset of sensor electrodes is selected based on the predicted location of the conductive object.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: May 13, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: David G. Wright, Steven Kolokowsky, Edward L. Grivna
  • nvSRAM with inverted recall
    Patent number: 8724386
    Abstract: A RECALL process in a memory circuit includes RECALLing the state of a volatile memory cell from a nonvolatile memory cell, and inverting an output of the volatile memory cell after every other RECALL.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: May 13, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kaveh Shakeri, Jay Ashokkumar
  • Interrupt generation and acknowledgment for RFID
    Patent number: 8723654
    Abstract: A memory circuit includes a memory, a memory access control circuit coupled to the memory, an RFID interface coupled to the memory access control circuit, a secondary interface coupled to the memory access control circuit, and an interrupt manager coupled to the memory access control circuit, the RFID interface, and the secondary interface.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: May 13, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark R. Whitaker, Leslie Joseph Marentette
  • Predictive touch surface scanning
    Patent number: 8723825
    Abstract: A method for locating a conductive object at a touch-sensing surface may include detecting a first resolved location for the conductive object at the touch-sensing surface based on a first scan of the touch-sensing surface, predicting a location for the conductive object, and determining a second resolved location for the conductive object by performing a second scan of a subset of sensor elements of the touch-sensing surface, wherein the subset of sensor elements is selected based on the predicted location of the conductive object.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: May 13, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: David G. Wright, Steven Kolokowsky, Edward L. Grivna
  • Apparatus and method for recognizing a gesture on a sensing device
    Patent number: 8717302
    Abstract: An apparatus and method for recognizing a gesture based on detected presences of first and second conductive objects on a sensing device. The apparatus may include a sensing device having a plurality of sensor elements to detect presences of first and second conductive objects, and a processing device, coupled to the sensing device, to recognize a gesture based on the presences of the first and second conductive objects. The recognized gesture may be scroll gestures or click-and-drag gestures.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 6, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Zheng Qin, Tao Peng
  • Reducing water influence on a touch-sensing device
    Patent number: 8717331
    Abstract: A method and apparatus for reducing water influence on a touch-sensing device is described.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: May 6, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Taras Kulyk, Oleksandr Karpin, Volodymyr Hutnyk
  • Input/output multiplexer bus
    Patent number: 8717042
    Abstract: One embodiment includes an I/O multiplexer bus including a signal line coupled to a signal source and multiple line switches, each line switch to couple a corresponding I/O port to the signal line. Switch logic coupled to the I/O multiplexer bus may programmatically switch the multiple line switches to couple at least one of the signal source and measurement circuitry to the respective I/O port.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 6, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dennis R. Seguine
  • Multifunctional configurable analog circuit block, methods, and integrated circuit devices having the same
    Patent number: 8717070
    Abstract: An integrated circuit device can include a plurality of analog circuit blocks, each comprising an input section configured to receive an analog input signal, and an output section configured to drive a plurality of output signals corresponding to the input signal, each output signal having a different maximum drive strength; and a signal network comprising a plurality of switches, and providing a configurable connection between at least outputs of the analog circuit blocks and a plurality of N connections to the integrated circuit device, including less than N direct signal paths between each analog circuit block and the N connections.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: May 6, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hans Klein, Jaskarn Johal, Harold Kutz, Jean-Paul Vanitegem
  • SONOS stack with split nitride memory layer
    Patent number: 8710579
    Abstract: A semiconductor device and method of manufacturing the same are provided. In one embodiment, semiconductor device comprises a split charge-trapping region comprising two nitride layers with charge traps distributed therein, the two nitride layers separated by one or more oxide layers. The two nitride layers include a first nitride layer closer to a substrate over which the split charge-trapping region is formed, and a second nitride layer on the other side of the one or more oxide layers. The second nitride layer comprises a majority of the charge traps. Other embodiments are also described.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Fredrick Jenne, Krishnaswamy Ramkumar
  • SONOS stack with split nitride memory layer
    Patent number: 8710578
    Abstract: Embodiments of a non-planar memory device including a split charge-trapping region and methods of forming the same are described. Generally, the device comprises: a channel formed from a thin film of semiconducting material overlying a surface on a substrate connecting a source and a drain of the memory device; a tunnel oxide overlying the channel; a split charge-trapping region overlying the tunnel oxide, the split charge-trapping region including a bottom charge-trapping layer comprising a nitride closer to the tunnel oxide, and a top charge-trapping layer, wherein the bottom charge-trapping layer is separated from the top charge-trapping layer by a thin anti-tunneling layer comprising an oxide. Other embodiments are also disclosed.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Fredrick Jenne, Krishnaswamy Ramkumar
  • Dual protocol input device
    Patent number: 8711096
    Abstract: A dual protocol input device for use with a host system is provided. In one embodiment, the input device comprises a chip with a number of semiconductor devices integrally formed thereon, including: an optical navigation sensor (ONS) to sense movement of the ONS relative to a surface; a wired protocol block to communicate data from the ONS to the host system by a wired communication protocol; a wireless protocol block to communicate data from the ONS to the host system by a wireless communication protocol; and a micro-controller coupled to the ONS, the wired protocol block and the wireless protocol block, to switch the input device between the wireless communication protocol and the wired communication protocol.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Ke-Cai Zeng, Jonathan Young, Pulkit Shah, Yansun Xu, Eric Mann, Shankar Subramani
  • State-monitoring memory element
    Patent number: 8705309
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: April 22, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy John Williams
  • Access methods and circuits for memory devices having multiple banks
    Patent number: 8705310
    Abstract: A method can include storing bank addresses, if received, on at least rising and falling edges of a same clock cycle; and if addresses stored on the rising and falling edges of the same clock cycle correspond to different banks of a memory device, starting accesses to both banks after the falling edge of the clock cycle; wherein any of the banks can be accessed in response to an address stored on a rising edge of a next clock cycle. Devices and additional methods are also disclosed.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: April 22, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Thinh Tran, Joseph Tzou, Jun Li
  • SONOS TYPE STACKS FOR NONVOLATILE CHANGETRAP MEMORY DEVICES AND METHODS TO FORM THE SAME
    Publication number: 20140103418
    Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes forming a first oxide layer on a surface of a substrate. The first oxide layer is exposed to a first decoupled plasma nitridation process having a first bias. Subsequently, a charge-trapping layer is formed on the first oxide layer. The charge-trapping layer is exposed to an oxidation process and then to a second decoupled plasma nitridation process having a second, different, bias.
    Type: Application
    Filed: December 12, 2013
    Publication date: April 17, 2014
    Applicant: Cypress Semiconductor Corporation
    Inventors: Helmut PUCHNER, Igor POLISHCHUK, Sagy LEVY
  • Power supply tracking single ended sensing scheme for SONOS memories
    Patent number: 8699275
    Abstract: An apparatus and method for sensing memories is provided. In one embodiment, the apparatus includes a current sense amplifier, a column multiplexer coupled to a first input of the current sense amplifier and to a memory array, and a current reference circuit and a replica pass transistor coupled to a second input of the current sense amplifier. Other embodiments are also provided.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: April 15, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Vijay Kumar Srinivas Raghavan
  • Global parameter management graphical user interface (GUI) for embedded application design
    Patent number: 8701023
    Abstract: A design tool provides a conflict management graphical user interface (GUI). The conflict management GUI notifies a user that requested values of a global resource result in a conflict during development of an embedded application. The conflict management GUI further provides the user with a user interface element to adjust the requested values until the conflict is resolved.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: April 15, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Marat M. Zhaksilikov, Kenneth Y. Ogami, Andrew Best
  • Method and apparatus for identification of touch panels
    Patent number: 8698760
    Abstract: A method for configuring a touchscreen controller may include identifying a model of a touchscreen by measuring a capacitance or resistance of at least one element integrated in the touchscreen, identifying the model of the touchscreen based on the measured capacitance or resistance, and configuring the touchscreen controller based on the identified model of the touchscreen.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: April 15, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Patrick Prendergast, Erik Anderson
  • MEMORY CELL ARRAY LATCHUP PREVENTION
    Publication number: 20140098598
    Abstract: A current-limiting device may be configured to be placed along a power-supply bus to limit current through a first complimentary-metal-oxide semiconductor (CMOS) circuit coupled to the power-supply bus so that current does not exceed a trigger current level of a pnpn diode in a second CMOS circuit coupled to the power bus.
    Type: Application
    Filed: July 23, 2013
    Publication date: April 10, 2014
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: RavIndra Kapre, Shahin Sharifzadeh
  • Contact identification and tracking on a capacitance sensing array
    Patent number: 8692795
    Abstract: A technique for providing reliable position calculations for conductive inputs at the edges of a touch-sensitive array is disclosed. A matrix of sensors is completed using virtual sensors or nodes, allowing for a closer approximation of position of a conductive object. The matrix may be defined by a center point or sensor and a number of surrounding nodes or sensors.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: April 8, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Victor Kremin, Volodymyr Hutnyk, Vasyl Mandziy
  • Methods and circuits for measuring mutual and self capacitance
    Patent number: 8692563
    Abstract: In an example embodiment, an apparatus includes a sensing device. The sensing device includes circuitry configured to sense self-capacitance and circuitry configured to sense mutual-capacitance, each configured to detect capacitance values corresponding to whether an object is proximate to a touch screen. The sensing device is configured to measure a first capacitance value using the self-capacitance circuitry during self-capacitance sensing operations and to measure a second capacitance value using the mutual-capacitance circuitry during mutual-capacitance sensing operations.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: April 8, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Andriy Maharyta