Patents Assigned to Freescale
  • Patent number: 9362211
    Abstract: An integrated circuit package has an exposed die pad with a trench and openings in the trench that are filled with encapsulant to form an encapsulant ring near the edges of the die pad. During assembly, the encapsulant passes through the openings and fills the trench to form the encapsulant ring. The ring helps to keep the die pad from separating from the encapsulant caused by thermal cycling. Air vents might be included in the die pad surface to allow air to escape from the trenches and the openings as they fill with encapsulant. Trenches from the openings to the die pad edge on the chip-side of the die pad might be included to increase adhesion of the encapsulant to the die pad.
    Type: Grant
    Filed: November 1, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Wei Gao, Zhiwei Gong, Yanting Tian, Jinzhong Yao, Dehong Ye
  • Patent number: 9362904
    Abstract: A system having a power on reset circuit including a voltage divide), a multiplexer coupled to two outputs of the voltage divider, a first comparator coupled to the multiplexer and a reference, a logic gate coupled to the first comparator, a second comparator coupled to one of the two outputs of the voltage divider, and an emulation gate coupled to the second comparator.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: June 7, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Chris C. Dao, Stefano Pietri, Juxiang Ren
  • Patent number: 9362234
    Abstract: Shielded device packages and related fabrication methods are provided. An exemplary device package includes one or more electrical components, a molding compound overlying the one or more electrical components, a conductive interconnect structure within the molding compound, a conductive frame structure laterally surrounding the one or more electrical components and the interconnect structure, and a shielding structure overlying the one or more electrical components. The shielding structure is electrically connected to the frame structure and at least a portion of the molding compound resides between the shielding structure and the one or more electrical components.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Eduard J. Pabst, Sergio P. Pacheco, Weng F. Yap
  • Patent number: 9362894
    Abstract: A clock generator includes a diagnostic circuit that includes first and second muxes, first and second comparators, a logic gate, and a counter. The first mux receives first and second voltage signals and outputs a first intermediate signal based on a control signal. The second mux receives third and fourth voltage signals and outputs a second intermediate signal based on the control signal. The first and second comparators compare the intermediate signals with a first signal that is indicative of a DC value of the clock signal for generating first and second comparison signals. The logic gate receives the first and second intermediate signals and generates a control signal. The counter receives the clock signal and the control signal and generates a clock ready signal that is indicative of stability and quality of the clock signal.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Ateet Omer, Deependra K. Jain, Anand Kumar Sinha, Krishna Thakur
  • Patent number: 9359192
    Abstract: The various embodiments described herein provide microelectromechanical systems (MEMS) sensor devices and methods of forming the same. In general, the embodiments provide MEMS sensor devices formed with two semiconductor die that are bonded together. Specifically, a sensor die includes at least one MEMS sensor fabricated thereon, such as MEMS gyroscope or MEMS accelerometer. A control-circuit die includes at least one integrated MEMS control circuit formed on an active area of the die. The control-circuit die is bonded to the sensor die with the active area and the integrated MEMS control circuits on the exterior side. The bonding defines and seals a cavity between the two die that encompasses the MEMS sensor and can be used to seal the MEMS sensor in a vacuum.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Philip H. Bowles, Mamur Chowdhury, Vijay Sarihan
  • Patent number: 9362819
    Abstract: A charge pump includes first through fifth transistors and a capacitor. The first through fourth transistors are connected in cascade and form a control circuit. The second transistor has a gate connected to its drain and hence, acts as a diode. The charge pump receives a clock signal and a supply voltage and generates an output voltage where the level of the output voltage is controlled by varying a size of the second transistor.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Anil Kumar Gottapu, Mayank Jain
  • Patent number: 9362394
    Abstract: Power device termination structures and methods are disclosed herein. The structures include a trenched-gate semiconductor device. The trenched-gate semiconductor device includes a semiconducting material and an array of trenched-gate power transistors. The array defines an inner region including a plurality of inner transistors and an outer region including a plurality of outer transistors. The inner transistors include a plurality of inner trenches that has an average inner region spacing. The outer transistors include a plurality of outer trenches that has an average termination region spacing. The average termination region spacing is greater than the average inner region spacing or is selected such that a breakdown voltage of the plurality of outer transistors is greater than a breakdown voltage of the plurality of inner transistors.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Moaniss Zitouni, Edouard D. de Frésart, Pon Sung Ku, Ganming Qin
  • Patent number: 9362479
    Abstract: A semiconductor sensor device includes a device substrate, a micro-controller unit (MCU) die attached to the substrate, and a packaged pressure sensor having a sensor substrate and a pressure sensor die. The sensor substrate has a front side with the pressure sensor die attached to it, a back side, and an opening from the front side to the back side. A molding compound encapsulates the MCU die, the device substrate, and the packaged pressure sensor. A back side of the sensor substrate and the opening in the sensor substrate are exposed on an outer surface of the molding compound.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Wai Yew Lo
  • Patent number: 9360319
    Abstract: A gyroscope includes a first drive mass driven in a first drive motion along a first axis, the first drive motion generating a first sense motion of a first sense mass in response to rotation of the gyroscope. The gyroscope further includes a second drive mass driven in a second drive motion along a second axis that is transverse to the first axis. The second drive motion generates a second sense motion of a second sense mass in response to rotation of the gyroscope. A drive spring system interconnects the two drive masses to couple the first and second drive motions so that a single drive mode can be implemented. The sense motion of each sense mass is along a third axis, where the third axis is transverse to the other axes. The sense motion is translational motion such the sense masses remain parallel to the surface of the substrate.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: June 7, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Kemiao Jia
  • Patent number: 9362198
    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lakshminarayan Viswanathan, Bruce M. Green, Darrell G. Hill, L M Mahalingam
  • Patent number: 9362915
    Abstract: A low voltage differential signaling generating circuit, which comprises a current source a pair of output nodes for providing a differential signal by virtue of a voltage difference therebetween, first and second differential switch circuitries and a bypass circuitry. The first differential switch circuitry selectively connects the current source to the first output node based on a control signal to cause a current flow from the first output node to the second one. The second differential switch circuitry selectively connects the current source to the second output node based on the control signal to cause a current flow from the second output node to the first one. The bypass circuitry is arranged in parallel to the first and second differential switch circuitries and is selectively switched based on an idle mode signal to prevent a current between the output nodes.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: June 7, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jonathan M. Phillippe, Gilford E. Lubbers, Chris J. Micielli
  • Patent number: 9362212
    Abstract: A packaged integrated circuit device includes a substrate module, leads, an IC die having first and second sets of die contact pads, and an encapsulant. The substrate module has upper and lower sets of conductive contacts on its upper and lower surfaces, respectively. The upper set of conductive contacts is electrically connected to the lower set of conductive contacts. The first set of die contact pads is electrically connected to the upper set of conductive contacts. The second set of die contact pads is electrically connected to the leads. Certain embodiments are a multi-form packaged device having both leads and conductive balls supporting different types of external connections, such as BGA and QFN.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Yanbo Xu, Jianshe Bi, Jinsheng Wang, Zhijie Wang, Fei Zong
  • Patent number: 9362987
    Abstract: Embodiments of inductive communication devices include first and second IC die and an inductive coupling substrate. The first IC die has a first coil. The inductive coupling substrate has a second coil and a first signal communication interface (e.g., a third coil or a contact). The second IC die has a second signal communication interface (e.g., a fourth coil or a contact). The first IC die and the inductive coupling substrate are arranged so that the first and second coils are aligned across a gap between the first IC die and the inductive coupling substrate. A dielectric component is positioned within the gap between the first and second coils to galvanically isolate the first IC die and the inductive coupling substrate. During operation, signals are conveyed between the first and second IC die through inductive coupling between the coils and communication through the signal communication interfaces.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Fred T. Brauchler, Randall C. Gray
  • Patent number: 9360496
    Abstract: A microelectromechanical systems (MEMS) device, such as a three-axis MEMS device can sense acceleration in three orthogonal axes. The MEMS device includes a single proof mass and suspension spring systems that movably couple the proof mass to a substrate. The suspension spring systems include translatory spring elements and torsion spring elements. The translatory spring elements enable translatory motion of the proof mass relative to the substrate in two orthogonal directions that are parallel to the plane of the MEMS device in order to sense forces in the two orthogonal directions. The torsion spring elements enable rotation of the proof mass about a rotational axis in order to sense force in a third direction that is orthogonal to the other two directions. The translatory spring elements have asymmetric stiffness configured to compensate for an asymmetric mass of the movable element used to sense in the third direction.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: June 7, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Michael Naumann
  • Patent number: 9360883
    Abstract: A fully digital glitch-free clock multiplexer includes a monitoring circuit that automatically switches to a newly selected clock, after a defined time period, from a currently selected clock, when the currently selected clock is absent. A maximum time limit is calculated based on a min and max clock frequency ratio. The monitoring circuit operates only when the clock is being switched. This provides flexibility to software to switch the clock any time whether or not the current clock is present, and prevents the system from hanging in the absence of the clock.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Arun Kumar Barman, Vivek Sharma
  • Patent number: 9361104
    Abstract: In a data processing system having execution circuitry, a method includes providing a cross-check instruction and a reference instruction to the execution circuitry, where the reference instruction has an operand. The method also includes executing the reference instruction to obtain a first result. Residual information is derived from execution of the reference instruction, and the method also includes executing the cross-check instruction using the residual information to obtain a second result. The second result obtained from execution of the cross-check instruction is compared to the operand of the reference instruction to determine whether an error occurred during execution of the reference instruction or the cross-check instruction.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Gary R. Morrison, William C. Moyer
  • Patent number: 9362280
    Abstract: An integrated circuit with devices having dielectric layers with different thicknesses. The dielectric layers include a high-k dielectric and some of the dielectric layers include an oxide layer that is formed from an oxidation process. Each device includes a layer including germanium or carbon located underneath the electrode stack of the device. A silicon cap layers is located over the layer including germanium or carbon.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Gauri V. Karve, Mark D. Hall, Srikanth B. Samavedam
  • Publication number: 20160154047
    Abstract: A sensor circuit, comprising at least: a first sensor arranged to selectively receive a first test current; a first digital-to-analog converter, DAC, arranged to receive a first signal from the first sensor and output a first compensation signal in response thereto; a second DAC arranged to receive a second signal from a second sensor and output a second compensation signal in response thereto; and a controller operably coupled to the first and second DACs and operable to determine from at least one of: the first compensation signal and second compensation signal whether a short condition exists between the first sensor and the second sensor.
    Type: Application
    Filed: May 4, 2015
    Publication date: June 2, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: BENOIT ALCOUFFE, SEBASTIEN ABAZIOU, ROBERTO VELAZQUEZ
  • Publication number: 20160156180
    Abstract: An electrostatic discharge protection circuit comprises at least two electrostatic discharge protection units connected in series between respective pairs of at least three input terminals, one of the input terminals being a reference input terminal. Each of the units comprises a silicon controlled rectifier and a current mirror. The output of the silicon controlled rectifier constitutes a first output of the respective unit and is connected to an input terminal of the circuit. The output of the current mirror constitutes a second output of the respective unit and is connected with the reference input terminal of the circuit. Thus the units are connected in series but the output terminals of the current mirrors are all connected with the reference input terminal, which may be a ground terminal, so as to minimise the breakdown resistance of the circuit.
    Type: Application
    Filed: May 4, 2015
    Publication date: June 2, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: PATRICE BESSE, PHILIPPE GIVELIN, JEAN PHILIPPE LAINE
  • Publication number: 20160156492
    Abstract: A radio signal decoder (100) is provided.
    Type: Application
    Filed: July 1, 2013
    Publication date: June 2, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventor: Vincent MARTINEZ