Abstract: A technique to perform filtering of ringing artifacts is disclosed herein. An example apparatus may include a decoder configured to receive a bitstream, decode the bitstream into blocks, identify conditions in the blocks associated with generation of ringing artifacts, and filter the ringing artifacts from one or more of the blocks responsive to identification of the conditions by the decoder. An example method may include detecting conditions in a bitstream that lead to ringing artifacts, configuring a filter based on the conditions, and filtering the ringing artifacts from blocks of decoded bitstream.
Abstract: An apparatus includes a plurality of memory devices and a control circuit. The control circuit may be configured to enable a plurality of access modes for the plurality of memory devices. In a one-channel mode, all of the memory devices are accessed using a single selectable channel. In a two-channel mode, a first portion of the plurality of memory devices is accessed using a first channel and a second portion of the plurality of memory devices is accessed using a second channel.
Abstract: Apparatuses and methods for filtering noise from a video signal are described herein. An example apparatus may include a noise filter system configured to filter noise from a frame of a video signal based on a noise level of the frame to provide a filtered video signal. The noise filter system may be configured to select macroblocks of the frame that have an associated weighted activity to variance ratio that exceeds a threshold value. The noise filter system may be further configured to calculate the noise level of the frame based on estimated noise levels of each of the selected macroblocks of the frame. The example apparatus may further include an encoder configured to encode the filtered video signal to provide a compressed bitstream.
Abstract: Example methods and apparatuses including a picture parallel decoder are described herein. The picture parallel decoder includes an entropy pre-processing unit, an entropy transcoding unit, and a plurality of decoders. The entropy pre-processing unit may be configured to determine dependencies between frames of an encoded bitstream and to determine slice location data within the encoded bitstream based on dependencies between the frames. The entropy transcoding unit may be configured to transcode slices of the encoded bitstream based on the dependencies between frames. The plurality of decoders may be configured to decode two or more of the transcoded slices in parallel.
Abstract: Examples of methods and apparatuses for estimating bit counts of a bitstream are described herein. An entropy encoder may include a bitstream encoding module and a bit count estimation module. The bitstream encoding module may be configured to encode a plurality of syntax elements according to a first encoding technique. The bit count estimation module may be configured to provide estimated bit counts for encoding the plurality of syntax elements according to a second encoding technique. In at least one embodiment, the bitstream encoding module may be further configured to encode the plurality of syntax elements based on the estimated bit counts.
Abstract: An inductive wireless power transfer device comprises a transmitter that comprises a transmit coil configured to generate a wireless power signal to a coupling region in response to an input voltage, and a modulator configured to modulate the wireless power signal and encode data with the wireless power signal to establish a back-channel communication link from the transmitter to a receiver. An inductive wireless power receiving device comprises a receiver that comprises a receive coil configured to generate a time varying signal in response to receiving a modulated wireless power signal from a transmitter in a coupling region, and a demodulator configured to demodulate the modulated wireless power signal from an established back-channel communication link from the transmitter to a receiver. Related inductive wireless power transfer systems and methods for back-channel communication from the transmitter to the receiver of an inductive wireless power transfer system are disclosed.
Type:
Grant
Filed:
January 9, 2015
Date of Patent:
July 3, 2018
Assignee:
Integrated Device Technology, Inc.
Inventors:
Manjit Singh, Siamak Bastami, David Wilson
Abstract: A wireless power enabled apparatus may comprise a wireless power receiver that includes a receive coil configured to generate an AC signal responsive an electromagnetic field, a rectifier including a plurality of switches configured to receive the AC signal and generate an output power signal, and control logic configured to control the plurality of switches to cause the rectifier to modulate the output power signal. The control logic may be configured to control the plurality of switches within the rectifier to have an overlap delay that modulates at least one parameter of the wireless power receiver. A method of operating a receiver side of a wireless power transfer system comprises generating an output power signal including a rectified voltage and a rectified current responsive to receiving a wireless power signal, and controlling a rectifier according to at least one mode including a power modulation mode modulating the output power signal.
Abstract: A wireless power enabled apparatus includes a wireless power receiver. The wireless power receiver includes one or more receive coils configured to generate an AC power signal responsive to a wireless power signal. The wireless power receiver also includes two or more inductors configured with tightly coupled windings that share a common leakage inductance. Switching circuits are included such that each switching circuit is operably coupled to a corresponding one of the inductors. Control logic is configured to operate switches of the switching circuits such that each of the switching circuits and its corresponding two or more inductors are operated to shift between an energy storage mode for one or more phases of a switching period and an energy transfer mode for other phases of the switching period and the phases combine to comprise an entirety of the switching period.
Abstract: A wireless power transmission system is presented. The wireless power circuit includes an adaptive transmitter coupled to a transmit coil; a receive coil in interaction with the transmit coil, the receive coil being thin and having an inner diameter large enough to accommodate sensors of a wearable device; and a receive circuit receiving power from the receive coil.
Abstract: A switching regulator is presented. An embodiment of the switching regulator can include a high switch coupled between an input voltage and a switched output; a low switch coupled between the switched output and a ground; and a ringing switch coupled between a capacitor and the switched output, wherein the ringing switch is closed prior to transition into a tristate where both the high switch and the low switch are open.
Abstract: A timing device that includes an OTP NVM, a first periodic signal generator operable to generate a periodic signal having a first frequency, a second periodic signal generator operable to generate a periodic signal having a frequency that is lower than the first frequency, and selection logic. In a first operating mode, the selection logic is configured to output the first periodic signal at an output terminal as long as a crystal clock feedback signal is received at the input terminal and output the second periodic signal when the crystal clock feedback signal is not received at the input terminal. In a second operating mode, the selection logic is configured to output the first periodic signal as long as a output enable signal is received at the input terminal and not provide any output at the output terminal when the output enable signal is not received at the input terminal.
Abstract: A wireless power enabled apparatus includes a wireless power receiver. The wireless power receiver includes a receive coil, a rectifier, a regulator, and a damping circuit. The receive coil is configured to generate an AC power signal responsive to a wireless power signal. The rectifier is configured to receive the AC power signal and generate a DC rectified power signal relative to a rectified ground signal. The regulator is operably coupled with the rectifier to receive the DC rectified power signal and generate an output voltage. The damping circuit is operably coupled between the DC rectified power signal and the rectified ground signal and in parallel with the regulator. The damping circuit is configured to suppress audible harmonics generated by the wireless power receiver at some loads by providing a damping impedance for the DC rectified power signal.
Abstract: A frequency synthesizer comprising a first phase locked loop (PLL) circuit coupled to receive a reference frequency signal from a reference oscillator, the first PLL circuit comprising a first voltage controlled oscillator (VCO) having a bulk acoustic wave (BAW) resonator and a first fractional feedback divider circuit, the first PLL circuit outputting a first tuned frequency signal and a first plurality of integer divider circuits coupled to receive the first tuned frequency signal from the first PLL circuit and each of the first plurality of integer-only post-PLL divider circuits to provide one of a plurality of output frequency signals of the frequency synthesizer.
Abstract: A wireless power enabled apparatus may comprise a wireless power receiver that includes a receive coil configured to generate an AC power signal responsive to a wireless power signal, a rectifier including a plurality of switches configured to receive the AC power signal and generate a DC rectified power signal, a regulator operably coupled with the rectifier to receive the DC rectified power signal and generate an output power signal, and control logic configured to generate a communication signal responsive to adjusting an input impedance of the regulator. A method of operating a wireless power receiver includes generating a rectified voltage responsive to receiving a wireless power signal, generating an output voltage from the rectified voltage with a voltage regulator, and controlling the voltage regulator during a communication mode of wireless power receiver to modulate a characteristic of the voltage regulator with data for transmission to a wireless power transmitter.
Abstract: A wireless power receiver may include a receive coil configured to generate an AC power signal responsive to wireless power transfer from a wireless power transmitter, and control logic configured to detect misalignment of the receive coil and a transmit coil of the wireless power transmitter responsive to a determination of efficiency of wireless power transfer therebetween. A method for operating a wireless power receiver may include detecting misalignment between a receive coil and a transmit coil of a wireless power transmitter responsive to detecting monitoring a value indicative of efficiency of wireless power transfer between the wireless power transmitter and the wireless power receiver, and causing an indication to be provided to a user to assist with correcting the misalignment.
Type:
Grant
Filed:
September 26, 2014
Date of Patent:
April 17, 2018
Assignee:
Integrated Device Technology, Inc.
Inventors:
Jianbin Hao, Detelin Martchovsky, Chan Young Jeong, Arman Naghavi
Abstract: A system and method of wireless power transfer using a power converter with a bypass mode includes a power converter. The power converter includes a pulsed switch, a capacitor configured to supply a drive voltage to the pulsed switch, a first circuit configured to charge the capacitor when the power converter operates in a switched mode of operation, and, a second circuit configured to charge the capacitor when the power converter operates in a bypass mode of operation.
Type:
Grant
Filed:
October 27, 2015
Date of Patent:
April 3, 2018
Assignee:
Integrated Device Technology, Inc.
Inventors:
Rosario Pagano, Christopher Joseph Daffron, Angel Maria Gomez Arguello, Siamak Abedinpour
Abstract: The present invention relates to a linear, high sensitivity, high speed trans-impedance amplifier (TIA) which allows a large dynamic range of input current up to very large values, maintains high linearity and keeps constant output voltage, maintains the same frequency response across the full gain control range, provides very high input sensitivity and large bandwidth, and allows input current monitoring without affecting input sensitivity. In other words, the novel circuit disclosed herein provides for the feedback path to maintain the same level of feedback even while the output signal is varied. This allows a wide and stable bandwidth, as well as a monitor to be placed in the TIA.
Abstract: A wireless power enabled apparatus including a wireless power receiver. The wireless power receiver includes a receive coil configured to generate an AC power signal responsive to a wireless power signal. A rectifier is configured to receive the AC power signal and generate a DC rectified power signal. A power transistor in a pass-transistor configuration is configured to receive the DC rectified power signal and generate an output power signal. A compensation current source operably coupled to the output power signal is configured to maintain a substantially constant voltage on the output power signal by adjusting a current through the compensation current source during a communication period employing backscatter modulation on the receive coil.
Abstract: A multimode receiver can include on or more of an over-voltage protection circuit or a high frequency mode switch. As such, some embodiments of a multi-mode receiver includes a rectifier; a high frequency circuit coupled to the rectifier; a low frequency circuit coupled to the rectifier; and a switching circuit coupled to disable at least a portion of the low frequency circuit while the multi-mode receiver operates in high frequency mode. In some embodiments, the multimode receiver further includes a high-voltage protection circuit coupled to the high frequency circuit that detunes the high frequency circuit when a high-voltage condition is detected.
Abstract: Low Latency Interconnect Integrated Event Handling has been disclosed. In one implementation a hardware based interrupt controller coupled with a hardware based event queue manager, dedicated hardware based queues, and processor instruction extensions allows for off-loading event processing from an operating system thereby dramatically lowering wasted processor cycles while speeding up event processing.