Abstract: A switch according to the invention comprises a enclosure that is solid insulated and includes an electric power source side bushing portion, an electric load side bushing portion, and an accommodation body portion having air filled therein; a main circuit switch installed, for each pole, and having a vacuum interrupter that switches an electric power circuit by receiving a switching driving force from a common actuator; and an earth switch installed including a first fixed contactor to be earthed; a second fixed contactor electrically connected to the electric power source side connection conductor; and a movable blade connected to the common actuator, and movable to a first position for contacting the first fixed contactor and to a second position for contacting the second fixed contactor, by the switching driving force from the common actuator.

Abstract: An apparatus for handling anomalies in a hardware system including a master device and at least one slave device coupled with the master device through an interconnect device is provided. The apparatus includes at least one controller operative to receive status information relating to the slave device. The status information is indicative of whether an anomaly is present in the slave device and/or the interconnect device. The controller is operative to generate output response information as a function of the status information relating to the slave device for detecting and/or responding to hardware system anomalies in a manner which reduces a need for resetting the hardware system to return to normal operation.

Abstract: A protocol bridge includes a cache for caching data from a plurality of data storage devices, and for servicing data requests from a plurality of initiators. Data is cached for every data access operation such that the most frequently accessed data remains replicated in the cache.

Abstract: A method for generating and communicating file system hints. The method may include receiving an I/O request from a file system layer and checking the I/O request for file system contextual information. The method may also include accessing the file system layer to determine attributes of the file system contextual information and receiving the attributes of the file system contextual information from the file system layer. The method may further include analyzing attributes of the file system contextual information and generating a hint based upon analyzing the attributes of the file system contextual information. The method may include a mechanism to provide weight-age of data passed from the application. The hint may be associated with the I/O request, and the hint may comprise hotness information to increase efficiency of data accessibility at a lower level storage tier. The method may include sending the hint to the lower level storage tier.

Abstract: A light control system including a light source and a light management unit (LMU) operative to receive a light output control signal and to control a light output emitted from the light source, wherein the LMU controls the light output from the light source based on the light output control signal.

Abstract: A memory device includes a memory array comprising a plurality of memory cells arranged in rows and columns, and sensing circuitry coupled to the memory array. The sensing circuitry comprises a plurality of output sense amplifiers configured to sense stored data associated with respective columns of the memory array, and sense amplifier control circuitry configured to generate a sense amplifier control signal for application to control inputs of respective ones of the output sense amplifiers. The sense amplifier control circuitry comprises reaction time tracking circuitry including at least one dummy sense amplifier configured to track reaction time of one or more of the output sense amplifiers, with the sense amplifier control signal being generated at least in part responsive to an output signal of the dummy sense amplifier.

Abstract: A multiport latch-based memory device includes a latch array, a plurality of first multiplexers, and a second multiplexer. The latch array is responsive to output data from an input data register in a functional mode associated with the latch-based memory device. The plurality of first multiplexers is responsive to output data from the latch array in the functional mode. The plurality of first multiplexers is responsive to output data from the input data register in a test mode associated with the latch-based memory device. The second multiplexer selectively provides output data from the plurality of first multiplexers to the input data register in the test mode, thereby providing a data path bypassing the latch array in the test mode. Embodiments of a corresponding method and computer-readable medium are also provided.

Abstract: A system and method for improving message passing between a computer and peripheral devices is disclosed. The system and method for improving message passing between a computer and peripheral devices incorporate data checking on the command/message data and each scatter gather list element. The method in accordance with the present disclosure enables a peripheral device to check the integrity of the message and ownership of the scatter gather list element before the data is processed.

Abstract: Described embodiments provide for scheduling packets for transmission by a network processor. A traffic manager generates a scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. A finite state machine (FSM) enqueues the received task in the associated queue. The queue has a corresponding scheduler level M, with a corresponding parent scheduler at each of M?1 levels in the scheduling hierarchy, where M is a positive integer less than or equal to N. Nodes at each of the N scheduling levels send messages only with one node at a relative next higher level and with one or more nodes at a relative next lower level. Each node in the scheduling hierarchy updates corresponding statistics and control indicators based on messages received from the node at the next higher level and the one or more nodes at the next lower level.

Abstract: An electronic device package includes first and second electrodes of a package substrate. The first electrode has fingers formed from a first metal level and is configured to operate at a first DC potential. The second electrode has fingers formed from the first metal level interdigitated with the fingers of the first electrode. A via conductively connects the second electrode to a second metal level. The second metal level is configured to operate at a second DC potential. The first and second DC potentials are thereby capacitively coupled through the interdigitated electrodes.

Abstract: Systems and methods of voltage based switching of a power supply system current are disclosed. In one embodiment, a power supply system includes a power bus to supply electrical power to a system load. A power supply is coupled to the power bus. The power supply provides current to the power bus and generates a voltage ?. In addition, the system includes an additional power supply coupled to the power bus. The additional power supply generates a voltage ? that is lower than the voltage ?. An oring module restricts the additional power supply from providing current to the power bus, until a power bus voltage ? is greater than a threshold voltage.

Abstract: Disclosed is a communication apparatus and method in a programmable logic controller (PLC). In a communication method, a micro processing unit (MPU) decides whether or not an interrupt signal is generated. When it is decided that the interrupt signal has been generated, the MPU communicates with an external programming and debugging tool (PADT).

Abstract: In described embodiments, a Serializer-Deserializer (SerDes) receiver includes a pattern detector that allows for detection of insufficiently randomized pattern periods and low activity periods. A freeze of equalization adaptation during these periods might occur by embedding disqualifying patterns into adaptation data. Some embodiments also allow for detection of long intervals of freeze, and so delay a freeze de-assertion in order for a clock and data recovery (CDR) circuit of the receiver to regain lock to the serial data. Embedding freeze information in the receive data allows for precise synchronization of receive data and freeze.

Abstract: A method of designing an integrated circuit, integrated circuits using different drive strengths and a signal integrity monitor are provide herein. In one embodiment, the signal integrity monitor includes: (1) a signal interface configured to receive a signal from a parallel data bus for transmission over a plurality of signal paths and (2) a victim signal identifier configured to dynamically determine a potential victim signal path of the plurality of signal paths.

Abstract: A system, method, and computer program product are provided for sending failure information from a solid state drive (SSD) to a host device. In operation, an error is detected during an operation associated with a solid state drive. Additionally, a command is received for failure information from a host device. Further, the failure information is sent from the solid state drive to the host device, the failure information including failure information associated with the solid state drive.

Abstract: In order to compensate for phase offset between different sets of circuitry having different synchronous clock domains, transmit (TX) circuitry of one domain is configured to transmit a pattern signal (e.g., a pseudo random bit sequence) to receive (RX) circuitry of the other domain. The RX circuitry cycles through a number of different phase-shifted RX clock signals to determine which selected clock signals result in valid RX pattern signals. The RX circuitry is then able to select one of the phase-shifted clock signals for use in normal processing of an RX data signal received from the TX circuitry.

Abstract: Disclosed are a positioning apparatus and a PLC system using the same. The positioning apparatus of the present invention generates, for every control period, a pulse signal for indicating the position of an object to be controlled, determines the current position of the object to be controlled using the pulse signal, and if the current position is a specific position, controls the object to be controlled in synchronization with the specific position.

Abstract: Systems and methods are described for the control of lighting systems at individual light-fixture, local, regional, and larger-geographical-area levels that also distribute electrical power to consumers. One implementation comprises a hierarchical lighting-control system including an automated network-control center that may control up to many millions of individual lighting fixtures and lighting elements, regional routers interconnected to the network-control center or network-control centers by public communications networks, each of which controls hundreds to thousands of individual light fixtures, and light-management units, interconnected to regional routers by radio-frequency communications and/or power-line communications, each of which controls components within a lighting fixture, including lighting elements, drivers, sensors, and other devices. Systems and methods of using synthetic events for calibration and control of lighting systems are also described.

Abstract: Irrigation control systems and method of operating an irrigation system are described for irrigation systems including one or more orifices, e.g., sprinkler heads, arranged in one or more irrigation lines. The control system can include one or more sensors such as moisture meters and flow meters that measure water output associate with the irrigation system. The irrigation control system can be linked to one or more networks for access, e.g., through the Internet. The control systems and methods can utilize moisture calibration to avoid or reduce a need for continuous use of moisture sensors.

Abstract: An adaptive voltage scaling system includes first and second devices. Each of the first and second devices includes at least one master serial interface port and at least one slave serial interface port. The first device is operatively coupled to a voltage regulator, and the slave serial interface port associated with the second device is operatively coupled to the master serial interface port associated with the first device. The first device controls the voltage regulator based on information obtained from the first and second devices using the master serial interface port associated with the first device and the slave serial interface port associated with the second device. The first and second devices receive voltage from the voltage regulator. A corresponding method and computer-readable medium are also disclosed.