Abstract: Methods and systems for capturing error information regarding a Serial Advanced Technology Attachment (SATA). An initiator device is enhanced in accordance with features and aspects hereof to detect an error condition in operation of the system and to transmit error information to the SATA target device during a soft reset condition applied to the SATA target device. The SATA target device discards all such frames received during the soft reset condition until the initiator device clears the soft reset condition. The error information may be captured for further analysis and debug of the error condition by suitable error analyzer equipment such as a SATA bus analyzer. The initiator device may be a SATA initiator or a Serial Attached SCSI (SAS) initiator using the SATA Tunneling Protocol (STP). Features and aspects hereof may also include a SAS/SATA bridge device coupling a SAS initiator to the SATA target device.

Abstract: A method for reducing memory utilization in a digital video codec. The method generally includes the steps of (A) generating a second reference picture by downsampling a first reference picture using a pattern, wherein the pattern (i) comprises a two-dimensional grid and (ii) is unachievable by performing a vertical downsampling and separately performing a horizontal downsampling, (B) generating a third reference picture by upsampling the second reference picture and (C) processing an image in a video signal using the third reference picture.

Abstract: Various embodiments of the present invention provide systems and methods for signal equalization, and in some cases analog to digital conversion. For example, an analog to digital converter is disclosed that includes a comparator bank that receives a reference indicator and is operable to provide a decision output based at least in part on a comparison of an analog input with a reference threshold corresponding to the reference indicator. A range selection filter is included that has a first adjustment calculation circuit and a second adjustment calculation circuit. The first adjustment calculation circuit is operable to calculate a first adjustment feedback value based at least in part on a speculation that the decision output is a first logic level, and the second adjustment calculation circuit is operable to calculate a second adjustment feedback value based at least in part on a speculation that the decision output is a second logic level.

Abstract: A method for adaptive selection of floating taps in a decision feedback equalizer including the steps of (A) determining values for a predefined metric for tap positions within a range covered by a decision feedback equalizer (DFE) and (B) setting one or more floating taps of the DFE to tap positions based upon the values of the predefined metric.

Abstract: The present invention provides methods and apparatus for accomplishing optical direct write phase shift lithography. A lithography system and method are provided wherein a mirror array is configured to generate vortex phase shift optical patterns that are directed onto a photosensitive layer of a substrate. The lithography methods and systems facilitate pattern transfer using such vortex phase shift exposure patterns.

Abstract: Methods and apparatus for expanded capacity virtual volumes in a virtualized storage system. A storage controller of the storage system parses a SCSI command block as it is received to generate a tag value indicating a segment of a virtual volume to which the command block is directed. The tag value is used to select one of a plurality of mapping segment objects stored in a memory of the controller. Each mapping segment objects maps logical block addresses of a corresponding segment of a corresponding virtual volume to physical storage addresses on the physical storage devices that comprise the virtual volume. An I/O processing circuit of the controller then processes the SCSI command block in accordance with the mapping information in the selected mapping segment object. In one exemplary embodiment, each segment of a virtual volume comprises 2 terabytes of storage capacity of the virtual volume.

Abstract: A self-test module for use in an electronic device includes a test controller and a memory. The memory is configured to receive test vectors from the test controller. A comparator is configured to receive the test data from the memory via an output data path. A strobing buffer is located in the output data path between an output from the memory and an input to the comparator. The strobing buffer is configured to selectively enable the test vectors to propagate from the memory output to the comparator input.

Abstract: Apparatus and methods for real-time routing of received frames in a split-path architecture storage controller. In one exemplary embodiment, a split-path storage controller comprises a soft-path I/O processor for processing of any received frames and comprises a fast-path I/O processor for efficient processing of common read and write command. A content parsing circuit of the storage controller parses each frame substantially concurrent with reception of the frame and selects an I/O processor for processing of an initial frame and subsequent related frames. Received frames are then routed concurrently as they are received for processing by the selected I/O processor of the multiple I/O processors of the split-path storage controller.

Abstract: Apparatus and methods for improved efficiency in accessing meta-data in a storage controller of a virtualized storage system. Features and aspects hereof walk/retrieve meta-data for one or more other I/O requests when retrieving meta-data for a first I/O request. The meta-data may include mapping information for mapping logical addresses of the virtual volume. Meta-data may also include meta-data associated with higher level, enhanced data services provide by or in conjunction with the storage system. Enhanced data services may include features for synchronous mirroring of a volume and/or management of time-based snapshots of the content of a virtual volume.

Abstract: Apparatus and methods for an enhanced bridge device for coupling multiple non-Fiber Channel storage devices to a Fiber Channel Arbitrated Loop (FC-AL) communication medium. Features and aspects hereof provide for FC-AL enhanced circuits for processing loop port bypass (LPB) and loop port enable (LPE) primitive sequences addressed to any target arbitrated loop physical address (T-ALPA) associated with a storage device coupled with the bridge regardless of the present bypassed/non-bypassed status of other T-ALPAs processed by the bridge device and associated with other storage devices coupled with the bridge device.

Abstract: A D flip-flop (DFF), a method of operating a DFF, a latch and a library of standard logic elements including standard logic elements corresponding to a DFF and a latch. In one embodiment, the DFF has a data input and a data output and includes: (1) a master stage passgate coupled to the data input, (2) a master stage coupled to the master stage passgate and having a hysteresis inverter with feedback transistors of opposite conductivity, (3) a slave stage passgate coupled to the master stage and (4) a slave stage coupled between the slave stage passgate and the data output and having a hysteresis inverter with feedback transistors of opposite conductivity.

Abstract: Method and structures provide for testing a SAS link during speed negotiation windows to determine success/failure in using a negotiated speed at one or more configured sets of speed options. For each device linked to a master SAS device, each possible set of speed options is configured; the device participates in a speed negotiation window operation with the current speed options configured. One or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred speed for communication between the master device and that attached device. The speed options to be varied and tested may include: link speed; spread spectrum clocking for each SAS speed; type of supported spread spectrum clocking; and logical link rate in support of multiplexing.

Abstract: An integrated circuit includes a number of probe pads arranged in a staggered manner in a core region of the integrated circuit and a number of bond pads in an Input/Output (I/O) region surrounding the core region. The core region includes logic circuitry therein, and the I/O region is configured to enable the core region to communicate with one or more external circuit(s) through the number of bond pads. The integrated circuit also includes a die metal interconnect separating a bond pad area in the I/O region from a probe pad area in the core region. A dimension of the die metal interconnect and/or a position of the die metal interconnect between the probe pad area and the bond pad area is variable.

Abstract: Abstract An instrument for cutting tissue to controlled dimensions for removal of tissue specimens from remote sites in the body of a patient. The instrument has a housing and a substantially flexible shaft extending from the housing to a distal end. Suction can be municated along the shaft to the distal end for distribution across a cavity utilizing a nifold to pull tissue into the cavity against a tissue engaging of the manifold. One or more needles are extendable into the cavity to enable infusion of fluid into the tissue. A blade in the distal end is extendable over the manifold to cui the tissue held by suction in the cavity. The shape and depth of the tissue removed by the cut is in accordance with the contour of the tissue engaging surface and the size and shape of the cavity at the distal end.

Abstract: An optical device includes a substrate and a semiconductor layer located over the substrate. The optical path includes a semiconductor layer that further includes a waveguide core region. The core region includes a first semiconductor region with a morphology of a first type and a first refractive index. The first semiconductor region is located adjacent a second semiconductor region that has a morphology of a second type and a second refractive index that is different from the first refractive index.

Abstract: The present invention is a system and method which allows for a VTL system that supports thin provisioning to implicitly unmap unused storage. Such unmap operations may occur even though the VTL system does not receive any explicit unmap requests from its initiators. For example, if a system administrator knows that once a virtual tape drive of the VTL system has been partially overwritten, all previously written data sets on that virtual tape drive will never again be accessed, the system administrator may configure the VTL system so that it unmaps the entire remainder of the virtual tape drive on the first data overwrite.

Abstract: An electronic device includes a substrate with a resistive element located thereover. The resistive element includes a semiconductor region. A read module is configured to determine a resistance of the resistive element. A programming module is configured to cause a current to flow through the semiconductor region. The current is sufficient to induce a change of morphology of at least a portion of the semiconductor region.

Abstract: A method of configuring a storage device is disclosed. The method generally includes the steps of (A) receiving a single data unit over a communication network, the data unit (i) being transferred via the communication network using a standard communication protocol, (ii) defining both (a) a plurality of new configuration items that define a new configuration of the storage device and (b) a command to be performed by the storage device and (iii) having a standard markup language format, (B) calculating at least one configuration change from a plurality of current configuration items to the new configuration items, the current configuration items defining a current configuration of the storage device, (C) adjusting the storage device into the new configuration based on the at least one configuration change and (D) performing a requested operation with the storage device in the new configuration in response to the command.

Abstract: A sample and hold circuit is disclosed that provides longer hold times. An analog multiplexer circuit is also disclosed that exhibits low switch leakage. The analog multiplexer circuit comprises a shared node, a plurality of input circuits, a control input for selecting one or more of the plurality of input circuits, and an amplifier coupled to the shared node. Each input circuit comprises an input node, a primary input switch for selectively coupling an input to the input node, and a secondary input switch for selectively coupling the input node to the shared node, wherein the secondary input switch comprises one or more transistor switches. The parasitic drain and source diodes of one or more transistor switches in secondary input switch in a selected input circuit are coupled to a voltage that is distinct from an input signal of the selected input circuit.

Abstract: An apparatus comprising a logically contiguous group of at least three drives, a first loop, a second loop, and a compression/decompression circuit. Each of the drives comprises (i) a first region configured to store compressed data of a previous drive, (ii) a second region configured to store uncompressed data of the drive, (iii) a third region configured to store compressed data of a next drive. The first loop may be connected to the next drive in the logically contiguous group. The second loop may be connected to the previous drive of the logically contiguous group. The compression/decompression circuit may be configured to compress and decompress the data stored on each of the drives.