Abstract: A method of evaluating the feasibility of a CoreSight trace architecture in a SoC before the hardware and/or firmware is available allowing for better die size estimates (IO count and gate count) and package requirement for the design in the early stages of planning.

Abstract: A method for storing data, comprising the steps of (A) receiving a stream of data, (B) storing the stream of data in a series of data clusters each comprising (i) a predecessor link, (ii) a data portion, and (iii) a successor link, where the predecessor links and successor links are configured to minimize seek time between the clusters during contiguous stream operations.

Abstract: Various embodiments of the present invention provide data processing circuits that include a multiplexer, a memory buffer, a data processing circuit, and a channel setting modification circuit. A first input of the multiplexer receives an input data set and a second input of the multiplexer receives a buffered data set. The multiplexer provides either the input data set or the buffered data set as a multiplexer output based upon a select signal. The memory buffer receives the multiplexer output and provides the buffered data set. Operation of the data processing circuit is at least in part governed by channel settings. The data processing circuit receives the multiplexer output and performs a data detection process. The select signal is asserted to select the buffered data set when the data detection process fails, and is asserted to select the input data set when the data detection process succeeds.

Abstract: A method for coefficient bitdepth limitation in an encoder and/or bitstream generation apparatus including the steps of (A) generating one or more residual block coefficients in response to a video signal and one or more coding parameters and (B) manipulating the one or more coding parameters such that the one or more residual block coefficients are prevented from having values greater than a bitdepth of the video signal plus a predefined number of bits.

Abstract: A fault tolerant driver circuit includes a data output driver that receives an enable input and that includes a transistor formed on an isolation well. A well bias circuit provides a first well bias to the isolation well. The well bias circuit includes voltage-controlled impedances that are controlled by a voltage of the data output line, the enable input and a supply voltage. The voltage-controlled impedances connect the first well bias alternatively to: a common conductor through a first impedance when the supply voltage is ON and the enable input is ON; and a second impedance when the supply voltage is on and enable is OFF.

Abstract: In a communications system that demultiplexes user data words into multiple sub-words for encoding and decoding within different subword-processing paths, the minimum distance between bit errors in an extrinsic codeword can be increased by having corresponding subword encoders/decoders in the different subword-processing paths perform subword encoding/decoding with different encoder/decoder matrices.

Abstract: A surgical suturing instrument has a needle which traverses at tissue receiving gap and picks up suture distal to the gap. This invention provides an automated mechanism enabling the suture to be removed from the needle after the needle is retracted proximal to the tissue gap. This mechanism provides enhanced device reloading and other potential uses.

Abstract: In a communications system that demultiplexes user data words into multiple sub-words for encoding and decoding within different subword-processing paths, the minimum distance between bit errors in an extrinsic codeword can be increased by having corresponding interleavers/deinterleavers in the different subword-processing paths use different interleaving/deinterleaving algorithms.

Abstract: An ESD protection circuit for protecting a host circuit coupled to a signal pad from an ESD event occurring at the signal pad includes at least one MEMS switch which is electrically connected to the signal pad. The MEMS switch includes a first contact structure adapted for connection to the signal pad, and a second contact structure adapted for connection to a voltage supply source. The first and second contact structures are coupled together during the ESD event for shunting an ESD current from the signal pad to the voltage supply source. The first and second contact structures are electrically isolated from one another in the absence of the ESD event. At least one of the first and second contact structures includes a passivation layer for reducing contact adhesion between the first and second contact structures.

Abstract: Apparatus and methods are provided for recovering from mismatching configuration data in a clustered environment having a plurality of storage devices coupled to a plurality of storage controllers. If a clustered environment has a first storage device of the plurality of storage devices that has first configuration data that does not match second configuration data of a second storage device of the plurality of storage devices, then the mismatch may be resolved through operation of the clustered environment rather than through operator intervention. Comparison of relevant attributes of the first and second configuration data determines whether a relevant difference between the first and second configuration data is a physical status of at least one of the plurality of storage devices.

Abstract: A system and circuit for virtual power grid is disclosed. In one embodiment, a switch system for a virtual power grid includes a first transistor for connecting a power supply to a node of a virtual power grid for an isolated region of circuitry via the first transistor upon a receipt of a first control signal to turn on the first transistor. The switch system further includes a second transistor for connecting the power supply to the isolated region of circuitry via the second transistor upon a receipt of a second control signal to turn on the second transistor. In addition, the switch system includes a self-timed enable module for generating and forwarding the second control signal when a voltage level at the node of the virtual power grid which is charged by the power supply via the first transistor reaches a threshold voltage.

Abstract: A method and apparatus are provided for storing a value in a process register of an electrical circuit, which indicates a strength of a process in which the circuit was fabricated, and adjusting an input delay applied to data signals received by a synchronous storage element of the electrical circuit based on the stored value.

Abstract: Hierarchical storage management (HSM) for redundant array of independent disks (RAID) which comprise a plurality of drive trays of different types is disclosed. In one embodiment, a method for hierarchically managing RAID which includes a plurality of drive trays of different types, includes writing data to a tray of a first type, periodically monitoring a use of the data, and moving the data to a tray of a second type if the use of the data yields less than a threshold value. Each one of the tray of the first type and the tray of the second type includes at least one hard drive, and a composite score of price, capacity, performance, and function of the tray of the first type which is higher than a corresponding composite score of the tray of the second type.

Abstract: A method to validate data used in a design of a semiconductor product currently in a partially fabricated state is disclosed. The partially fabricated state having a plurality of layers up to and including a first conductive layer. The method generally includes the steps of (A) adding a second conductive layer from a user specification to an application set, the application set having a plurality of resources that define the semiconductor product, (B) validating a new resource in the user specification against the resources in the application set, (C) adding the new resource to the application set upon passing the validating and (D) propagating the new resource throughout a description of the semiconductor product, the description being stored in a computer-readable medium.

Abstract: An apparatus including a transformation circuit and a scaling/quantization circuit. The transformation circuit may be configured to generate one or more transform coefficients in response to a video stream and one or more first control signals. The transformation circuit may be further configured to limit transform coefficients for residual 4×4 blocks to a 16-bit value when the video stream comprises 8-bit video data. The scaling/quantization circuit may be configured to generate one or more quantization coefficients in response to the one or more transform coefficients and one or more second control signals.

Abstract: A method for back-off retry with priority routing in a single, cohesive SAS expander includes routing a data transfer between an input of a single, cohesive SAS expander and an output of the single, cohesive SAS expander, wherein the single, cohesive expander includes a first SAS expander, and at least one additional SAS expander via at least one inter-expander link (IEL). The routing of data may further include routing a first OPEN request on a direct path through the first SAS expander to a port of a device and routing a second OPEN request on an alternate path from the first SAS expander and through a second SAS expander to the port of the device. The method further includes determining link availability between the second SAS expander and the port of the device, and, upon determination of a failed link or a busy link, re-routing the data transfer from the second SAS expander to the first SAS expander or a third SAS expander, or retrying the data transfer through the second SAS expander.

Abstract: A reflector assembly for a lighting apparatus, the reflector assembly comprising two or more reflector modules configured for associating with one or more light sources, each reflector module comprising one or more reflectors for being located adjacent to a light source when the reflector module is associated with the one or more light sources, the one or more reflectors configured to reflect light from the adjacent light source. The reflector modules may further comprising a cover plate defining a plurality of light source apertures for allowing a light source to protrude through the cover plate, at least a first of the one or more light source apertures disposed adjacent to an overhead reflector and at least a second of the one or more light source apertures disposed adjacent to a lateral reflector.

Abstract: A method and apparatus demodulate pre-formatted information embedded in an optical recording medium. The demodulation includes (a) receiving a wobble signal representing data symbols frequency-modulated on a carrier frequency, (b) generating a phase delta signal representing a phase difference between the wobble signal and a corresponding locked signal having the carrier frequency, (c) first sampling the phase delta signal at a data sampling interval to produce first values, (d) second sampling the phase delta signal at each halfway of the data sampling interval to generate second values, (e) determining, based on a difference between two successive second values, if the first sampling is performed at timing corresponding to an end of each data symbol, and (e) adjusting sampling timing of the first sampling towards the timing corresponding to each end of the data symbols, if the sampling timing does not corresponds to the end of each data symbol.

Abstract: The present invention is a self-calibrating, dual-band, wide range LC tank Voltage Controlled Oscillator (VCO) system. The system may include a first Voltage-Controlled Oscillator (VCO) and a second Voltage-Controlled Oscillator (VCO). The system may further include a calibration engine. The calibration engine may be configured for being connectable to at least one of the first VCO or the second VCO. The calibration engine may further be configured for automatically establishing/providing a VCO fix capacitor band code setting and a gear control setting for selectively activating or inactivating the first VCO and/or the second VCO. The calibration engine may be further configured for automatically comparing a VCO control voltage of the system to an allowable control voltage range for the system and may be further configured for automatically adjusting the VCO fix capacitor band code setting and/or the gear control setting when the VCO control voltage falls outside of the allowable control voltage range.

Abstract: Apparatus and methods for improved high-speed communication by exchanging low-speed information regarding the high-speed exchanges over the same communication medium. In one exemplary embodiment, a communication device includes a high-speed transceiver adapted to exchange high-speed data with another device via a communication medium using high-frequency signals. The device also includes a low-speed component adapted to exchange low-speed information over the same communication medium as low-frequency signals. The low-frequency signals may be applied as common mode signals to a differential communication path so as to not interfere with the high-speed data exchanges. In another embodiment, a high-pass filter may be included in the device to remove the low-frequency signals before the high-speed data is applied to the high-speed transceiver. Responsive to receipt of the low-speed information, a device may adjust parameters of the transceiver to improve the high-speed data exchanges.