Abstract: Disclosed herein is a device comprising a pair of bellows pumps configured for efficient mixing at a microfluidic scale. By moving a fluid sample and particles in suspension through an aperture between the paired bellows pump mixing chambers, molecular collisions leading to binding between the particles and ligands in the sample are enhanced. Such devices provide an alternative for mixing that does not use a vent and can be used with a variety of particles in suspension such as magnetic beads to capture or purify useful cells and molecules.
Type:
Application
Filed:
May 2, 2011
Publication date:
March 15, 2012
Applicant:
Micronics, Inc.
Inventors:
John Clemmens, C. Frederick Battrell, John Gerdes, Denise Maxine Hoekstra
Abstract: The present invention relates to microfluidic devices and methods for manipulating and analyzing fluid samples. The disclosed microfluidic devices utilize a plurality of microfluidic channels, inlets, valves, filter, pumps, liquid barriers and other elements arranged in various configurations to manipulate the flow of a fluid sample in order to prepare such sample for analysis.
Type:
Application
Filed:
September 2, 2011
Publication date:
March 15, 2012
Applicant:
Micronics, Inc.
Inventors:
Patrick Saltsman, Mingchao Shen, Jeffrey M. Houkal, Christy A. Lancaster, C. Frederick Battrell, Bernhard H. Weigl
Abstract: In a method for generating a pattern on a workpiece having at least one die placed thereon, positions of the at least one die and at least two global alignment marks on the workpiece are measured, pattern adjustment data is generated, pattern image data associated with the pattern to be written is adjusted based on the generated pattern adjustment data, and the pattern is generated on the workpiece based on the modified pattern adjustment data.
Abstract: The present invention relates to customizing individual workpieces, such as chip, flat panels or other electronic devices produced on substrates, by direct writing a custom pattern. Customization can be per device, per substrate, per batch or at some other small volume that makes it impractical to use a custom mask or mask set. In particular, it relates to customizing a latent image formed in a radiation sensitive layer over a substrate, merging standard and custom pattern data to form a custom pattern used to produce the customized latent image. A wide variety of substrates can benefit from the technology disclosed.
Abstract: A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each semiconductor chip is provided. The present invention relates to a semiconductor chip module in which a plurality of semiconductor chips, each provided on the side face thereof with a part of a connection terminal coupled with a circuit pattern formed on the front face, have been stacked and bonded. Connection terminal portions on the side faces of the respective semiconductor chips are interconnected by a wiring pattern. The connection terminal on the semiconductor chip is led from the front face to the side face and formed by applying spraying of a conductive material in a mist state.
Abstract: Devices and methods for manufacturing displays, solar panels and other devices using larger size workpieces are provided. The workpiece is rolled into a cylinder, thereby reducing the physical size by a factor of 3 in one dimension. The stages on which the workpieces are rolled have a cylindrical shape, which allows a more robust and/or compact movement of the glass, reduced machine weight. The workpieces are relatively thin, more flexible, and are rolled onto a cylinder with a diameter of about 1 meter.
Type:
Grant
Filed:
February 28, 2007
Date of Patent:
February 28, 2012
Assignee:
Micronic Mydata AB
Inventors:
Lars Stiblert, Torbjörn Sandström, Jarek Luberek, Tomas Lock
Abstract: A method for manufacturing a probe card uses a probe having first and second metal layers made of a material in which wettability of a conductive jointing material to the metal layers is higher than wettability of the jointing material to an attaching portion on an outer circumferential surface of an upper area of the attaching portion and at two opposed surface areas of an area continuing downward from the upper area of the attaching portion, respectively, and having a jointing material layer at the upper area and the two surface areas to cover the first and second metal layers. Each probe is attached to a probe substrate at the attaching portion by melting and thereafter solidifying a material for the jointing material layer in a state where the attaching portion is inserted in a through hole of the probe substrate.
Abstract: A method for manufacturing a probe card includes inserting an attaching portion of each probe into one of first through holes provided on a probe substrate at least in a row, inserting a probe tip portion of each probe into second through holes respectively provided on a plurality of plate-like positioning members piled in their thickness directions at least in a row, relatively displacing the adjacent positioning members in opposite directions to two-dimensionally position the probe tip portions of the probes, and thereafter softening a conductive jointing material to position the attaching portions of the respective probes against the first through holes.
Abstract: Microfluidic methods and devices for heterogeneous binding and agglutination assays are disclosed, with improvements relating to mixing and to reagent and sample manipulation in systems designed for safe handling of clinical test samples.
Type:
Grant
Filed:
December 22, 2008
Date of Patent:
February 7, 2012
Assignee:
Micronics, Inc.
Inventors:
C Frederick Battrell, John Gerdes, Stephen Mordue, Jason Capodanno, Denise Maxine Hoekstra, John R Williford, John Clemmens
Abstract: A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each semiconductor chip is provided. The present invention relates to a semiconductor chip module in which a plurality of semiconductor chips, each provided on the side face thereof with a part of a connection terminal coupled with a circuit pattern formed on the front face, have been stacked and bonded. Connection terminal portions on the side faces of the respective semiconductor chips are interconnected by a wiring pattern. The connection terminal on the semiconductor chip is led from the front face to the side face and formed by applying spraying of a conductive material in a mist state.
Abstract: Patterns are written on workpieces, such as, glass sheets and/or plastic sheets used in, for example, electronic display devices such as LCDs. The workpiece may be larger than about 1500 mm may be used. An optical writing head with a plurality of writing units may be used. The workpiece and the writing head may be moved relative to one another to provide oblique writing.
Abstract: An electrical connecting apparatus 10 comprises: a base plate 16 provided on its underside 14 with a plurality of pedestals 12 at intervals in a front-back direction; and multiple contact groups, each of which has a first contact 18 and a second contact 19. Each first contact 18 includes a needle body portion 24 having a rear end portion 20 supported on the pedestal 12 and a front end portion 22 which is a free end and extending leftward. Each second contact 19 includes a needle body portion 25 having a rear end portion 21 supported on the pedestal 12 and a front end portion 23 which is a free end and extending rightward. When the first contact 18 is broken, the second contacts 19 can be used.
Abstract: An apparatus includes a set of atomizers, a housing and a separator. Each atomizer includes an inlet portion that receives an inlet flow of a solution and an outlet portion that produces an atomized flow of the solution. The housing defines a flow path. Each atomizer is disposed at least partially within the housing such that the outlet portion of each atomizer is in fluid communication with the flow path. The housing is configured such that a gas flowing within the flow path can be sequentially mixed with the atomized flow of the solution produced by the outlet portion of each atomizer to produce a mixture of the gas and the solution. The separator produces a first outlet flow including a portion of the gas and a vaporized portion of a solvent, and a second outlet flow including a liquid portion of the solvent and a solute.
Abstract: The present invention relates to a method for determining the coordinates of an arbitrarily shaped pattern in a deflector system. The method basically comprises the steps of: moving the pattern in a first direction (X), calculating the position of the edge of the pattern by counting the number of micro sweeps, performed in a perpendicular direction (Y), until the edge is detected, and determining the coordinates by relating the number of counted micro sweeps to the speed of the movement of the pattern. The invention also relates to software implementing the method.
Abstract: The invention relates to methods to improve SLMs, in particular to reflecting micromechanical SLMs, for applications with simple system architecture, high precision, high power handling capability, high throughput, and/or high optical processing capability. Applications include optical data processing, image projection, lithography, image enhancement, holography, optical metrology, coherence and wavefront control, and adaptive optics. A particular aspect of the invention is the achromatization of diffractive SLMs so they can be used with multiple wavelengths sequentially, simultaneously or as a result of spectral broadening in very short pulses.
Abstract: The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a photoresist, photosensitive polymide, or similar. Such patterns may be written either to be used directly as optical, mechanical, fluidic, etc. components, e.g. diffusors, non-reflecting surfaces, Fresnel lenses and Fresnel prisms, computer-generated holograms, lenslet arrays, etc, or to be used as masters for the fabrication of such components by replication. Replication can be done by molding, pressing, embossing, electroplating, etching, as known in the art. This disclosure includes descriptions of using passive absorbing components in thin resist, using high gamma thick resists with high resolution pattern generators, using multiple focal planes including at least one focal plane in the bottom half of the resist, and iterative simulation of patterning and adjustment of an exposure map.
Type:
Grant
Filed:
October 22, 2009
Date of Patent:
November 29, 2011
Assignee:
Micronic MyData AB
Inventors:
Torbjörn Sandström, Mikael Wahlsten, Mats Ekberg, Anders Svensson
Abstract: The present invention makes repair easy and reduces effects on the electrical connection conditions of an electronic component to an internal wiring after repair and on the mechanical strength of the repair part in a case of breakage or separation of an electrode for implementation of the electronic component. In a multilayer wiring board, a plurality of wiring sheets each having an internal wiring and a plurality of electrical insulating sheets are arranged alternately in the thickness directions of these sheets, and a plurality of electrodes for implementing an electronic component electrically connected to the internal wirings are formed on the surface of an uppermost sheet. The multilayer wiring board further comprises a plurality of spare electrodes corresponding to the electrodes and electrically connected to the internal wirings connected to the corresponding electrodes directly under the corresponding electrodes on a sheet located directly under the uppermost sheet.
Abstract: A contact for an electrical test comprises a first area to be bonded to a board, a second area extending in the right-left direction from the lower end portion of the first area, a third area projecting downward from the tip end portion of the second area, and a low light reflective film having lower light reflectance than that of the first area. The third area has a probe tip to be contacted an electrode of an electronic device. The low light reflective film is formed on a surface of at least the bonding part of the first area to the board and its proximity.
Abstract: The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a photoresist, photosensitive polymide, or similar. Such patterns may be written either to be used directly as optical, mechanical, fluidic, etc. components, e.g. diffusors, non-reflecting surfaces, Fresnel lenses and Fresnel prisms, computer-generated holograms, lenslet arrays, etc, or to be used as masters for the fabrication of such components by replication. Replication can be done by molding, pressing, embossing, electroplating, etching, as known in the art. This disclosure includes descriptions of using passive absorbing components in thin resist, using high gamma thick resists with high resolution pattern generators, using multiple focal planes including at least one focal plane in the bottom half of the resist, and iterative simulation of patterning and adjustment of an exposure map.
Type:
Grant
Filed:
October 22, 2009
Date of Patent:
November 15, 2011
Assignee:
Micronic MyData AB
Inventors:
Torbjörn Sandström, Mikael Wahlsten, Mats Ekberg, Anders Svensson
Abstract: A method for patterning a second layer of a work piece in a direct write machine in the manufacturing of a multilayer system-in-package stack. The work piece having a first layer with a plurality of electrical components in the form of dies arbitrarily placed. Each component having connection points where some need to be connected between the components. A first pattern wherein different zones comprising connection points of dies distributed in the first layer are associated with different requirements on alignment. The method comprising the steps of: a. Detecting sacred zones in first pattern that have a high requirement on alignment to selected features of the system-in-package stack or to the placed components; b. Detecting stretch zones of the first pattern that are allowed to have a lower requirement on alignment to other features of the system-in-package stack; c.