Patents Assigned to Micronics
  • Patent number: 7710634
    Abstract: The present invention relates to an apparatus for creating a pattern on a workpiece sensitive to radiation, such as a photomask a display panel or a microoptical device. The apparatus may include a source for emitting light flashes, a spatial modulator having modulating elements (pixels), adapted to being illuminated by the radiation, and a projection system creating an image of the modulator on the workpiece. It may further include an electronic data processing and delivery system receiving a digital description of the pattern to be written, converting the pattern to modulator signals, and feeding the signals to the modulator. An electronic control system may be provided to control a trigger signal to compensate for flash-to-flash time jitter in the light source.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: May 4, 2010
    Assignee: Micronic Laser Systems AB
    Inventor: Torbjorn Sandstrom
  • Patent number: 7709165
    Abstract: An aspect of the present invention includes a method for patterning a workpiece covered at least partly with a layer sensitive to electromagnetic radiation by using a plurality of exposure beams having a predetermined separation in at least a first direction for exposing a pattern onto said workpiece, where said predetermined separation is fixed to an initial system pitch in said first direction, comprising the actions of: scaling a pattern pitch in said first direction to be an integer multiple of said system pitch, adjusting the initial system pitch in said first direction to be an adjusted system pitch to maintain a scale of said pattern, adjusting said predetermined separation of exposure beams to said adjusted system pitch.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: May 4, 2010
    Assignee: Micronic Laser Systems AB
    Inventor: Peter Ekberg
  • Publication number: 20100105224
    Abstract: An electrical connecting device includes a supporting substrate, a plate spring arranged on the supporting substrate, an assembling device for assembling the plate spring to the supporting substrate, a block having a mounting surface facing down, and a flexible circuit board whereupon a plurality of contacts are formed. The block has the mounting surface which protrudes downward from the supporting substrate, for mounting the circuit board. The plate spring is applied with an initial load to be in a status where at least a center region whereupon the block is mounted is urged upward. Thus, excellent electric contact status can be obtained without increasing an over drive quantity.
    Type: Application
    Filed: August 6, 2007
    Publication date: April 29, 2010
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Hisao Narita, Nobuyuki Yamaguchi
  • Patent number: 7705963
    Abstract: A pattern generator may include an electromagnetic radiation source and an optical system. The electromagnetic radiation source may emit electromagnetic radiation to create a pattern on a workpiece. The optical system may include an optical path for the electromagnetic radiation emitted from the electromagnetic radiation source and may be configured such that an apodization of the electromagnetic radiation is sufficient to optimize a critical dimension linearity for the created pattern.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: April 27, 2010
    Assignee: Micronic Laser Systems AB
    Inventors: Torbjorn Sandstrom, Igor Ivonin
  • Patent number: 7705965
    Abstract: The present disclosure relates to formation of latent images in a radiation sensitive layer applied to a substrate that is transparent to or transmissive of radiation at the exposing wavelength. In particular, it relates to so-called backside lithography, in which the final lens of an exposing system is positioned to project electromagnetic radiation through a first side of the transparent substrate and expose a radiation sensitive layer that overlays a second side of the transparent substrate that is opposite the first side. Five alternative embodiments for further treatment to form a radiation opaque layer corresponding to the latent image (the image or its inverse) are described. These methods and corresponding devices are useful for producing masks (sometimes called reticles), for producing latent images in semiconductor devices and for forming features of semiconductor devices using masks.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: April 27, 2010
    Assignee: Micronic Laser Systems AB
    Inventors: Per-Erik Gustafsson, Ulric Ljungblad
  • Publication number: 20100099051
    Abstract: The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a photoresist, photosensitive polymide, or similar. Such patterns may be written either to be used directly as optical, mechanical, fluidic, etc. components, e.g. diffusors, non-reflecting surfaces, Fresnel lenses and Fresnel prisms, computer-generated holograms, lenslet arrays, etc, or to be used as masters for the fabrication of such components by replication. Replication can be done by molding, pressing, embossing, electroplating, etching, as known in the art. This disclosure includes descriptions of using passive absorbing components in thin resist, using high gamma thick resists with high resolution pattern generators, using multiple focal planes including at least one focal plane in the bottom half of the resist, and iterative simulation of patterning and adjustment of an exposure map.
    Type: Application
    Filed: October 22, 2009
    Publication date: April 22, 2010
    Applicant: Micronic Laser Systems AB
    Inventors: Torbjörn Sandström, Mikael Wahlsten, Mats Ekberg, Anders Svensson
  • Publication number: 20100099035
    Abstract: The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a photoresist, photosensitive polymide, or similar. Such patterns may be written either to be used directly as optical, mechanical, fluidic, etc. components, e.g. diffusors, non-reflecting surfaces, Fresnel lenses and Fresnel prisms, computer-generated holograms, lenslet arrays, etc, or to be used as masters for the fabrication of such components by replication. Replication can be done by molding, pressing, embossing, electroplating, etching, as known in the art. This disclosure includes descriptions of using passive absorbing components in thin resist, using high gamma thick resists with high resolution pattern generators, using multiple focal planes including at least one focal plane in the bottom half of the resist, and iterative simulation of patterning and adjustment of an exposure map.
    Type: Application
    Filed: October 22, 2009
    Publication date: April 22, 2010
    Applicant: Micronic Laser Systems AB
    Inventors: Torbjörn Sandström, Mikael Wahlsten, Mats Ekberg, Anders Svensson
  • Publication number: 20100099034
    Abstract: The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a photoresist, photosensitive polymide, or similar. Such patterns may be written either to be used directly as optical, mechanical, fluidic, etc. components, e.g. diffusors, non-reflecting surfaces, Fresnel lenses and Fresnel prisms, computer-generated holograms, lenslet arrays, etc, or to be used as masters for the fabrication of such components by replication. Replication can be done by molding, pressing, embossing, electroplating, etching, as known in the art. This disclosure includes descriptions of using passive absorbing components in thin resist, using high gamma thick resists with high resolution pattern generators, using multiple focal planes including at least one focal plane in the bottom half of the resist, and iterative simulation of patterning and adjustment of an exposure map.
    Type: Application
    Filed: October 22, 2009
    Publication date: April 22, 2010
    Applicant: Micronic Laser Systems AB
    Inventors: Torbjörn Sandström, Mikael Wahlsten, Mats Ekberg, Anders Svensson
  • Publication number: 20100099277
    Abstract: An embodiment of an electrical connecting apparatus comprises an electrical insulating plate, an elastic plate made of an electrical insulating material arranged on the electrical insulating plate, a sheet-like conductive plate arranged on the elastic plate, and first and second contacts. The conductive plate comprises a hole area having at least one first hole portion allowing the probe tip portion of the first contact to abut to the conductive plate and a plurality of second hole portions not allowing the probe tip portions of the second contacts to abut thereon regardless of whether or not overdriving acts on the contacts.
    Type: Application
    Filed: October 16, 2009
    Publication date: April 22, 2010
    Applicant: Kabushiki Kaisha Nihon Micronics
    Inventors: Eichi OSATO, Yoshihito Goto, Mitsuhiro Abe
  • Patent number: 7688094
    Abstract: In an electrical connecting apparatus, a first guide is arranged in a plate-shaped lower base in which the contactors are arranged. The first guide has a first space for guiding a device under test so that its electrodes will contact the tips of contactors and for positioning the device under test against the contactors. The device under test is guided to the first space by second guides and is received and thrust by the tips of the contactors. By doing so, displacement of the device under test caused by displacement of the upper base or the second guides is prevented.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: March 30, 2010
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventor: Eichi Osato
  • Publication number: 20100065513
    Abstract: Apparatuses and methods for making and using a filter cloth assembly are described. A filter cloth assembly can have a liquid permeable filtering media attached to a connector ring. The liquid permeable filtering media separates at least one solid from at least one liquid in a slurry. The filtering media has a feed hole formed therein to allows passage of a slurry through the filtering media. The connector ring includes a flange having an upper flange section and a lower flange section. The lower flange section receives an edge of the feed hole to connect the filtering media to the connector ring such that the face of the filtering media is substantially flush with the upper flange section.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 18, 2010
    Applicant: MICRONICS, INC.
    Inventor: Barry F. HIBBLE
  • Patent number: 7679389
    Abstract: A probe includes an arm region extending in the back and forth direction, and a tip region extending downward from the front end portion of the arm region. The tip region has a pedestal portion integrally continuous to a lower edge portion at the front end side of the arm region and having an underside inclined to an imaginary axis extending in the vertical direction; and a contact portion projected from the underside of the pedestal portion and having a tip orthogonal to an imaginary axis. Thus, the position of the tip can be accurately determined.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: March 16, 2010
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Shinji Kuniyoshi, Hideki Hirakawa, Akira Soma, Takayuki Hayashizaki
  • Publication number: 20100062662
    Abstract: An electrically connecting apparatus comprises a base member provided with slots penetrating in the plate thickness direction, contacts disposed within the slots so as to be able to contact electrodes of a device under test on the base member and for connecting the electrodes to an electric circuit of a tester, and an elastic member. The contacts has a fixed piece to be fixedly held on the base member within the slots for connection with the electric circuit, and a movable piece disposed within the slots for electrical connection with the fixed piece. In the fixed piece, a guide face for guiding the movable piece toward a contact position permitting the movable piece and the electrodes to contact is formed, and the movable piece is supported slidably on the guide face so as to receive elastic biasing force toward the contact position by the elastic member.
    Type: Application
    Filed: October 31, 2005
    Publication date: March 11, 2010
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventor: Eichi Osato
  • Patent number: 7667472
    Abstract: A probe assembly for use in electrical measurement of a device under test. The probe assembly comprises a plate-like probe base plate with bending deformation produced in a free state without load, and a plurality of probes formed on one face of the probe base plate to project from the face. All the tips of the probes are positioned on the same plane parallel to an imaginary reference plane of the probe base plate.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: February 23, 2010
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Kiyotoshi Miura, Hidehiro Kiyofuji, Yuji Miyagi, Shinji Kuniyoshi, Hitoshi Sato
  • Publication number: 20100038766
    Abstract: A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each semiconductor chip is provided. The present invention relates to a semiconductor chip module in which a plurality of semiconductor chips each provided on the side face thereof with a part of a connection terminal coupled with a circuit pattern formed on the front face, have been stacked and bonded. Connection terminal portions on the side faces of the respective semiconductor chips are interconnected by a wiring pattern. The connection terminal on the semiconductor chip is led from the front face to the side face and formed by applying spraying of a conductive material in a mist state.
    Type: Application
    Filed: March 20, 2007
    Publication date: February 18, 2010
    Applicant: Kabushiki Kaisha Nihon Micronics
    Inventor: Masato Ikeda
  • Patent number: 7659727
    Abstract: A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. One of the conductor layers has a grounded pattern. Each of the conductor layers has a reference pattern, which is usable as a standard in calculation of an electric capacitance. An electric capacitance is measured between the grounded pattern and the three-dimensional wiring path. On the other hand, a theoretical electrical capacitance is calculated on the basis of a reference value of electric capacitance which has been measured between the reference pattern and the grounded pattern. The measured value for the wiring path is compared to the calculated value to determine whether the three-dimensional wiring path is good or bad. As the multilayer wiring section has the reference patterns, the electric capacitance for the normal wiring path can be obtained by calculation without preparing the normal acceptable product.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: February 9, 2010
    Assignee: Micronics Japan Co., Ltd.
    Inventor: Yoshiyuki Fukami
  • Publication number: 20100029099
    Abstract: An embodiment of an electrical connecting apparatus comprises a support board having an upper surface and a lower surface, a block having an attachment surface directing downward and attached to the support board in a state where at least the attachment surface is located below the support board, a flexible circuit board having a contactor area in which a plurality of contactors are arranged and an outside area around the contactor area and attached at part of the outside area to the lower surface of the support board in a state where at least the contactor area is opposed to the attachment surface of the block, and a reference mark member having a lower end surface and a reference mark for positioning provided on the lower end surface and attached to the block in a state where the lower end surface is exposed to the lower side of the circuit board. Accordingly, the measurement accuracy of the probe tip position is heightened.
    Type: Application
    Filed: March 22, 2007
    Publication date: February 4, 2010
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Kazuhito Hamada, Takashi Akiniwa, Satoshi Narita
  • Patent number: 7656166
    Abstract: A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. The ceramic substrate has an internal conductor layer, which is connected to a test pad. The first conductor layer is formed, and then an electric capacitance is measured between the test pad and a wiring pattern of the first conductor layer. On the other hand, an electrical capacitance is calculated under the normal wiring pattern condition. The measured value is compared to the calculated value to determine whether the wiring pattern is good or bad. Similar measurements and comparisons are carried out for each of the second through fifth conductor layers to determine whether a three-dimensional wiring path is good or bad. As the ceramic substrate has an internal conductor layer, the electric capacitance of the wiring can be measured without an overall grounded layer in the multilayer wiring section, which is a characteristic part different from others among a variety of the multilayer wiring boards.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: February 2, 2010
    Assignee: Micronics Japan Co., Ltd.
    Inventor: Yoshiyuki Fukami
  • Publication number: 20100013072
    Abstract: The present invention provides an inexpensive semiconductor chip module enabling sufficient heat dissipation without complicating the manufacture process. A semiconductor chip module according to the present invention includes a plurality of semiconductor chips to be stacked provided at the side face with a connection terminal to be coupled with a circuit pattern formed on the front face, interlayer wiring mutually connecting the connection terminals on the side faces of the respective semiconductor chips by a wiring pattern, and a formation space contributing to heat dissipation, formed between at least some layers of the semiconductor chips, to secure a formation face of the interlayer wiring.
    Type: Application
    Filed: May 14, 2007
    Publication date: January 21, 2010
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventor: Masashi Hasegawa
  • Patent number: D611035
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: March 2, 2010
    Assignee: Star Micronics Co., Ltd.
    Inventors: Yoshiaki Fukai, Yoshikazu Tsuchikiri, Masahiro Mano