Patents Assigned to NXP
  • Patent number: 12052051
    Abstract: An ultra-wideband, UWB, receiver module (213) comprising: an antenna for wirelessly receiving UWB signalling from a UWB transmitter module (212) and a processor. The processor is configured to: determine a channel impulse response, CIR, (519) of the wirelessly received UWB signalling, wherein the CIR comprises a plurality of channel taps each having a tap-response-value; identify a predetermined feature (520) in the CIR and an associated channel tap; and based on the channel tap that is associated with the identified feature (520) in the CIR (519), synchronize the UWB receiver module (213) for reception of subsequent UWB signalling.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: July 30, 2024
    Assignee: NXP B.V.
    Inventors: Stefan Tertinek, Wolfgang Küchler, Sandeep Mallya, Pradeep Kumar Aithagani
  • Patent number: 12050284
    Abstract: A vehicle radar system, apparatus and method use a radar control processing unit to generate a target response signal in at least a first dimension from compressed radar data signals and to perform cell-averaging constant false alarm rate (CA-CFAR) target detection by convolving the target response signal with a weighted kernel window signal in a frequency domain using a Fast Fourier Transform hardware accelerator, an element-wise multiplier, and an Inverse Fast Fourier Transform hardware accelerator to generate an output signal having a sign that indicates a target detection decision.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: July 30, 2024
    Assignee: NXP B.V.
    Inventors: Ryan Haoyun Wu, Satish Ravindran, Maik Brett
  • Patent number: 12047100
    Abstract: Systems and methods for digital predistortion (DPD) are disclosed herein. In an example embodiment, a digital front-end circuit includes a DPD block, power amplifier, and transmitter. The DPD block is configured to receive an input signal and to provide a first output signal, and includes a nonlinear model that is configured to generate a nonlinear model output signal based upon the input signal. The DPD block additionally includes a first mixing module that is configured to generate a mixing module output signal based upon the input signal and the nonlinear model output signal. The DPD block further includes a summation block that is configured to generate the first output signal at least in part as a first sum of the nonlinear model output signal and the mixing module output signal, and the first mixing module includes a plurality of first finite impulse response (FIR) filters.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: July 23, 2024
    Assignee: NXP USA, Inc.
    Inventors: Mir Adeel Masood, Peter Zahariev Rashev
  • Patent number: 12047104
    Abstract: The disclosure relates to a communications system having a transmitter and receiver connected via a transmission line. An example communications receiver (202) comprises: a pair of input connections (211, 212) for connecting to a transmission line (203); a termination resistance (213) equal to a characteristic impedance (Zc) of the transmission line (203); an air core transformer (205) having an input coil (206) connected to the pair of input connections (211, 212) via the termination resistance (213); and a comparator circuit (208) connected to an output coil (207) of the air core transformer (205), the comparator circuit (208) configured to provide an output signal (504) responsive to detection of voltage pulses across the output coil (207).
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: July 23, 2024
    Assignee: NXP USA, Inc.
    Inventors: Thierry Michel Alain Sicard, Guerric Panis
  • Patent number: 12047491
    Abstract: Various embodiments relate to a hardware device configured to compute a plurality of chained hash functions in parallel, including: a processor implementing p hash functions configured to operate on a small input, where p is an integer; a data unit connected to the plurality of hash functions, configured to store the outputs of plurality of hash functions that are then used as the input to a next round of computing the hash function, wherein the processor receives a single instruction and p small data inputs, and wherein each of the p hash functions are used to perform a chained hash function operation on a respective small input of the p small inputs.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: July 23, 2024
    Assignee: NXP B.V.
    Inventors: Joppe Willem Bos, Mario Lamberger, Joost Roland Renes, Tobias Schneider, Christine van Vredendaal
  • Patent number: 12047089
    Abstract: One example discloses an analog to digital converter (ADC), including: an analog comparator configured to receive an analog input signal and in response generate a comparator output signal; a set of digital to analog converter (DAC) elements configured to receive the analog input signal; wherein the DAC elements are configured to generate an analog DAC output signal in response to a digital code and the analog input signal; wherein the comparator is configured to receive the analog DAC output signal; a feedback circuit configured to generate a first feedback signal and a second feedback signal from the comparator output signal; a controller configured to enable a first set of controller elements in response to the first feedback signal; wherein the controller configured to enable a second set of controller elements in response to the second feedback signal; and wherein the controller elements are configured to generate the digital code.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: July 23, 2024
    Assignee: NXP USA, Inc.
    Inventors: Weiwei Xu, Xiaoyue Wang
  • Patent number: 12047113
    Abstract: In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: at least two antennas; an ultra-wideband (UWB) communication unit configured to receive UWB frames through said antennas; a controller configured to switch between said antennas such that consecutive UWB frames are received through different ones of said antennas; wherein the controller is further configured to compute channel impulse responses (CIRs) wherein each of said CIRs is based on a different one of said UWB frames. In accordance with a second aspect of the present disclosure, a corresponding method of operating a communication device is conceived. In accordance with a third aspect of the present disclosure, a computer program is provided for carrying out said method.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: July 23, 2024
    Assignee: NXP B.V.
    Inventors: Stefan Tertinek, Manuel Lafer, Wolfgang Küchler
  • Patent number: 12047489
    Abstract: An apparatus configured to: receive a digital input signal; receive a processing-direction-signal that can have a forward-value or a backward-value; and provide a digital output signal. The apparatus comprising a processor configured to apply an involutional cryptographic function to the digital input signal by: for a first operation: apply a first step of the involutional cryptographic function to the digital input signal in order to implement a forward calculation to move to the next step in the sequence; and perform a plurality of further operations until the forward calculation of a last step is performed. Each further operation comprises: if the processing-direction-signal has a forward-value: then perform the forward calculation for the current step; or if the processing-direction-signal has a backward-value: then perform a backward calculation for the current step.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: July 23, 2024
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Andreas Lentz, Fabrice Poulard
  • Patent number: 12040754
    Abstract: An amplifier circuit comprising: an amplifier; an output limiter for providing a variable impedance comprising: a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; and a feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage; wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 16, 2024
    Assignee: NXP USA, Inc.
    Inventors: Pierre Pascal Savary, Stephane Damien Thuriés
  • Patent number: 12040846
    Abstract: Systems and methods for producing quality indicators for phase-based distance estimations using narrowband radios are described. In an illustrative, non-limiting embodiment, a device may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the device to: measure a transfer function of a radio frequency (RF) channel between the device and another device using narrowband radios; estimate a distance between the device and the other device based, at least in part, upon the transfer function; and determine a Distance Quality Indicator (DQI) corresponding to the distance based, at least in part, upon an evaluation of a spectral lobe of the transfer function.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: July 16, 2024
    Assignee: NXP USA, Inc.
    Inventors: Mihai-Ionut Stanciu, Khurram Waheed, Olivier Jean
  • Patent number: 12040357
    Abstract: As disclosed herein, an integrated circuit substrate includes a first region coupled to a signal terminal and includes a guard region coupled via a diode circuit to a supply voltage terminal of the integrated circuit. The first region and the guard region are both of a first conductivity type. A cathode of the diode circuit is connected to the guard region and an anode of the diode circuit is connected to the supply voltage terminal. The first region and the guard region are separated by at least by a second region of the substrate that is of a second conductivity type opposite the first conductivity type.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: July 16, 2024
    Assignee: NXP B.V.
    Inventors: Guido Wouter Willem Quax, Dongyong Zhu
  • Patent number: 12040034
    Abstract: Various embodiments relate to a method for storing and reading data from a memory. Data words stored in the memory may be grouped, and word specific parity information and shared parity information is generated, and the shared parity information is distributed among the group of words. During reading of a word, if more errors are detected than can be corrected with word parity data, the shared parity data is retrieved and used to make the error corrections.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: July 16, 2024
    Assignee: NXP B.V.
    Inventors: Soenke Ostertun, Björn Fay, Vitaly Ocheretny
  • Patent number: 12038528
    Abstract: In accordance with a first aspect of the present disclosure, a radar unit is provided, comprising: a receiver circuit configured to receive a radar signal; a controller configured to control said receiver circuit, wherein said controller is configured to cause said receiver circuit to operate either in a complex receiver mode or in a real receiver mode. In accordance with a second aspect of the present disclosure, a method of operating a radar unit is conceived, comprising: receiving, by a receiver circuit comprised in the radar unit, a radar signal; controlling, by a controller comprised in said radar unit, said receiver circuit, wherein said controller causes said receiver circuit to operate either in a complex receiver mode or in a real receiver mode.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: July 16, 2024
    Assignee: NXP USA, Inc.
    Inventors: Hugo Albert Vallee, Cristian Pavao Moreira
  • Patent number: 12041561
    Abstract: A wireless communication system (100) estimates a carrier frequency offset between wireless devices (101, 102) by configuring the devices through exchanging packet configuration packets (121, 125) to specify a carrier frequency offset fingerprint (CFOF) sequence in a measurement packet (133, 136) which is transmitted between the wireless devices, where the CFOF sequence in the measurement packet includes a prefix component (31), one or more signature segments (32), and a suffix component (33) for performing CFO measurements at the wireless devices which each process IQ samples corresponding to the signature segments in the received measurement packet by correlating the IQ samples against a reference vector to generate, for each of the one or more signature segments, a carrier frequency offset estimate between the first and second wireless devices.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: July 16, 2024
    Assignee: NXP B.V.
    Inventors: Raja Venkatesh Tamma, Khurram Waheed
  • Patent number: 12040291
    Abstract: Radio frequency (RF) packages containing multilevel power substrates and associated fabrication methods are disclosed. In an embodiment, the method includes producing a multilevel substrate panel by obtaining a base panel level containing prefabricated base structures and having a surface through which metallic surfaces of the prefabricated base structures are exposed. A secondary panel level is formed on the base layer to include patterned metal features embedded in a secondary dielectric body and electrically contacting the exposed metallic surfaces of the prefabricated base structures at a direct plated interface. The presingulated array of multilevel power substrates is separated into singulated multilevel power substrates each including a base substrate level formed from a singulated piece of the base panel level and a secondary substrate level formed from a singulated piece of the secondary substrate level.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: July 16, 2024
    Assignee: NXP USA, Inc.
    Inventors: Zhiwei Gong, Li Li, Lu Li, Lakshminarayan Viswanathan, Fernando A. Santos, Burton Jesse Carpenter
  • Patent number: 12035133
    Abstract: A communication device and method are provided for communicating data, such as a cryptographic key, wirelessly to another communication device. The communication device and the other device each include an oscillator circuit portion, an inverter, a non-inverting buffer, and a switch for switching between the inverter and non-inverting buffer. A circular loop is formed wirelessly between the oscillator circuit portions of both devices by placing both communication devices near each other. A control circuit in each device measures a parameter such as frequency or waveform pattern of the circulating signal to determine how to position the switches. The oscillator circuit portions may be portions of the same oscillator distributed between the devices, such as a delay line-controlled oscillator or a chaotic oscillator. Inverting and not inverting the circulated signal changes the parameter of the signal so that it is difficult for an eavesdropper to learn the communication.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: July 9, 2024
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 12032690
    Abstract: A method is provided for protecting a machine learning model from a side channel attack. A weighted sum vector having first and second elements is initialized. A weight vector for a connection between a node of a first layer and a node of a second layer is multiplied with an input vector to the node of the first layer. A first element of the weight vector includes a weight, and a first element of the input vector includes the input. A second element of the weight vector is a negation of the first element of the weight vector and the second element of the input vector equals the first element of the input vector. A multiplication result is added to the weighted sum vector to produce a computed weighted sum vector. An output vector including the computed weighted sum vector is provided to the node of the second layer.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: July 9, 2024
    Assignee: NXP B.V.
    Inventors: Jan Hoogerbrugge, Wilhelmus Petrus Adrianus Johannus Michiels
  • Patent number: 12032684
    Abstract: A method for detecting a fault injection is described. The method includes providing a secondary code, the secondary code including a predetermined function with a known expected result when the secondary code is executed with a known tested input. A primary code is executed in the data processing system. The primary code may be a portion of code that requires protection from a fault injection attack, such as for example, security sensitive code. The secondary code is executed in parallel with the primary code execution in the data processing system to produce an output. The output is compared with the known expected result to detect the fault injection attack of the data processing system. In one embodiment, the secondary code is not related to the primary code.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: July 9, 2024
    Assignee: NXP B.V.
    Inventors: Lars Kaufmann, Nikita Veshchikov
  • Patent number: 12033950
    Abstract: A method of forming a self-aligned waveguide is provided. The method includes forming a first alignment feature on a packaged semiconductor device and a second alignment feature on a waveguide structure. A solder material is applied to the first alignment feature or the second alignment feature. The waveguide structure is placed onto the packaged semiconductor device such that the second alignment feature overlaps the first alignment feature. The solder material is reflowed to cause the waveguide structure to align with the packaged semiconductor device.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: July 9, 2024
    Assignee: NXP USA, Inc.
    Inventors: Michael B. Vincent, Scott M. Hayes, Antonius Hendrikus Jozef Kamphuis
  • Patent number: 12032088
    Abstract: A device for a radar sensor is disclosed, the device comprising: transmission circuitry configured to generate transmission signals with a linear frequency chirp modulation in a predetermined frequency band for output to a radar antenna; reception circuitry configured to receive reflection signals corresponding to reflection of the transmitted radar signals from one or more physical objects; and control circuitry configured to select a frequency range within said predetermined frequency band and/or a timing pattern for said transmission signals; wherein said device is configured to: receive a further signal from a further radar sensor; determine, from said further signal, a frequency range and/or timing pattern in use by said further radar sensor for transmission of further transmission signals; and select a frequency range within said predetermined frequency band and/or a timing pattern for said transmission signals which does not conflict with the frequency range and/or timing pattern of said further transm
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: July 9, 2024
    Assignee: NXP USA, Inc.
    Inventors: Maik Brett, Ryan Haoyun Wu, Arunesh Roy