Patents Assigned to NXP
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Patent number: 10261926Abstract: A multi-core processor manages contention amongst its cores for access to a shared resource using a semaphore that maintains separate access-request queues for different cores and uses a selectable scheduling algorithm to grant pending requests, one at a time. The semaphore signals the core whose request is granted by sending it an interrupt signal using a dedicated core line that is not part of the system bus. The granted request is then de-queued, and the core accesses the shared resource in response to receiving the interrupt signal. The use of dedicated core lines for transmitting interrupt signals from the semaphore to the cores alleviates the need for repeated polling of the semaphore on the system bus. The use of the scheduling algorithm prevents a potential race condition between contending cores.Type: GrantFiled: November 22, 2016Date of Patent: April 16, 2019Assignee: NXP USA, INC.Inventors: Liang Jia, Zhijun Chen, Zhiling Sui
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Publication number: 20190109060Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.Type: ApplicationFiled: December 5, 2018Publication date: April 11, 2019Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
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Patent number: 10254280Abstract: The invention relates to a channel for trapping particles to be fed to the channel with a fluid. The invention further relates to a flow cell comprising such a channel. The invention also relates to an assembly comprising such a flow cell and a detection means. The invention also relates to a method for trapping particles in such a channel. And finally, the invention relates to a method for analyzing a sample using such an assembly.Type: GrantFiled: August 10, 2016Date of Patent: April 9, 2019Assignees: Micronit Microtechnologies B.V., Janssen Pharmaceutica NV, NXP B.V.Inventors: Marko Theodoor Blom, Monica Brivio, Simone Tanzi, Simon Reuvekamp, Bieke Van Dorst, Lieven Jozef Stuyver, Elfried Van Der Sar
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Patent number: 10254317Abstract: An Integrated Circuit (IC) as described herein may include a first logic circuit, a second logic circuit coupled to the first logic circuit via a level shifter, and a safe state circuit coupled to the first logic circuit and to a first input of a logic gate. For example, a second input of the logic gate may be coupled to an output of the level shifter, and an output of the logic gate may be coupled to the second logic circuit. The safe state circuit may further include a front-end portion; a reversible current mirror portion coupled to the front-end portion; and a voltage-level translation portion coupled to the reversible current mirror portion.Type: GrantFiled: April 17, 2018Date of Patent: April 9, 2019Assignee: NXP USA, Inc.Inventor: Ivan Carlos Ribeiro do Nascimento
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Patent number: 10254177Abstract: Disclosed is an integrated circuit temperature sensor including a first capacitor having a first capacitance relative to a temperature, a second capacitor a second capacitance relative to the temperature, and a controller configured to determine a ratio of the first capacitance to the second capacitance in order to determine a temperature of a region of the integrated circuit.Type: GrantFiled: September 14, 2016Date of Patent: April 9, 2019Assignee: NXP B.V.Inventor: Berry Anthony Johannus Buter
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Patent number: 10256846Abstract: A method of processing a signal by non-uniform quantization of log likelihood ratios is disclosed. A method comprising the steps of: receiving a plurality of bits; calculating a log likelihood ratio, known as a LLR, for each bit; providing a LLR value for each bit based on the calculated LLR; quantizing the LLR values into a plurality of quantization bins, each quantization bin having: a width representative of one or more LLR values; and an index value having a bit length; and associating each bit with the index value that corresponds to its LLR value, wherein the width of each quantization bin is non-uniform. This compresses the LLR values in a more efficient manner, requiring lower memory usage and/or lower bandwidth. A chip for a receiver and a communication system comprising one or more receivers are also disclosed.Type: GrantFiled: December 30, 2015Date of Patent: April 9, 2019Assignee: NXP B.V.Inventors: Semih Serbetli, Marinus van Splunter
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Patent number: 10255034Abstract: An audio processing circuit, audio unit and integrated circuit and method for blending are described. The audio processing circuit comprises: a time-to-frequency domain circuit configured to convert a primary audio signal and a secondary audio signal in a time-domain form and output frequency spectrum representations thereof; a cross-fade magnitude circuit configured to obtain a cross-faded magnitude spectrum representation from the frequency spectrum representations; a cross-fade phase circuit configured to obtain a separate cross-faded phase spectrum representation from the frequency spectrum representations; and a frequency-to-time domain circuit configured to receive the separate cross-faded magnitude and cross-faded phase spectrum representations and output a time domain signal.Type: GrantFiled: August 30, 2017Date of Patent: April 9, 2019Assignee: NXP B.V.Inventors: Temujin Gautama, Joris Luyten
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Patent number: 10256193Abstract: A semiconductor device includes a package substrate, a semiconductor die attached to a first major surface of the package substrate, and a plurality of wire bonds attached between the semiconductor die and the first major surface of the package substrate. The device further includes a conductive plate over the semiconductor die, plurality of wire bonds, and package substrate wherein a first major surface of the conductive plate faces the first major surface of the package substrate. The device further includes a plurality of conductive extensions attached to the first major surface of the conductive plate, wherein each conductive extension extends from the first major surface of the conductive plate and between two adjacent wire bonds of the plurality of wire bonds.Type: GrantFiled: November 29, 2017Date of Patent: April 9, 2019Assignee: NXP USA, Inc.Inventors: James S. Golab, Robert Joseph Wenzel, Stanley Andrew Cejka
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Patent number: 10253744Abstract: A controller used to control a flyback switching mode power supply. The flyback switching mode power supply is constructed to charge a capacitor, and includes a rectifying device, a series arrangement of a switch and a primary winding of a transformer for receiving an input voltage, and a secondary winding of the transformer for charging the capacitor via the rectifying device to an output voltage. The controller is configured to sense the output voltage and to turn on the switch when the change of the output voltage over time becomes smaller than a predetermined threshold. By using the controller to sense and use the output voltage across the capacitor to turn on the switch, a controlled flyback switching mode power supply that makes use of voltage control is realized.Type: GrantFiled: November 25, 2013Date of Patent: April 9, 2019Assignee: NXP USA, Inc.Inventors: Michael Robert Garrard, Anoop K. Aggarwal, Ralph C. Ferrara
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Publication number: 20190104408Abstract: Embodiments of an authentication system and a method for authentication using ciphers are described. In the system and method, cryptographic calculations of an encryption algorithm are executed at a base station, in a determined secure environment, to produce a pre-calculated cipher for a subsequent authentication process. The pre-calculated cipher is then used to transmit an authentication request message from the base station and validation of an authentication response message for the subsequent authentication.Type: ApplicationFiled: September 29, 2017Publication date: April 4, 2019Applicant: NXP B.V.Inventor: Juergen Nowottnick
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Patent number: 10250213Abstract: A calibration circuit and a method for calibrating a RC circuit, such as a high-pass filter, of an integrated circuit are provided. The calibration circuit comprises a filter arrangement having tuneable filter for filtering an input signal having a predetermined frequency. The filter comprises tuneable resistor elements, a saturation detector for detecting saturation and non-saturation of the tuneable filter by comparing a comparison voltage with the signal voltage of the filtered input signal, calibration control logic for providing incrementing and decrementing counter signals.Type: GrantFiled: September 27, 2013Date of Patent: April 2, 2019Assignee: NXP USA, Inx.Inventors: Cristian Pavao-Moreira, Olivier Doare, Birama Goumballa
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Patent number: 10249557Abstract: A packaged lead frame includes a encapsulant having a first minor side, a second minor side opposite the first minor side, a third minor side, and a fourth minor side opposite the third minor side, and a plurality of leads along the third minor side between the first minor side and a center plane between the first and second minor side. The plurality of leads extend outwardly from the encapsulant at a first plane. Each of the plurality of leads includes a corresponding jog external to the encapsulant which jogs away from the center plane, wherein the corresponding jog of each lead from a first lead of the plurality of leads closest to the center plane to a last lead of the first plurality of leads closest to the first minor side jogs incrementally further away the center plane.Type: GrantFiled: May 23, 2017Date of Patent: April 2, 2019Assignee: NXP USA, Inc.Inventors: Leo M. Higgins, III, Burton Jesse Carpenter
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Patent number: 10250197Abstract: A multiple-stage amplifier includes a driver stage die and a final stage die. The final stage die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a first transistor. The driver stage die includes another type of semiconductor substrate (e.g., a silicon substrate), a second transistor, and one or more secondary circuits that are electrically coupled to a control terminal of the first transistor. A connection (e.g., a wirebond array or other DC-coupled connection) is electrically coupled between an RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. The secondary circuit(s) of the driver stage die include a final stage bias circuit and/or a final stage harmonic control circuit, which are electrically connected to the final stage die through various connections.Type: GrantFiled: November 6, 2017Date of Patent: April 2, 2019Assignee: NXP USA, Inc.Inventors: Joseph Schultz, Enver Krvavac, Yu-Ting David Wu, Nick Yang, Jeffrey Jones, Mario Bokatius, Ricardo Uscola
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Patent number: 10247753Abstract: A microelectromechanical systems (MEMS) device, such as a single axis accelerometer, includes a movable mass suspended from a substrate. The movable mass has a first portion and a second portion. A first spring system interconnects the first portion of the movable mass with the second portion of the movable mass. A second spring system interconnects the first portion with an anchor system. The first spring system enables movement of the second portion of the movable mass in response to a shock event force imposed on the movable mass in a first direction that is orthogonal to a sense direction, wherein the first spring system inhibits movement of the first portion of the movable mass in the first direction in response to the shock event force. However, the first and second movable masses move together in response to an acceleration force in the sense direction.Type: GrantFiled: February 14, 2017Date of Patent: April 2, 2019Assignee: NXP USA, Inc.Inventors: Aaron A. Geisberger, Fengyuan Li
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Patent number: 10250258Abstract: Embodiments of devices and method for detecting semiconductor substrate thickness are disclosed. In an embodiment, an IC device includes a semiconductor substrate, a charge emitter embedded in the semiconductor substrate and configured to produce an electrical charge in the semiconductor substrate and a charge sensor embedded in the semiconductor substrate and configured to generate a response signal in response to the electrical charge produced in the semiconductor substrate. The magnitude of the response signal depends on the thickness of the semiconductor substrate.Type: GrantFiled: September 28, 2016Date of Patent: April 2, 2019Assignee: NXP B.V.Inventors: Andreas Bernardus Maria Jansman, Franciscus Petrus Widdershoven, Viet Thanh Dinh
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Patent number: 10249582Abstract: The embodiments described herein use resonant circuits to provide isolation between closely proximate conductors. For example, these resonant circuits can be used to reduce unwanted electromagnetic coupling and minimize crosstalk energy between package leads, bonding wires, and circuit board traces on radio frequency (RF) electronic devices, including RF power amplifiers. To facilitate a reduction in electromagnetic coupling, the resonant circuit is configured resonate with the closely proximate conductors at a selected frequency f0, and when resonating at the selected frequency f0 the resonant circuit provides a path to ground for the crosstalk energy. This path to ground reduces the crosstalk energy that would otherwise be shared between the two closely proximate conductors, and thus provides the electromagnetic isolation between the conductors.Type: GrantFiled: December 19, 2016Date of Patent: April 2, 2019Assignee: NXP USA, Inc.Inventor: Nick Yang
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Patent number: 10250118Abstract: A power supply is disclosed. The power supply includes a switch to regulate an input voltage and a current sense transistor to sense current through the switch. The power supply further includes a switching control to control a switching frequency of the switch. A programmable pulse skip circuit coupled to the switching control is also included. The switching control is configured to alter the switching frequency based on a pulse skip control signal received from the programmable pulse skip circuit. The programmable pulse skip circuit produces the pulse skip control signal based on an external control signal inputted to the programmable pulse skip circuit and the sensed current by the current sense transistor.Type: GrantFiled: April 16, 2018Date of Patent: April 2, 2019Assignee: NXP B.V.Inventor: Ge Wang
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Patent number: 10249615Abstract: A semiconductor device includes a substrate comprising a heterostructure configured to support formation of a channel during operation, first and second dielectric layers supported by the substrate, the second dielectric layer being disposed between the first dielectric layer and the substrate, a gate supported by the substrate, disposed in a first opening in the first dielectric layer, and to which a bias voltage is applied during operation to control current flow through the channel, the second dielectric layer being disposed between the gate and the substrate, and an electrode supported by the substrate, disposed in a second opening in the first and second dielectric layers, and configured to establish a Schottky junction with the substrate.Type: GrantFiled: January 12, 2015Date of Patent: April 2, 2019Assignee: NXP USA, INC.Inventors: Bruce M. Green, James A. Teplik
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Patent number: 10250269Abstract: An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output.Type: GrantFiled: July 24, 2017Date of Patent: April 2, 2019Assignee: NXP B.V.Inventors: Jos Verlinden, Sander Derksen, Dobson Paul Parlindungan Simanjuntak, Remco Cornelis Herman Van de Beek
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Patent number: 10249318Abstract: A speech-signal-processing-circuit configured to receive a time-frequency-domain-reference-speech-signal and a time-frequency-domain-degraded-speech-signal. The time-frequency-domain-reference-speech-signal comprises: an upper-band-reference-component with frequencies that are greater than a frequency-threshold-value; and a lower-band-reference-component with frequencies that are less than the frequency-threshold-value. The time-frequency-domain-degraded-speech-signal comprises: an upper-band-degraded-component with frequencies that are greater than the frequency-threshold-value; and a lower-band-degraded-component with frequencies that are less than the frequency-threshold-value.Type: GrantFiled: March 20, 2017Date of Patent: April 2, 2019Assignee: NXP B.V.Inventors: Magdalena Kaniewska, Wouter Joos Tirry, Cyril Guillaumé, Johannes Abel, Tim Fingscheidt