Patents Assigned to NXP
  • Patent number: 10219364
    Abstract: Embodiments of the present invention provide for movement of a fluid around a small form-factor device, such as a semiconductor device die or package, through use of a microplasma. Embodiments provide for a microplasma generated in an ambient fluid with a lower power than predicted by a Paschen Curve for that fluid. The ionized molecules of the plasma can be manipulated by further generation of an electric field that can be used, for example, to move the ions in a desired direction. The movement of the ionized fluid generates a fluid flow of neighboring, non-ionized fluid molecules in the desired direction.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventor: Andrew Paul Dickens
  • Patent number: 10218413
    Abstract: Wireless power is provided to a WPP-compliant wireless device by generating a first radio frequency (RF) signal at a first frequency. The transmitter circuit is inductively coupled to the compliant wireless device using the first RF signal. A second RF signal is generated at a second frequency. The presence of a WPP-noncompliant wireless device is detected by detecting a third RF signal at a third frequency that is a harmonic of the second frequency. The non-compliant wireless device is protected by reducing, in response to detecting the third RF signal, a signal strength for the first RF signal.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP B.V.
    Inventors: Oswald Moonen, Klaas Brink, Patrick Andre Yves Ozenne
  • Patent number: 10217713
    Abstract: The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Sheila F. Chopin, Thomas H. Koschmieder, Varughese Mathew
  • Patent number: 10216452
    Abstract: An apparatus embodiment includes an integrated circuit (IC) and breach-detection circuitry. The IC includes data storage circuitry, a power grid configured to distribute power to the data storage circuitry, and a plurality of nodes distributed over at least one sensitive region of the IC. The breach-detection circuitry monitors power grid integrity at the at least one sensitive region of the IC and detects an event indicative of a breach by an external probe at a portion of the at least one sensitive region in response to floating node detection or a change in voltage at one of the plurality of nodes.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Fabio Duarte De Martin, Andre Luis Vilas Boas, Guilherme Godoi
  • Patent number: 10218339
    Abstract: An integrated circuit device includes a substrate, a voltage monitor circuit formed on the substrate, and a trimming circuit formed on the substrate that includes a successive approximation register circuit having an input coupled to an output of the voltage monitor circuit; a beta multiplier circuit having an input coupled to an output of the successive approximation register circuit, an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit. A resistance value of the variable resistance circuit is controlled by the output of the successive approximation register.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jae Woong Jeong, LeRoy Winemberg
  • Patent number: 10216564
    Abstract: The present disclosure provides methods and circuits for managing failing sectors in a non-volatile memory. A record address and a read control signal are received, where the record address identifies a location in the non-volatile memory. The record address is compared with a plurality of dead sector addresses, where the dead sector addresses correspond to a subset of sectors located in the non-volatile memory. Data located at the record address is determined to be invalid in response to a combination of a first detection that the record address matches one of the dead sector addresses and a second detection that the read control signal indicates a read operation is requested to be performed on the non-volatile memory.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Ross S. Scouller, Jeffrey C. Cunningham, Daniel L. Andre, Tim J. Coots
  • Patent number: 10217735
    Abstract: A semiconductor switch device and a method of making the same. The semiconductor switch device includes a field effect transistor located on a semiconductor substrate. The field effect transistor includes a plurality of gates. Each gate includes a gate electrode and gate dielectric arranged in a loop on a major surface of the substrate. The loops formed by the gates are arranged concentrically. Each gate has a source region located adjacent an inner edge or outer edge of the loop formed by that gate and a drain region located adjacent the other edge of said inner edge and said outer edge of the loop formed by that gate.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP B.V.
    Inventors: Olivier Tesson, Thomas Francois
  • Patent number: 10218274
    Abstract: Embodiments of a circuit and method for generating a ripple voltage for a ripple based constant-on-time DC-DC converter are disclosed. A circuit includes a ripple voltage output, a first charging circuit connected to the ripple voltage output, a second charging circuit connected to the ripple voltage output, a charge control circuit configured to charge the first charging circuit and the second charging circuit out-of-phase from each other in response to an on signal from a ripple based constant-on-time DC-DC converter, where the voltage of the first charging circuit and the voltage of the second charging circuit are provided at the ripple voltage output as the ripple voltage.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP B.V.
    Inventor: Shufan Chan
  • Publication number: 20190058614
    Abstract: Embodiments of a method, a device and a computer-readable storage medium are disclosed. In an embodiment, a method for operating a Controller Area Network (CAN) device involves detecting a transition of a CAN transceiver of the CAN device from a dominant state to a recessive state and in response to detecting a transition of the CAN transceiver from the dominant state to the recessive state, controlling an output impedance of the CAN transceiver to be within a predefined range of an impedance value at the dominant state while a differential driver voltage on a CAN bus connected to the CAN transceiver decreases to a predefined voltage.
    Type: Application
    Filed: August 19, 2017
    Publication date: February 21, 2019
    Applicant: NXP B.V.
    Inventors: Clemens Gerhardus Johannes de Haas, Matthias Berthold Muth
  • Patent number: 10212141
    Abstract: Various embodiments described herein relate to network key manager which is configured to manage keys in nodes in the network, wherein the network key manager including a memory configured to store an update data structure; a processor configured to: determine which nodes are blacklisted; generate the update data structure of volatile private keys for each node that is not blacklisted, wherein the volatile private key is based upon secret information associated with the node and an index, wherein the volatile private key is used for the indexth key update; determine a neighbor node of the network key manager; remove the volatile private key for the neighbor node from the update data structure; encrypt the resulting update data structure and a new network key with the private key for the neighbor node to produce an encrypted message; and send the encrypted message to the neighbor node.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Andrei Catalin Frincu, George Bogdan Alexandru
  • Patent number: 10211784
    Abstract: An amplifier includes first, second, and third inputs to receive an RF signal, first and second amplifiers, and an input phase adjustment circuit coupling the first, second, and third inputs to the first and second amplifiers, the input phase adjustment circuit having first and second outputs coupled to the first and second amplifiers, respectively. The input phase adjustment circuit includes a pair of inputs, where the pair of inputs includes the first and second inputs, for the first output and a pair of phase adjustment paths coupling the pair of inputs to the first output, respectively. The pair of phase adjustment paths are configured to adjust a phase of the RF signal differently for the first output.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Margaret A. Szymanowski, Ramanujam Srinidhi Embar, Roy Mclaren
  • Patent number: 10211071
    Abstract: Embodiments of a method for packaging Integrated Circuit (IC) dies and an IC device are described. In an embodiment, a method for packaging IC dies involves creating openings on a substrate, where side surfaces of the openings on the substrate are covered by metal layers, placing the IC dies into the openings on the substrate, applying a second metal layer to the substrate, where the IC dies are electrically connected to at least a portion of the second metal layer, and cutting the substrate into IC devices.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 19, 2019
    Assignee: NXP B.V.
    Inventors: Chung Hsiung Ho, Wen-Hsuan Lin
  • Patent number: 10211177
    Abstract: A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Scott M. Hayes, Scott D. Marshall, Mahesh K. Shah
  • Patent number: 10210040
    Abstract: Multi-dimensional parity checker (MDPC) systems and related methods are disclosed to check parity of data regions within external memories. In one embodiment, the MDPC system includes a control register and a parity checker. The parity checker receives data segments accessed from the data region. The parity checker generates and accumulates multi-dimensional parity bits for the data segments and subsequently compares accumulated bits to expected multi-dimensional parity bits to generate multi-dimensional error syndrome bits representing identified comparison errors. The parity checker also determines a syndrome state based upon the multi-dimensional syndrome bits and stores the syndrome state within the control register. The parity checker operates in different modes based upon different values stored in an operational mode field of the control register.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Joseph C. Circello, David J. Schimke
  • Patent number: 10209822
    Abstract: A touch sensor includes electrodes that are serially arranged and a processor with multiple input terminals. The electrodes are grouped into first, second and third groups of electrodes. Each electrode of the first group is coupled with a corresponding input terminal of the processor. The electrodes of the second group are sequentially coupled with the input terminals of the processor by way of odd numbered electrodes of the first group. The electrodes of the third group are sequentially coupled with the input terminals of the processor by way of even numbered electrodes of the first group. Each of the electrodes, other than the electrodes on the ends, is triggered simultaneously with at least one of its neighboring electrodes to provide sensed signals to the processor.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Wangsheng Mei, Yonggang Chen, Ben Wang, Kun Wu
  • Patent number: 10211787
    Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Abdulrhman M. S. Ahmed, Mario M. Bokatius, Paul R. Hart, Joseph Staudinger, Richard E. Sweeney
  • Patent number: 10211794
    Abstract: An RF amplifier device includes a semiconductor die and an integrated passive device (IPD) on a ground flange. The IPD includes a semiconductor substrate and a metal-insulator-metal (MIM) capacitor coupled to the semiconductor substrate. The MIM capacitor includes a first electrode, a second electrode, and a dielectric between the first electrode and the second electrode. A first RF capacitor is over the semiconductor substrate and a second RF capacitor is over the semiconductor substrate. A metal layer is patterned to form a portion of an elevated metal shielding structure, a first plate of the first RF capacitor and a first plate of the second RF capacitor. The elevated metal shielding structure is over the MIM capacitor. The IPD is electrically coupled to the semiconductor die.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Ning Zhu, Damon G. Holmes, Jeffrey Kevin Jones
  • Patent number: 10211643
    Abstract: A switching module comprising at least one current sense component.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Alexander Petrovich Soldatov, Vasily Alekseyevich Syngaevskiy, Gennady Mihaylovich Vydolob
  • Patent number: 10211058
    Abstract: An electrostatic discharge protection device includes a buried layer having a plurality of heavily doped regions of a first conductivity type and a laterally diffused region between adjacent heavily doped regions, a semiconductor region over the buried layer, and a first well of the first conductivity type extending from a surface of the semiconductor region to a heavily doped region. The device includes a first transistor in the semiconductor region having an emitter coupled to the first terminal, and a second transistor in the semiconductor region having an emitter coupled to the second terminal. The first well forms a collector of the first transistor and a collector of the second transistor.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jean-Phillippe Laine, Patrice Besse, Changsoo Hong, Rouying Zhan
  • Patent number: 10207719
    Abstract: A microcontroller-based method and apparatus are described for measuring motions signals (301) with a plurality of inertial sensors (302-304) contained within a device package housing and validating (420) a first measured motion signal (e.g., ?X) by generating at least a first estimated value ?X for the first motion signal (e.g., 419) based on at least a second measured motion signal (e.g., AY) and for comparing the first estimated value for the first motion signal (419) to the first measured motion signal ?X in order to validate the first measured motion signal ?X.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventor: David A. Hayner