Abstract: A method of forming a semiconductor device assembly includes forming an interposer having an opening extending from a first major surface to a second major surface of the interposer and a plurality of external connectors on the second major surface. The method further includes attaching the first major surface of the interposer to a packaged semiconductor device, wherein the opening of the interposer exposes the packaged semiconductor device.

Abstract: A controller for a voltage regulator is disclosed. The controller is switchable between first and second modes of operation in which the controller is adapted to control the regulator to operate in switching and linear modes respectively. The controller is further adapted to respond to an input voltage to the voltage regulator to enter a third mode of operation in which the input voltage is coupled directly to an output terminal.

Abstract: Described is an arrangement for registering light, comprising: a MOS-transistor structure having a first source/drain region, a second source/drain region, and a bulk region at least partially between the first source/drain region and the second source/drain region, wherein the bulk region has a doping type different from another doping type of the first and the second source/drain regions, wherein in the bulk region charge carriers are generated in dependence of light impinging on the bulk region, wherein the generated charge carriers control a current flowing from the first source/drain region to the second source/drain region via at least a portion of the bulk region.

Abstract: An LED lighting system is disclosed comprising: a heatsink; a plurality of strings of LEDs each string comprising one or more LEDs each having a junction and being mounted on the heatsink, and a controller comprising a memory unit and a processor and being configured to supply a current to each of the strings of LEDs; the processor comprises: a first temperature estimation subunit configured to generate an estimate of a temperature of the junction of a one of strings of LEDs; a heatsink temperature estimation subunit configured to estimate a temperature of the heatsink unit from the first estimate; and a second temperature estimation subunit configured to provide an estimate of a temperature of the junction of a second string of LEDs, from the estimated temperature of the heatsink. A controller for and method of operating a plurality of LEDs are also disclosed.

Abstract: A magnetic field sensor includes in-plane sense elements located in a plane of the magnetic field sensor and configured to detect a magnetic field oriented perpendicular to the plane. A current carrying structure is positioned proximate the magnetic field sensor and includes at least one coil surrounding the in-plane sense elements. An electric current is applied to the coil to create a self-test magnetic field to be sensed by the sense elements. The coil may be vertically displaced from the plane in which the sense elements are located and laterally displaced from an area occupied by the sense elements to produce both Z-axis magnetic field components and lateral magnetic field components of the self-test magnetic field. The sense elements are arranged within the coil and interconnected to cancel the lateral magnetic field components, while retaining the Z-axis magnetic field components to be used for self-test of the magnetic field sensor.

Abstract: An apparatus, method and integrated circuit for broad-range current measurement using variable resistance are disclosed. Embodiments of an apparatus for sensing current through a transistor device may include an interface configured to receive a current from the transistor device for sensing. In an embodiment, the apparatus may also include a sensor component coupled to the interface and configured to receive the current from the transistor device and to generate a responsive sensor voltage, the sensor component comprising an adjustable resistance component, a resistance value of the adjustable resistance component being selectable in response to a level of the current received at the interface.

Abstract: The present application relates to a flash memory controller and a method of operating thereof. A system bus interface is provided to interface with a system bus and a debug bus interface is provided to interface with a debug bus. A flash access control block is provided to perform storage I/O operations on a flash memory array. A debug control block is provided to monitor debug related information. The flash memory controller is configured to selectively operate in one or storage operating mode or debug operating mode. In the debug operating mode: the storage control block is configured to serve only read data access requests; and the debug control block is configured to store trace messages in an allocated part of the storage resources of the flash memory controller in response to trace events. The trace messages are generated on the basis of the monitored debug related information.

Abstract: An integrated circuit includes an insulated gate bipolar transistor (“IGBT”), a clamp element coupled to a control gate of the IGBT to allow current flow in a first direction when voltage is applied to the control gate of the IGBT, and a blocking element coupled to the control gate of the IGBT and to the clamp element. The blocking element allows current flow in a second direction when voltage is removed from the control gate of the IGBT, the second direction is opposite the first direction. A resistive element has a first terminal and a second terminal, the first terminal is coupled between an anode of the clamping element and an anode of the blocking element and the second terminal is coupled to an output of test circuitry.

Abstract: A electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the antenna combination configured to tune the antenna combination; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna.

Abstract: Embodiments of semiconductor devices and methods of their formation include providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region, and forming a gate structure in a first trench in the active region of the semiconductor substrate. A termination structure is formed in a second trench in the edge region of the semiconductor substrate. The termination structure has an active region facing side and a device perimeter facing side. The method further includes forming first and second source regions of the first conductivity type are formed in the semiconductor substrate adjacent both sides of the gate structure. A third source region is formed in the semiconductor substrate adjacent the active region facing side of the termination structure. The semiconductor device may be a trench metal oxide semiconductor device, for example.

Abstract: In High Voltage CMOS technologies the supply voltage is typically higher than the maximum allowed gate voltage. In a switching output stage of amplifiers such class-D amplifiers and DC-DC converters the gates of the power field effect transistors need to be charged quickly. This requires a gate driver that is capable of delivering large currents without exceeding the maximum allowed voltage on the gate of the power field effect transistors.

Abstract: According to an aspect of the invention, an aggregator node is conceived for use in a network, wherein said aggregator node is arranged to aggregate encrypted data, and wherein said aggregator node comprises a secure element which is arranged to perform the aggregation of the encrypted data in a secure manner.

Abstract: An inertial sensor includes first and second movable elements suspended from a substrate and interconnected by a beam. The second movable element is positioned laterally adjacent to the first movable element, and each of the movable elements has a mass that is asymmetric relative to a rotational axis. A first spring system couples the first movable element to the substrate and a second spring system couples the second movable element to the substrate. The spring systems and the beam enable the movable elements to move together in response to force imposed upon the movable elements. In particular, the first and second movable elements can undergo in-plane torsion motion in response to force, such as acceleration, imposed in a sense direction. Additionally, damping structures may be integrated into the first and second movable elements to effectively increase a damping ratio of the device resulting from the in-plane torsion motion.

Abstract: A radio frequency transponder circuit, comprising: an AC-DC converter (70) connected to an RF input terminal (21a) and a DC output terminal (81) and operable to convert an RF signal (RFA) at the RF input terminal (21a) to a DC output signal (VDD) at the DC output terminal (81); and a voltage limiting circuit (50) connected to the RF input terminal (21a) and operable to limit the amplitude of the RF signal (RFA); wherein the voltage limiting circuit (50) comprises a NMOS limiting transistor (51) in parallel with a complimentary PMOS limiting transistor (52).

Abstract: A circuit, integrated circuit, system tor implementation in an integrated circuit, and method of operating such a circuit, integrated circuit, or system are disclosed herein. In one example embodiment, the such a circuit includes a multiplier circuit portion, a first duty cycle correction (DCC) circuit portion, and a clock gating circuit portion. The multiplier circuit portion, DCC circuit portion, and clock gating circuit portion are all coupled in series with one another between an input port and an output port of the circuit. Additionally, the circuit is capable of receiving at the input port a first clock signal having a first frequency and, based at least indirectly upon the first clock signal, outputting a second clock signal having a second frequency that is related by a factor to the first frequency.

Abstract: Electrically conductive barriers for integrated circuits and integrated circuits and methods including the electrically conductive barriers. The integrated circuits include a semiconductor substrate, a semiconductor device supported by a device portion of the substrate, and a plurality of bond pads supported by a bond pad portion of the substrate. The integrated circuits also include an electrically conductive barrier that projects away from an intermediate portion of the substrate and is configured to decrease capacitive coupling between the device portion and the bond pad portion. The methods can include methods of manufacturing an integrated circuit. These methods include forming a semiconductor device, forming a plurality of bond pads, forming a plurality of electrically conductive regions, and forming an electrically conductive barrier. The methods also can include methods of operating an integrated circuit.

Abstract: An operation at a mobile device is authenticated by using a random visual presentation displayed at the device for the authentication. The mobile device generates and displays the random visual presentation which is optically captured (e.g., by a camera) at a capturing device. The capturing device uses the captured random visual presentation to generate an authentication value (e.g., a hash) based on a defined security protocol. The authentication value is compared to an expected value and if the values match the mobile device executes the operation.

Abstract: A semiconductor wafer has a non-uniform array of integrated circuit dies formed on it. Each die is enclosed by a respective seal ring, and each die has a group of bond pads and probe pad coupled to the bond pads. Common electrical interconnects selectively electrically couple together respective probe pads of each of the dies. The common electrical interconnects allow the dies to be tested concurrently before being cut from the wafer.

Abstract: A sensor for providing an output signal that is a function of a sensed capacitance, in a touch interface for example. The sensor includes a charger for repetitively applying first and second voltages to charge the sensed capacitance to first and second charge values in first and second phases respectively. A sampler provides first and second sample signals that are a function of the first and second charge values respectively. An accumulator uses an accumulator signal to provide the output signal. The accumulator repetitively uses the first sample signal incrementally and the second sample signal decrementally in providing the accumulator signal. The accumulator signal is a progressive function of the sensed capacitance but tends to cancel a noise in the first and second sample signals at frequencies less than a repetition rate of operation of the accumulator.

Abstract: A disclosed method of fabricating a hybrid nanopillar device includes forming a mask on a substrate and a layer of nanoclusters on the hard mask. The hard mask is then etched to transfer a pattern formed by the first layer of nanoclusters into a first region of the hard mask. A second nanocluster layer is formed on the substrate. A second region of the hard mask overlying a second region of the substrate is etched to create a second pattern in the hard mask. The substrate is then etched through the hard mask to form a first set of nanopillars in the first region of the substrate and a second set of nanopillars in the second region of the substrate. By varying the nanocluster deposition steps between the first and second layers of nanoclusters, the first and second sets of nanopillars will exhibit different characteristics.