Abstract: The present application relates to a mechanism for managing access to at least one shared integrated peripheral of a processing unit and a method of operating thereof. The mechanism is operative in an available state and a locked state. The mechanism comprises at least one context register and a bus interface for receiving a request. A filtering unit obtains information relating to a context of the received request. If in the available state, a managing unit loads the context register with the obtained context information; and grants access in response to the received request. If in the locked state, the managing unit detects whether the obtained context information matches with the context information stored in the context register; and if the obtained and stored context information match, grants access in response to the received request. Otherwise, access is denied.

Abstract: In an integrated circuit, a first scan chain of flip-flops is loaded with data for testing data retention of the flip-flops and a memory is loaded with data for performing a retention test by a memory built-in self-test (MBIST) wrapper circuit. A portion of the system is placed in a low-power state for a predetermined period of time before data is read from the memory and retention of data by the memory while in the low-power state is determined.

Abstract: A device includes a semiconductor substrate, source and drain regions in the semiconductor substrate and spaced from one another along a first lateral dimension, and a drift region in the semiconductor substrate and through which charge carriers drift during operation upon application of a bias voltage between the source and drain regions. The drift region has a notched dopant profile in a second lateral dimension along an interface between the drift region and the drain region.

Abstract: A MEMS device includes a drive spring system coupling a pair of drive masses and a sense spring system coupling a pair of sense masses. The drive spring system includes a constrained stiff beam and flexures interconnecting the pair of drive masses. In response to drive movement of the drive masses the flexures enable pivotal movement of the constrained stiff beam about its center hinge point to enable anti-phase drive motion of the drive masses and to suppress in-phase motion of the drive masses. The sense spring system includes diagonally oriented stiff beams and a spring system that enable anti-phase sense motion of the sense masses while suppressing in-phase motion of the sense masses. Coupling masses interposed between the drive and sense masses decouple the drive motion of the drive masses from the sense motion of the sense masses.

Abstract: A semiconductor device is provided which comprises an ESD protection device. The structure of the semiconductor device comprises a p-doped isolated region in which a structure is manufactured which operates as a Silicon Controlled Rectifier which is coupled between an I/O pad and a reference voltage or ground voltage. The semiconductor device also comprises a pnp transistor which is coupled parallel to the Silicon Controlled Rectifier. The base of the transistor is coupled to the gate of the Silicon Controlled Rectifier. In an optional embodiment, the base and gate are also coupled to the I/O pad.

Abstract: An acoustic coupling sensor 200 for a portable electronic device is described which includes an acoustic transmitter 22, a reference signal generator 20 coupled to the acoustic transmitter, and an acoustic sensor 24 wherein in operation, the reference signal generator is operable to transmit the reference signal to the acoustic transmitter, to detect an acoustic level of the transmitted reference signal via the acoustic sensor, and wherein the detected reference signal level corresponds to a value of acoustic coupling between the acoustic transmitter and the acoustic sensor. The acoustic coupling sensor may be used for example in a mobile phone to detect acoustic leakage in order to adapt the acoustic level in the mobile phone during use.

Abstract: A power receiver for a wireless power transmission system that includes a power transmitter has input circuitry that converts power received from the power transmitter into an input signal. A regulator regulates the input signal to generate a regulated output signal based on a current reference signal and a voltage reference signal, and a load receives the regulated output signal. The regulator controls at least one of the current reference signal and the voltage reference signal to control power loss within the regulator. In one embodiment, the regulator globally controls the voltage of the rectified input signal and locally controls the current reference signal to limit power loss in the regulator as well as meet system load requirements.

Abstract: A semiconductor die arrangement comprising a first die including at least one semiconductor device; a second die including at least one semiconductor device; a lead frame associated with the first die and comprising one or more lead fingers, wherein the second die is mounted on one of the lead fingers and electrically connected to a further element by a bond wire.

Abstract: A split gate memory array includes a first row having memory cells; a second row having memory cells, wherein the second row is adjacent to the first row; and a plurality of segments. Each segment includes a first plurality of memory cells of the first row, a second plurality of memory cells of the second row, a first control gate portion which forms a control gate of each memory cell of the first plurality of memory cells, and a second control gate portion which forms a control gate of each memory cell of the second plurality of memory cells. The first control gate portion and the second control gate portion converge to a single control gate portion between neighboring segments of the plurality of segments.

Abstract: A semiconductor structure comprising a fuse/resistor structure over a functional layer having a substrate. The fuse/resistor structure includes a via, a first interconnect layer, and a second interconnect layer. The via is over the functional layer and has a first end and a second end vertically opposite the first end, wherein the first end is bounded by a first edge and a second edge opposite the first edge and the second end is bounded by a third edge and a fourth edge opposite the third edge. The first interconnect layer includes a first metal layer running horizontally and contacting the first end and completely extending from the first edge to the second edge. The second interconnect layer includes a second metal layer running horizontally and contacting the second end of the via and extending past the third edge but reaching less than half way to the fourth edge.

Abstract: An amplification stage and a wideband power amplifier are provided. The amplification stage includes a stage input terminal, a stage output terminal, an amplifier, an input compensation network, and in output compensation network. At the stage input terminal is received a signal which is provided via the input compensation network to the amplifier. The input compensation network filters the signal to allow a wideband operation of the amplification stage around an operational frequency. The amplified signal provided by the amplifier is provided via the output compensation network to the stage output terminal. The output compensation network configured to allow a wideband operation of the amplification stage around the operational frequency with a minimal phase shift and distortion of amplitude and phase frequency response. The wideband power amplifier includes a plurality of amplification stage combined with transmission lines or their lumped element equivalents in a specific circuit topology.

Abstract: One example discloses a combination sensor, comprising: a pressure sensor having an actuator which has a first resonant frequency; a cavity, coupled to the pressure sensor and able to receive a substance; wherein the cavity, in an absence of the substance, has a second resonant frequency in response to excitation by the actuator; wherein the cavity, in a presence of the substance, has a third resonant frequency in response to excitation by the actuator; wherein the first resonant frequency differs from the second and third resonant frequencies; and a sensor circuit which outputs a substance detected signal in response to the third resonant frequency in the cavity.

Abstract: An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a Schottky metal layer disposed over the substrate adjacent the gate electrode. The Schottky metal layer includes a Schottky contact electrically coupled to the channel which provides a Schottky junction and at least one alignment mark disposed over the semiconductor substrate. A method for fabricating the semiconductor device includes creating an isolation region that defines an active region along an upper surface of a semiconductor substrate, forming a gate electrode over the semiconductor substrate in the active region, and forming a Schottky metal layer over the semiconductor substrate. Forming the Schottky metal layer includes forming at least one Schottky contact electrically coupled to the channel and providing a Schottky junction, and forming an alignment mark in the isolation region.

Abstract: Disclosed is an integrated circuit for a near-field radio, including an oscillator configured to output a carrier frequency, an inductor capacitor (LC) tank antenna circuit configured to resonate at a resonance frequency, a frequency measuring circuit configured to measure the resonance frequency of the LC tank antenna circuit and compare the resonance frequency to the carrier frequency, and a controller to adjust the frequency of the LC tank antenna circuit to the carrier frequency.

Abstract: A method and apparatus are described for fabricating a microchip structure (70) which protects interior electrical integrated circuits and components (120) attached to a lead frame die flag (104) using a molding compound (124) that mechanically interlocks with one or more positive mold lock structures formed as dummy wire loops (114) or stud bumps (214) that are attached to the lead frame (100) and/or die flag (104).

Abstract: A multi-bit flip-flop includes at least two storage stages. Each of the storage stages includes redundant latches to suppress state corruptions resulting from soft error upset at the storage stage. In addition, the multi-bit flip-flop includes a split clock path that routes different shared clock signals that control the timing of the latches. The shared split clock path reduces or eliminates the impact of soft errors on the clock signals, thereby further limiting the impact of such errors on data stored at the flip-flop. In particular, the split clock path can be distributed over disparate cells in a layout of multi-bit flip-flop, thereby reducing the likelihood that a transient charge will cause a soft error in all paths of the split clock path.

Abstract: System and method for authenticating components of a vehicle are described. In an embodiment, a method for authenticating components of a vehicle involves transmitting an interrogation signal to tags attached to the components of the vehicle from an authentication base station in response to a trigger event, comparing an authentication code received from each of responding tags with an authentication code key at the authentication base station to authenticate the responding tags, and transmitting a disengage signal to an immobilizer installed in the vehicle from the authentication base station to enable the vehicle if all the tags have been authenticated. Other embodiments are also described.

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

Abstract: A method for operating an RFID device is disclosed. In the embodiment, the method involves establishing a radio-frequency link, receiving signal samples of the radio-frequency link, determining the offset of an initial phase of the link by filtering noise from the signal samples, windowing the filtered signal samples, and calculating an offset value from phase differences between the windows of signal samples, and modifying a configuration profile based on the offset value. During data transmission the configuration profile can be used to configure the transmitter in order to maintain the constant phase during transmission.

Abstract: Certain exemplary aspects of the present disclosure are directed toward an apparatus in which a first circuit communicates with a plurality of different types of RFID transponders using radio frequency signals. A second circuit detects and communicates with the plurality of different types of RFID transponders via the first circuit, respectively using a command set for the type of RFID transponder that the first circuit is communicating with. The second circuit, in response to detecting an RFID transponder having configuration data for a new command set, accesses and uses the configuration data for the new command set to update a configuration of the second circuit to enable communication with the new type of RFID transponder.