Patents Assigned to NXP
  • Patent number: 9680003
    Abstract: A recess is formed at a semiconductor layer of a device to define a plurality of mesas. An active trench portion of the recess residing between adjacent mesas. A termination portion of the trench residing between the end of each mesa and a perimeter of the recess. The transverse spacing between the mesas and the lateral spacing between the mesas and an outer perimeter of a recess forming the mesas are substantially the same. A shield structure within the trench extends from the region between the mesas to the region between the ends of the mesas and the outer perimeter of the recess forming the mesas. A contact resides between a shield electrode terminal and the shield portion residing in the trench.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Ganming Qin, Edouard D. De Fresart, Pon Sung Ku, Michael F. Petras, Moaniss Zitouni, Dragan Zupac
  • Patent number: 9678531
    Abstract: A timer distribution module supports multiple timers and comprises: a command decoder arranged to determine expiration times of a plurality of timers; and a timer link list distribution adapter, LLDA, operably coupled to the command decoder. The LLDA is arranged to: receive a time reference from a master clock; receive timer data from the command decoder wherein the timer data comprises at least one timer expiration link list; construct a plurality of timer link lists based on at least one of: the timer expiration link list, at least one configurable timing barrier; dynamically split the link list timer data into a plurality of granularities based on the timer expiration link list; and output the dynamically split link list timer data.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 13, 2017
    Assignee: NXP USA, INC.
    Inventors: Ron Bar, Evgeni Ginzburg, Eran Glickman
  • Patent number: 9679173
    Abstract: Certain exemplary aspects of the present disclosure are directed toward an apparatus in which a first circuit communicates with a plurality of different types of RFID transponders using radio frequency signals. A second circuit detects and communicates with the plurality of different types of RFID transponders via the first circuit, respectively using a command set for the type of RFID transponder that the first circuit is communicating with. The second circuit, in response to detecting an RFID transponder having configuration data for a new command set, accesses and uses the configuration data for the new command set to update a configuration of the second circuit to enable communication with the new type of RFID transponder.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventor: Christian Weidinger
  • Patent number: 9680528
    Abstract: Aspects of the present disclosure are directed to circuits, apparatuses and methods for communicating data between capacitive-isolated devices. According to an example embodiment, an apparatus includes a transmitter circuit configured to transmit a first single-ended data signal over a first signal path. The apparatus also includes a receiver circuit. The receiver circuit includes a differential amplifier having a first input coupled to receive a second single-ended signal from a second signal path of the plurality of signal paths and includes a second input coupled to receive a reference signal from a third signal path of the plurality of signal paths. The differential amplifier outputs a third single-ended signal indicative of a voltage difference between the first and second inputs. The receiver circuit also includes a common mode suppression circuit configured to remove a common mode voltage from the first and second inputs of the differential amplifier.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventor: Rameswor Shrestha
  • Patent number: 9676611
    Abstract: Sensor device packages and related fabrication methods are provided. An exemplary sensor device package includes a first structure having a sensing arrangement thereon, a second structure having circuitry thereon, and a conductive structure within the first structure and coupled to the circuitry to provide an electrical connection to the circuitry through the first structure. Thus, circuitry on the second structure may be electrically connected to an interface of the sensor device package through the first structure.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Stephen R. Hooper, Philip H. Bowles
  • Patent number: 9680442
    Abstract: A circuit for tuning an impedance matching network is disclosed. The circuit includes a current sensor, a control circuit coupled to the current sensor and a reference current source and a tunable capacitor coupled to the control circuit. The control circuit is configured to generate a control signal based on an output of the current sensor, wherein the control signal is configured to vary a capacitance of the tunable capacitor.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Anton Salfelner, Javier Mauricio Velandia Torres
  • Patent number: 9678111
    Abstract: A system can provide current detection in an integrated circuit (IC) chip while compensating for variations in circuit components resulting from process, voltage supply, temperature, or combinations thereof. The system can include the IC chip that has a power switch circuit that includes a power circuit path including a first transistor connected to a power source through a first conductive trace that has a first resistance value, and to a load by a second conductive trace having a second resistance value. A current detection circuit is configured to compensate for the variations in the power switch circuit using a sense circuit path that is configured to match process, voltage supply, and temperature variations in the power circuit path.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Siamak Delshadpour
  • Patent number: 9679541
    Abstract: A display system and a method of displaying an image are hereby presented. The display system is arranged to display an image on a screen which has at least one useful screen area which is intended to be seen by a user and at least one non-useful screen area which the user cannot see. The display device comprises a bandwidth saver unit arranged to determine a location on the screen of a current pixel to be displayed. If the pixel is located in a non-useful screen area of the screen, then the fetching from a data memory of a pixel value is inhibited by the bandwidth saver unit with respect to this pixel, and a replacement, fixed pixel value is passed to a data processing unit for further processing.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Vincent Aubineau, Daniel McKenna, Michael Andreas Staudenmaier
  • Patent number: 9680495
    Abstract: A data conversion system and method are described. A first phase locked loop includes a controllable frequency oscillator circuit to receive a digital data stream and output a reference frequency signal, and includes an oscillator and at least one variable load connected to the oscillator which is controllable to tune the oscillator frequency and vary the frequency of the reference frequency signal. A second phase locked loop includes a divide by N function in a feedback loop (where N has an integer value), and receives the reference frequency signal and outputs a recovered clock signal corresponding to an original clock signal associated with the digital data stream. The recovered clock signal is used to clock a data converter to convert the digital data into an analog output signal.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Frank Leong, Erwin Janssen
  • Patent number: 9678899
    Abstract: A method for providing memory protection within a signal processing system comprises receiving a memory access signal comprising at least one instruction memory region (IMR) indication. The IMR indication comprises an indication of a region of memory from which a memory access instruction was fetched, execution of said memory access instruction having resulted in the generation of the received memory access signal. The method further comprises comparing the IMR indication for the received memory access signal to at least one permitted memory region (PMR) indication for a target address of the received memory access signal, and determining whether a memory access being attempted by the memory access signal is permitted based at least partly on the comparison of the IMR indication for the received memory access signal to the PMR indication for the target address of the received memory access signal.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: June 13, 2017
    Assignee: NXP USA, INC.
    Inventors: Gerard William Humphries, Alistair Paul Robertson
  • Patent number: 9679526
    Abstract: A display system and a method of displaying a separate image on each one of at least two N-bit screens simultaneously, are hereby presented. The display system comprises at least two data processing units arranged for controlling the display of pixels on the corresponding N-bit screen, and a single merger block arranged for receiving pixel data from each respective data processing unit and for transmitting said pixel data to the corresponding N-bit screen. The merger block comprises a multiplexer unit arranged for selectively coupling one of the data processing units to an output of the merger block, a selection unit arranged for driving the multiplexer unit, and a clock generating unit adapted for generating at least one clock signal and for shifting the at least one generated clock signal compared to a main clock signal, the main clock signal and the generated clock signal being used to clock one of the N-bit screens, respectively.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Vincent Aubineau, Guillaume Perret, Michael Andreas Staudenmaier
  • Patent number: 9678564
    Abstract: An intelligent interrupt distributor balances interrupts (workload) in a highly parallelized system. The intelligent interrupt distributor distributes the interrupts between the processor cores. This allows lowering of voltage and frequency of individual processors and ensures that the overall system power consumption is reduced.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Hamed Fatemi, Ajay Kapoor, Jose de Jesus Pineda de Gyvez, Juan Diego Echeverri Escobar
  • Patent number: 9680429
    Abstract: An amplifier system is described. The amplifier system may amplify an audio signal transmitted via a connected loudspeaker in a first mode of operation. In a second mode of operation the amplifier system may amplify a signal generated by the loudspeaker operated in reverse as a microphone. Because a loudspeaker is less sensitive than a microphone the amplifier system may be used to acquire audio at high sound pressure levels for example at a concert or while making a phone-call in a noisy environment for example with a high level of wind noise.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Marco Berkhout, Armand Stuivenwold
  • Patent number: 9680011
    Abstract: A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate to isolate the device, a drain region disposed in the semiconductor substrate and to which a voltage is applied during operation, and a depleted well region disposed in the semiconductor substrate, and having a conductivity type in common with the doped isolation barrier and the drain region. The depleted well region is positioned between the doped isolation barrier and the drain region to electrically couple the doped isolation barrier and the drain region such that the doped isolation barrier is biased at a voltage level lower than the voltage applied to the drain region.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Zhihong Zhang, Daniel J. Blomberg, Xu Cheng, Xin Lin, Hongning Yang, Jiang-Kai Zuo
  • Patent number: 9680453
    Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing oscillator circuits. In certain embodiments, an apparatus includes an oscillator circuit having one or more capacitors. The oscillator circuit is configured to generate an oscillating signal by repeated charging and discharging of the capacitors. The apparatus also includes a control circuit connected to the oscillator. The control circuit is configured to set the oscillation frequency of the oscillator circuit as a non-linear function of an input control signal. For instance, in a more specific embodiment, the control circuit may be configured to set oscillation frequency of the oscillator circuit to a frequency scaled by a value raised to an exponent specified by the input control signal.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Pedro Barbosa Zanetta, Andre Luis Vilas Boas
  • Patent number: 9678870
    Abstract: A diagnostic apparatus comprises a diagnostic data buffer constituting a volatile memory, and a non-volatile memory capable of receiving data from the buffer. A data buffer controller is also provided and is operably coupled to the buffer and has an event alert input and a data channel monitoring input for receiving diagnostic data. The buffer receives, when the state of a buffer status memory indicates that the buffer is in an unprotected state, at least part of the diagnostic data received by the controller via the data channel monitoring input to the buffer and the controller sets the state of the buffer status memory to indicate the protected state in response to receipt of an event alert received via the event alert input. A controller monitors the buffer status memory and copies a portion of the buffer to the non-volatile memory in response to the buffer status memory being set to be indicative of the protected state.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Clemens Roettgermann, Dirk Moeller
  • Patent number: 9680605
    Abstract: A method and apparatus are provided for computing a CRC value for a data stream packet with a modified portion and an unmodified portion extending a distance to the end of the data stream packet by computing a first CRC value from the unmodified portion, computing a second CRC value from the modified portion, adjusting the second CRC value based on a shift length equal to the distance of the unmodified portion to compute a perspective shifted second CRC value by using a fixed number of distance lookup table operations, and generating an updated CRC value from the first CRC value and perspective shifted second CRC value, thereby avoiding recalculating a complete CRC value based on an entirety of the data stream packet.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Eric Englert, Bernard Marchand, John F. Pillar
  • Patent number: 9679117
    Abstract: A system and method for obtaining an authorization key to use a product utilizes a secured product identification code, which includes a serial number and at least one code that is generated based on a cryptographic algorithm.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Ralf Malzahn, Hauke Meyn
  • Patent number: 9679857
    Abstract: Disclosed is a semiconductor device comprising a stack of patterned metal layers separated by dielectric layers, the stack comprising a first conductive support structure and a second conductive support structure and a cavity in which an inertial mass element comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Matthias Merz, Youri Victorovitch Ponomarev, Mark van Dal
  • Patent number: 9674196
    Abstract: A device includes a receiver configured to receive a request to perform a function. A secure element connected with the receiver, the secure element to verify the request to perform the function, where the secure element is configured to operate in either a report mode or a silent mode. Details about a status of the performance of the function are displayed when the device operates in the report mode, and no details about the status of the performance of the function are displayed when the device operates in the silent mode.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: June 6, 2017
    Assignee: NXP B.V.
    Inventors: Jacob Mendel, Alexander Potievsky, Eyal Webber-Zvik