Abstract: A real-time distributed network slave module is described. The real-time distributed network slave module comprises a first communications component arranged to transmit and receive real-time distributed network data over at least a first real-time distributed network connection, at least one further communications component arranged to transmit and receive real-time distributed network data over at least one further real-time distributed network connection, and at least one processing component.

Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

Abstract: A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.

Abstract: A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions of an electronic circuit within the integrated circuit in response to a momentary signal applied to the probe pad, a first inverter (221) having an input coupled to the probe pad and having an output coupled to a control input of the transmission gate, and a second inverter (222) having an input coupled to an output of the first inverter and having an output coupled to another control input of the transmission gate. The output of the second inverter is coupled to the input of the first inverter. Upon power-up, the transmission gate is open. After the momentary signal is applied to the probe pad, the transmission gate closes and remains closed until power is disconnected.

Abstract: One example discloses an acoustic pairing device, comprising: an acoustic processor configured to receive a first acoustic signal and a second acoustic signal; a signal comparison module configured to identify a propagation delay or amplitude difference between the first and second acoustic signals; and a pairing module configured to output a pairing signal if the propagation delay or amplitude difference is between a first value and a second value. Another example discloses a method for acoustic pairing between a first device and a second device, executed by a computer programmed with non-transient executable instructions, comprising: receiving a propagation delay or amplitude difference between a first acoustic signal and a second acoustic signal; pairing the first and second devices if the propagation delay or amplitude difference is between a first value and a second value.

Abstract: A system comprises a mechanical resonator; an analog circuit operably coupled to the mechanical resonator; the analog circuit arranged to receive a mechanical resonator measurement signal and to output a mechanical resonator actuation signal to the mechanical resonator; and a digital actuator operably coupled to the analog circuit and configured to provide a frequency sweep of signals to the analog circuit that induces movement of the mechanical resonator.

Abstract: An integrated circuit includes a substrate, a master system on the substrate, a slave system on the substrate that is coupled to communicate with the master system, a first clock signal coupled to the master system, and a second clock signal coupled to the slave system. The master system is configured to isolate the slave system from the master system while a first test of the master system is conducted in parallel with a second test of the slave system. The master system uses the first clock signal during the first test and the slave system uses the second clock signal during the second test.

Abstract: A system for managing a population of RFID tags where the system may include: an interrogator configured to transmit a select command to the population of RFID tags, and at least one modified tag in the population of RFID tags. The select command may include information specifying a memory location. The modified tag may include a memory configured with a memory address corresponding to the memory location specified by the select command, and a controller configured to perform at least one action upon the at least one modified tag receiving the select command. The at least one action may be based on the memory location specified by the select command.

Abstract: A system and method of locating a key are disclosed. The key is configured to communicate with a base station through a plurality of antennas that are coupled to the base station. The method includes turning off each of the plurality of antennas, turning on one of the plurality of antennas, measuring a first received signal strength, turning off the one of the plurality of antennas and measuring a second received signal strength. The key is determined to be located within a predefined area if the difference between the first received signal strength and the second received signal strength is above a preset threshold.

Abstract: An apparatus comprising: a lower-layer decoder configured to decode a data stream formatted according to a lower-layer protocol that interleaves portions of a first data stream and one or more additional data streams to produce separated data streams comprising the first data stream and separately the one or more additional data streams; and a higher-layer decoder configured to decode the first data stream formatted according to a higher-layer protocol to produce trace data, the higher-layer decoder comprising: synchronization logic configured to process the first data stream to detect a data pattern within the first data stream as a synchronization event; and decoding logic configured to use the synchronization event to synchronize decoding of the received first data stream to produce the trace data.

Abstract: A reconfigurable Doherty power amplifier includes a packaged power splitter device, main and peaking amplifiers, and a combiner circuit. The power splitter device includes a power divider, input terminals coupled to first and second ports of the power divider, and output terminals coupled to third and fourth ports of the power divider. One of the input terminals is coupled to an RF signal input terminal, and the other input terminal is terminated. The power divider receives an input RF signal, and produces main and peaking RF signals at the third and fourth ports of the power divider, respectively. The main and peaking amplifiers amplify the main and peaking RF signals, respectively. The combiner circuit includes a summing node and a phase delay element between outputs of the main and peaking amplifiers. An RF signal output terminal is coupled to the summing node.

Abstract: A diode includes a semiconductor substrate having a surface; a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type; and a second contact region disposed at the surface, laterally spaced from the first contact region, and having a second conductivity type. The diode also includes a buried region disposed in the semiconductor substrate vertically adjacent to the first contact region, having the second conductivity type, and electrically connected with the second contact region; and an isolation region disposed at the surface between the first and second contact regions. The diode also includes a separation region disposed at the surface between the first contact region and the isolation region, the separation region formed from a portion of a first well region disposed in the semiconductor substrate that extends to the surface.

Abstract: The embodiments described herein provide a die crack detector and method that use a conductive trace arranged to at least substantially extend around a perimeter of an integrated circuit die. A one-time programmable element, such as a fuse, is coupled in series with the conductive trace, and a package lead is electrically coupled to both the fuse and another operational element on the integrated circuit die. With the fuse intact the package lead can thus be used to determine a measurement of the conductivity of the conductive trace, with the measurement of conductivity indicative of the presence of a crack on the die. After such testing the fuse can be electrically opened, and the package lead used for normal operation of the device on the packaged die without the conductive trace interfering with this operation.

Abstract: A wireless charging system is disclosed. The wireless charging system includes a coil to create electromagnetic field and a sniffer system to detect a presence of a low frequency (LF) signal. The sniffer system is configured to deactivate the coil for a predetermined duration and perform an operation to detect the presence of the LF signal.

Abstract: A power management circuit and a method for operating a power management circuit are described. In one embodiment, a power management circuit includes power switching modules. Power is supplied to each of the power switching modules by at least one of multiple power sources. Each of the power switching modules includes a latch circuit configured to have a definite state at power-up of a corresponding power source and a logic circuit configured to control power supplied from the corresponding power source in response to the definite state of the latch circuit, where the logic circuit includes a cross-coupled circuit. Other embodiments are also described.

Abstract: A system for tuning an impedance network for optimal signal strength is disclosed. The system includes a test tone generator, a radio frequency (RF) receiver, a received signal strength indicator (RSSI) coupled to the RF receiver and a controller coupled to the RSSI. The controller is configured to output a control signal based on a RSSI value measured by the RSSI.

Abstract: The present invention relates to a circuit arrangement for processing a digital video stream, the circuit arrangement comprising: an input interface for receiving a digital video stream, a processing circuit which is arranged to process the digital video stream, a hang-up detecting circuit for detecting a fault in the processed digital video stream, the hang-up detecting circuit comprising: a checksum generating circuit which is arranged to generate checksums for the frames of the processed digital video stream, a memory for storing generated checksums and an analyzing device arranged to compare a currently generated checksum to a plurality of corresponding checksums of preceding frames stored in the memory and to generate an error signal if at least one predefined amount of compared checksums are matching. The present invention also relates to a digital video system, a method for processing a digital video stream and a computer readable program product.

Abstract: A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array (310) designed for direct attachment to an array of integrated circuit die (306) by including a thermal interface adhesion layer (308) to each die (306) and encapsulating the attached heat spreader lid array (310) and array of integrated circuit die (306) with mold compound (321) except for planar upper lid surfaces of the heat spreader lids (312).

Abstract: A method for forming a semiconductor structure includes forming a first metal layer over a first dielectric layer, forming a first graphene layer on at least one major surface of the first metal layer, and forming a second dielectric layer over the first metal layer and the first graphene layer. The method further includes forming an opening in the second dielectric layer which exposes the first metal layer, forming a second metal layer over the second dielectric layer and within the opening, and forming a second graphene layer on at least one major surface of the second metal layer, wherein the second graphene layer is also formed within the opening.

Abstract: A matching network and method for matching a source impedance to a load impedance is provided. A bias feed microstrip structure is coupled to a direct current (DC) voltage source and has a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of an input signal. A harmonic impedance transformation network can be configured to compensate for parasitic reactances of a precursor element. A tuned impedance element presents a short circuit impedance at the second harmonic impedance transformation network terminal for harmonic frequency components and presents a higher impedance for the fundamental frequency component. A fundamental impedance transformation network is configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of a load. Multiple instances of the harmonic impedance transformation network and the tuned impedance element can be provided.