Abstract: A method of manufacturing a transponder (1) where a transponder IC (2) comprising two IC contacts (7, 8) is brought into communication-capable connection, via each time one of the IC contacts (7, 8), with one of two transmission element strips (13, 14) provided on a tape-like carrier (11) of an intermediate product (12), the intermediate product (12) then being cut through along cutting zones (16) extending perpendicularly to the longitudinal direction of the carrier and the transponder IC (2) being connected to the portion of the intermediate product (12) located between two cutting zones (16).

Abstract: A method and a device are proposed for the synchronization of a radio transmitter and a radio receiver, notably for UMTS, while utilizing a Golay correlator, which synchronization should be performed reliably without imposing severe requirements as regards the frequency stability of the local oscillator. To this end, absolute value squaring B1, B2 is performed in the Golay correlator already prior to the last delay stages (D7, D8).

Abstract: In the case of an electro-acoustic apparatus (1) having a housing (2) with a housing wall (9) and having an electro-acoustic transducer (17) that is arranged facing the housing wall (9), a front chamber volume (31) that forms an acoustic spring is provided between the transducer (17) and the housing wall (9), and in the housing wall (9) a sound outlet aperture (14, 15) that preferably forms an acoustic mass is provided, wherein between the front chamber volume (31) and the sound outlet aperture (14, 15) a sound guide channel (38, 39) is provided, which forms a sufficiently large acoustic mass in order jointly with the front chamber volume (31) to achieve a satisfactory band-pass characteristic of the sound pressure frequency response of the transducer (17).

Abstract: The present invention discloses a method of forming a double gate field effect transistor device, and such a device formed with the method. One starts with a semiconductor-on-insulator substrate, and forms a first gate, source, drain and extensions, and prepares the second gate. Then the substrate is bonded to a second carrier, exposing a second side of the semiconductor layer. Next, an annealing step is performed as a diffusionless annealing, which has the advantage that the semiconductor layer not only has a substantially even thickness, but also has a substantially flat surface. This ensures the best possible annealing action of said annealing step. Very sharp abruptness of the extensions is achieved, with very high activation of the dopants.

Abstract: Three-phase mixer-systems comprising at least three groups of mixers (1-4,5-8,9-12,30) for frequency translating signals are (basic idea) provided with balancing means (13-21,31) for suppressing certain mixing products with harmonics of the oscillator signal resulting from unbalance (insight). Said three groups of mixers (1-4,5-8,9-12) each comprise a group of switching transistors (1-3,5-7,9-11) and an amplifying transistor (4,8,12) coupled to said group of switching transistors (1-3,5-7,9-11) and are balanced by said balancing means (13-21) comprising per group of mixers (1-4,5-8,9-12) and per at least one switching transistor of said group of switching transistors (1-3,5-7,9-11) a further switching transistor (13-21).

Abstract: A semiconductor device comprises a gate electrode (1) and a gate insulating layer (2) both surrounded by a spacer (3) and produced on a surface (S) of a substrate (100) of a first semiconductor material. The device also comprises a source region (4) and a drain region (5) both situated below the surface of the substrate, respectively on two opposite sides of the gate electrode (1). The source region and the drain region each comprise a portion of a second semiconductor material (6, 7) disposed on the substrate (100) and extending between the substrate (100) and the spacer (3). The second material has a melting point lower than the melting point of the first material. The portions of second material (6, 7) constitute extensions of the source (4) and drain (5) regions. The semiconductor device can be an MOS transistor.

Abstract: An apparatus that contains an instruction processing circuit (14), a main memory (18) addressable by the instruction processing circuit (14) and a cache memory (16). In a normal mode the cache memory (16) is used to cache a part of data and/or instructions that the instruction processing circuit (14) addresses in the main memory (18) during execution, and to substitute cached data and/or instructions when the instruction processing circuit (14) addresses the data and/or instructions in the main memory (18). The circuit is able to switch to a low power operating mode. Upon the switch an interrupt program for executing a function during operation in the low power operating mode is loaded into the cache memory (16) from the main memory (18). Power supply to the main memory (18) is then switched off, but keeping at least a part of the cache memory (16) continuous to receive power supply.

Abstract: A wireless terminal a transceiver coupled to an antenna feed and a ground conductor (502), the antenna feed being coupled directly to the ground conductor (502). In one embodiment the ground conductor is a conducting case (902). The coupling is via a parallel plate capacitor formed by a respective plate (506) and a portion of the surface of the case (502). The case (502) acts as an efficient, wideband radiator, eliminating the need for separate antennas. Slots (912, 1214) perform a matching function, eliminating the need for matching between the transceiver and antenna feed.

Abstract: An electro-acoustic resonator (1, 8, 17) of the membrane or FBAR type (1) or the solidly-mounted or SBAR type (8), with electrodes comprising a single conducting layer or multiple conducting layers, i.e. sandwich construction (17) with an optimum coupling factor kr and thus an improved filter bandwidth. The optimum coupling factor kr is achieved by the arrangement that the top electrode (6, 15, 25) is thinner than the bottom electrode (4, 13, 23). The coupling factor is independent of the resonator's layout defined by the mask.

Abstract: A power conversion circuit for a switched mode power supply (SMPS) 11 is arranged to be switchable between a normal mode of operation and a burst standby mode of operation. In an embodiment, the SMPS 11 comprises an AC/DC stage having a primary (input) side and a secondary (output) side of a transformer 12. A switched mode power stage has a controller 15 on the primary side for controlling the switching of power to the secondary side. The controller 15 has a control input 3 for receiving feedback signals from a feedback circuit 50 on the secondary side of the transformer 12. The SMPS 11 comprises an opto coupler 20 arranged to communicate to the control input 3 of the controller 15 a feedback signal which indicates the start and the end of a switching cycle in the burst mode. Advantageously, this allows the SMPS 11 to react quicker to loads applied when in the burst standby mode.

Abstract: Methods and apparatus for implementing and operating pulse width modulation based LED dimmer controllers are described. A synchronization protocol is used to allow control information for the dimmer operations to be transferred to the PWM dimmer control clock domain from an external clock domain, such that visual artifacts are prevented when the control information is updated. Control information may be transferred to the LED dimmer controller via an I2C serial bus, and the synchronization protocol waits for an I2C STOP condition before updating control information across clock domain boundaries. The leading and trailing edges of an asserted group dimmer control signal are generated such that the active portion of the group dimmer control signal overlaps the active portion of individual LED pulse width modulated control signals. In this way, the pulse width modulation of the individual LED control signals is not cut off, or reduced in width by the group dimmer signal.

Abstract: The present invention relates to an integrated circuit (DEC V) for processing a plurality of data samples (P) of a data signal (I), wherein said integrated circuit is associated with a counter (CT) and comprises means (SIGN M) for computing a signature, said counter (CT) being adapted to trigger and stop a computation of a signature of said data signal (I), said signature being recalculated each time a data sample (P) of said data signal is output by said integrated circuit (DEC V). Use: Video decoder in a set-top-box.

Abstract: An integrated tuner circuit has an arbitrary IF (intermediate frequency) output. The tuner includes an integrated circuit with a fixed-frequency control loop and a matched external variable capacitance Ct, to achieve tracking of a tuned LC band-pass filter with an arbitrary oscillator.

Abstract: The invention relates to an electronic circuit including a sub-module assembly (2) connected to the rest of the circuit, the sub-module assembly including a secret sub-module (4) for performing a function, scan chains; a built-in self test circuit including a pattern generator (5) to apply input signals to the scan chains, and a signature register (6) to check output signals from the scan chains. In order to keep the sub-module secret, the scan chains are not connected to the rest of the circuit.

Abstract: A selector (502) for selecting a background motion vector for a pixel in an occlusion region of an image, from a set of motion vectors being computed for the image, comprises: computing means (510) for computing a model-based motion vector for the pixel on basis of a motion model being determined on basis of a part of (402-436) a motion vector field (400) of the image; comparing means (511) for comparing the model-based motion vector with each of the motion vectors of the set of motion vectors; and selecting means (512) for selecting a particular motion vector of the set of motion vectors on basis of the comparing and for assigning the particular motion vector as the background motion vector.

Abstract: Recently, the use of class D audio amplifiers has become more and more widespread. In contrast to the generally employed class AB linear amplification technology, class D allows for improved efficiency. However, the class D principle is known for its poor distortion characteristics. According to the present invention, switching delays of the end stage (6) are measured and used for compensating distortions caused by the dead time of the end stage (6). This is done by modifying the switching delay of the power stage. In this way, the output pulse duration is corrected to reflect the input duty cycle. Advantageously, variations in the switching-time due to device property spread, aging, current and temperature may be compensated.

Abstract: A receiver can handle different types of reception signals, such as, for example, TV and FM-radio signals. In the receiver, a mixer (MIX) mixes a reception signal with an oscillator signal (OOS) so as to obtain a mixer output signal (MOS), which comprises a frequency-shifted version of the reception signal. An intermediate frequency amplifier (IFAMP) applies an amplified mixer output signal (MOSA) to two different intermediate frequency filters: one for first type reception signals and another for second type reception signals. A switchable coupling section (DBTP, SWA) is coupled between the mixer (MIX) and the intermediate frequency amplifier (IFAMP). The switchable coupling section (DBTP, SWA) is switchable to a first state and a second state. In the first state, the mixer output signal (MOS) substantially reaches an input (IAD) of the intermediate frequency amplifier (IFAMP) via a first coupling path (DTBP).

Abstract: A technique for communicating multimedia data between nodes over coaxial cable, wherein the nodes are connected via a coaxial cable network, is disclosed. In an embodiment, the technique involves establishing a primary channel for communicating between first and second nodes of the coaxial cable network, establishing a secondary channel for communicating between the first and second nodes of the coaxial cable network, wherein the primary and secondary channels are in different frequency bands and wherein the primary channel is used for communicating media access control frames, and communicating a time series of data frames between the first and second nodes using both the primary channel and the secondary channel.

Abstract: The invention provides a method of cleaning the surface (3) of a wafer (1), comprising a hot rinse step in which the wafer (1) is at a temperature that is at least 100C higher than room temperature, the wafer (1) is rotated around an axis perpendicular to the wafer surface (3) and water is dispensed on the wafer surface (3). Thereafter a first drying step is performed in which the wafer (1) is rotated around the axis perpendicular to the wafer surface (3) and in which the humidity of the environment is such that the water on the wafer surface (3) is partially removed while the wafer surface (3) remains covered with a film of water (13). The first drying step is followed by a second drying step, which removes the film of water (13) from the wafer surface (3). The method according to the invention advantageously reduces metal ion contamination on the wafer surface (3).