Abstract: In an I2C bus, an edge rate control for an output slows the falling edge of a signal. In an example embodiment, there is an edge rate control circuit for use in an I2C bus. The circuit comprises a resistor divider having a first terminal, a divider terminal, and a second terminal. There is a first NMOS transistor having a source, drain, and gate terminal and a first PMOS transistor having a source, drain, and gate terminal; the source terminals of the first NMOS and first PMOS transistors are coupled to one another; the drain terminal of the first PMOS transistor is coupled to the divider terminal of the resistor divider; the gate of the first PMOS transistor is coupled to the second terminal of the resistor divider; and the drain of the first NMOS transistor is coupled to ground.

Abstract: A system, apparatus and methods are described that identify a maximum cyclic delay and corresponding cyclic prefix for a multi-path communications channel. In one embodiment, the maximum cyclic delay (245) is identified based on a relationship between a selected covariance bandwidth (235) and RMS delay (240) of the OFDM channel.

Abstract: A transistor (1) has a FET (2) and a temperature sensing diode (4) integrated within it. Gate drive circuit (12) is arranged to switch off FET (2) and in this case biasing circuit (14) drives a constant current through the diode (4). The voltage across the diode (4) is measured by voltage sensor (15) which provides a measure of the temperature of the FET.

Abstract: An apparatus comprises a memory with a matrix (10) with rows and columns of memory cells. A read access circuit (14, 16, 18) executes a read command to read a retrieval unit comprising data from a row of the memory cells from the matrix (10) and to output data from the retrieval unit. A processing circuit (12) coupled to the read access circuit (14, 16, 18) is configured to execute an extra read operation involving issuing the read command, receiving the extra data (24), performing error detection on only the extra data (24), using an error detecting code in which the extra data is coded, conditionally performing error correction on the data from the extra data (24) using data from the retrieval unit including the payload data (22), according to an error correcting code in which the retrieval unit is coded, if the error detection indicates an error in the extra data (24).

Abstract: The present invention relates to a double data rate interface and method for use between a processor and random access memory, comprising a delay line including means for creating a delay in a data strobe signal from the random access memory, the delay line being arranged such that the delay in the data strobe signal is equal to the sum of set-up time and data bus rise time. The interface of includes the delay line comprising the delay locked loop which in turn comprises a ring oscillator. The ring oscillator includes a buffer and a Vernier delay.

Abstract: A latch circuit comprising, a differential input with a non-inverting input (D+) and an inverting input (D?). The latch further comprises a differential output with a non-inverting output (Q+) and an inverting output (Q?). One of the outputs (Q?) is coupled to one of the inputs input (D+) having an opposite polarity. The latch further comprises a control input for receiving a control signal (VcM) for determining a threshold for an input signal (In) such that if the input signal is at larger than the threshold the non-inverting output is in a HIGH logic state and in a LOW state if the input signal is smaller than the threshold.

Abstract: In a method and an arrangement for processing a skin print image, and particularly a fingerprint image, which image exists as a gray-level image, provision is made for the gray-level image to be convolved in the direction of two axes (x, y) by generalized gradient filters (Gx, Gy), for the generalized gradients (Bx, By) obtained in this way to be normalized, for the normalized, generalized gradients (Cx, Cy) each to be convolved with generalized gradient filters (Qx, Qy), and for the sum (D) of the two results (Dx, Dy) of the convolution of the normalized, generalized gradients (Cx, Cy) to be converted to binary form.

Abstract: In order to further develop a magnetoresistive sensor device (100; 100?; 100?) comprising at least one substrate or wafer (10), in particular at least one silicon wafer, and at least one sensing element (30), in particular at least one A[nisotropic]M[agneto]R[esistive] sensing element and/or—at least one G[iant]M[agneto]R[esistive] sensing element, for example at least one multi-layer G[iant]M[agneto]R[esistive] sensing element, said sensing element (30) being arranged on and/or under the substrate or wafer (10), as well as a corresponding method of fabricating such magnetoresistive sensor device (100; 100?; 100?) in such way that an external or extra bias magnetic field to preset the sensing element (10) and/or the magnetoresistive sensor device (100; 100?; 100?) can be dispensed with, it is proposed to arrange at least one magnetic layer (20t, 20b) on (20t) and/or under (20b) the substrate or wafer (10) and at least partially on (20t) and/or under (20b) the sensing element (30), said magnetic layer (20t, 20

Abstract: In order to further develop a circuit arrangement (100; 100?; 100?) as well as a corresponding method for controlling and/or for preventing injection current, said method comprising—switching at least one transistor means (20; 20?) between at least one enabled state and at least one disabled state in dependence on the signal level of at least one voltage and/or current signal, and—transmitting at least one analog and/or digital signal from at least one first pin (pin1) to at least one second pin (pin2) via at least one conductive channel (12, 14) in the enabled state of the transistor means (20; 20?), in such way that minimal disturbance due to unwanted current signals and/or due to unwanted is ensured, in particular that the MOS effect as well as the bipolar effect are prevented in the circuit arrangement (100; 100?; 100?), it is proposed—to prevent the transistor means (20; 20?) from starting to conduct due to being provided with at least one unwanted signal in its disabled state, and to prevent transmissio

Abstract: A radio apparatus (400) comprises first and second antennas (42,44), a first transceiver (40) having a first transmitter (60) and a first receiver (61), a second receiver (62), a switching means (45, 46) arranged to provide selectable first and second states, and a control means (50) adapted to select between the first and second states for simultaneous transmission by the first transmitter (60) and reception by the second receiver (62). The switching means (45, 46) enables the first transmitter (60) to be coupled to either one of the first and second antennas (42, 44) and simultaneously the second receiver (62) to be coupled to the other of the antennas (42, 44), but prohibits coupling of both the first transmitter (60) and the second receiver (62) to a common antenna (42 or 44).

Abstract: An integrated circuit comprises a plurality of data processing circuits (10) and a communication network (12) coupled between the data processing circuits (10). The communication network (12) comprises connections (122) and router circuits (120) coupled between the connections (122). Memory is provided to store definitions for respective data streams, of respective paths along the connections (122), for controlling the router circuits (120) to transmit each data item from each respective data stream along the respective path programmed for that respective data stream. Initially initial paths for a set of original data streams are defined and started. Subsequently an additional data stream can be added. If so a new path is selected in combination with future paths for the original data streams.

Abstract: The invention relates to a compensation circuit for filters of a video signal receiver. To compensate a non-linear amplification of a small signal in dependence upon the control of a large signal which is superimposed on the small signal, the invention proposes to detect the control of the large signal and to vary the working point of the filter in dependence upon the control of the large signal. Since the filter amplifies the small signal differently in dependence upon the position of the working point, the non-linearity of the filter can thereby be compensated.

Abstract: The present invention is directed in general to a LCD-panel, and particularly to a LCD panel whose gate drivers (GD) are assembled without a printed circuit board (PCB). This technique is so called PCB-less, where the wiring of the gate drivers (GD) is not done with conventional printed circuit boards (PCB), but directly on the LCD-glass. The invention is also applicable for chip on glass (COG) technique, where the gate drivers (GD) are directly connected to the glass wiring. To avoid the block-dim effects, while keeping the effort and cost low, it is proposed to add an additional line (VLclean) to each output stage (OUTx), whereby the additional line (VLclean) is used solely for supplying the reference potential of the storage capacitors (Cst) of the selected gate line (GLy). All other (unselected) gate lines are connected to the usual gate off supply line (VL).

Abstract: The present invention relates to real-time adaptive control for best Integrated Circuit (IC) performance. The adaptive behavior is carried out on a local basis. The system is partitioned into different islands (30). Each island (30) is controlled and its working conditions are modified depending on some parameters. The remainder of the chip is controlled as well, depending on other parameters. This requires that each island (30) has a local controller (36) communicating with a global controller (42). The main control parameters are e.g. supply voltage, threshold voltage and clock frequency.

Abstract: During the implementation of an anticollision method by a reader station (1) to identify all data carriers (2, 3, 4) in the communication field (HF), in order to shorten the time slots (S) in which none of the data carriers (2, 3, 4) is responding or in which a collision of multiple responses from the data carriers (2, 3, 4) occurs, a time-slot progressing information (ZWI) is sent by the reader station (1). The time-slot progressing information (ZWI) contains a time-slot number (ZN), which identifies the time slot (Si) next in line after the current time slot (S).

Abstract: An oscillator circuit for generating a high-frequency electromagnetic oscillation, comprises:—an amplifier configuration with at least one input and at least one output,—an oscillator crystal connected to at least one of the outputs of the amplifier configuration,—a bandpass filter configuration, which is connected, with at least one input, to the oscillator crystal and the at least one output of the amplifier configuration connected to the oscillator crystal, and back coupled, with at least one output, to the input, or at least one of the inputs, of the amplifier configuration.

Abstract: USB 2.0 supports communication in low-speed (LS), full speed (FS) and high speed (HS). In the full speed mode, the wire segment between a hub and a device is terminated via a pull-up resistor 480 on the D+ data line on the downstream end of the segment. In the high-speed mode, both signal wires are terminated by the LS/FS driver 420 generating a single-ended zero via resistors 490. The device emulates a disconnect, while it operates in the high-speed mode, by activating the pull-up resistor 480. Including the D+ pull-up resistor is practically equivalent to an open end, enabling a reliable disconnect detection in the hub using the disconnection envelop detector 460. Detection of an (emulated) disconnect, triggers the reset en enumeration process. This allows the device to report a change in functionality without the user having to physically remove the device from the bus.

Abstract: The invention relates to a comparator with a constant duty cycle for high frequency data signals. Such comparators are often part of an integrated circuit and particularly useful in the mobile phone technology. To achieve the desired constant duty cycle for high frequency data signals, the comparator according to the invention comprises a differential amplifier (M1, M2) having differential inputs (IN 1, IN2) forming the comparator inputs and a first and second amplifier output (Vo, Vo?) forming the comparator outputs of a first comparator stage. Further, a first differential current amplifier (A11) is provided and connected with its inputs to the amplifier outputs (Vo, Vo?) and with its output to the first amplifier output (Vo). Finally, a second differential current amplifier (A12) is connected with its inputs to the amplifier outputs (Vo, Vo?) and with its output to the second amplifier output (Vo?).

Abstract: A circuit arrangement, method of executing program code and method of generating program code utilize power control instructions (90) capable of dynamically controlling power dissipation of multiple hardware resources (50-60) during execution of a program by a processor (14). Moreover, a processor (14) configured to process such power control instructions (90) is capable of maintaining the power modes of the multiple hardware resources (50-60) to that specified in an earlier-processed power control instruction (90), such that subsequently-processed instructions (90) will be processed while the power modes of the multiple hardware resources (50-60) are set to that specified by the earlier-processed power control instruction (90).

Abstract: A measuring method for measuring physical variables comprises—the selection of a working point (AP) lying within a total measurement range (G) of a physical variable (M) to be measured,—the detection of a measured value (M(t1)) of the physical variable at a first measuring time (t1),—the determination of a displacement value (V(t1)) as the result of a subtraction of the measured value (M(t1)) measured at the first measuring time from the working point (AP),—the formation of change values (C(t2), C(t3) . . . C(tx)) of the physical variable (M) by acquiring subsequent measured values (M(t2), M(t3) . . . M(tx)) of the physical variable at subsequent measuring times (t2, t3 . . . tx) and addition of the displacement value (V(t1)) to the subsequent measured values.