Abstract: An apparatus and structure for transmitting and receiving an audio signal over a network (25). A dual mode telephone (1) is adapted to switch between a standard telephone mode and an Internet Protocol (IP) telephone mode. The standard telephone mode comprises a standard telephone (11) adapted to transmit and receive audio over a standard telephone network (37). The IP telephone mode comprises an IP telephone (15) adapted to convert an audio signal to an IP packet and transmit the IP packet over a communication link (14) to a network (25).

Abstract: This invention relates to a method and a terminal for detecting a fake and/or modified smart card inserted into a physical interface of a terminal, the method comprising the steps of performing a sequence of current measurements by a current monitor in order to obtain a first current signature, comparing the obtained first current signature with a second current signature, representing a unique current signature of a smart card, and determining whether a difference exists within a predetermined range between the first current signature and the second current signature. This allows for simple detection of fake and/or modified smart cards. Further, it is possible to detect (and thereby protect against) false cards and/or ‘rouge’ application residing on a smart card.

Abstract: A medicament comprising, separately or together (A) a compound of formula I in free or salt or solvate form, wherein W, Rx, Ry, R1, R2, R3, R4, R5, R6 and R7 have the meanings as indicated in the specification; (B) a glycopyrronium salt; and (C) mometasone furoate; for simultaneous, sequential or separate administration in the treatment of an inflammatory or obstructive airways disease.

Abstract: A non volatile memory device comprises memory cells such as MRAM cells, reading circuits and a reference cell for generating a reference for use by the reading circuits, and can determine if the reference is degraded by thermal instability. This can help reduce a data error rate. Detecting such degradation can prove to be more effective than trying to design in enough margins for the lifetime of the device. The reference cell can be less susceptible to degradation than other cells by using different shape of cells and different write currents. Where each reference cell is used by many memory cells, the reference cell tends to be used more often than any particular memory cell and so can be more susceptible to degradation. Another way of ensuring against longer term degradation of the reference is periodically rewriting the reference cell.

Abstract: The present invention provides an improved method and system to generate a real time three-dimensional rendering of two-dimensional still images, sequences or two-dimensional videos, by tracking (304) the position of a targeted object in the images or videos and generate the three-dimensional effect using a three-dimensional modeller (308) on each pixel of the image source.

Abstract: A system 100 for protecting a codeword u against an error in at least one <7-ary symbol, where q is an r? of two, r?1 (q=T). The code word u 300 includes information symbols 310 u[0], . . . , u[k?1], k>1, each information symbol representing an integer in the range {?, 2w?1}, where w=n*r, n?1. A processor 130 includes an integer processing unit 140 for, under control of a program, calculating a parity symbol 312 u[k] for protecting the information symbols, where the parity symbol includes ?(?[0]<<u[0]+?[1]<<u[1]+ . . . +a[k?1]*u[k?1]) mod M, where the multiplication · and the addition + are integer operations. The constants ?[0], . . . , ?[£?1] lie in {0, . . . , M?1}, M?1 and are chosen such that the elements a[i]*d*qJ modM are unique for ie {0, . . . , k?1}, j e {0, . . . , n?1}, ?q<d<q, d?0.

Abstract: The invention relates to a system for transmitting data from a medium access control device (2) via a digital interface (IF1) to a physical layer (PHY) and to an antenna (5), the physical layer (PHY) comprising a base band (4) with a base band controller (7) and a data processing pipeline (3) comprising a plurality of functional blocks (FB1 to FB 13), wherein a burst timing control block of one of all functional blocks (FB1 to FB 13) of the data processing pipeline (3) detects an end of a packet of payload data and, thereupon, sets a halt signal (STALL) for those functional blocks (FB1 to FB 13) preceding the burst timing control block (FB1 to FB 13) in the data processing pipeline (3) and starts a timer (T1) for counting a duration of a minimum inter- frame space (MIFS), wherein the burst timing control block (FB1 to FB 13) resets the halt signal (STALL) after expiration of the timer (T1). It also relates to a corresponding method.

Abstract: A phase change resistor device has a phase change material (PCM) for which the phase transition occurs inside the PCM and not at the interface with a contact electrode. For ease of manufacturing the PCM is an elongate line structure (210, 215) surrounded by the conductive electrode portions (200, 240) at its lateral sides, and is formed in a CMOS backend process. An alternative is to form the device coupled directly to other circuit parts without the electrodes. In each case, there is a line of PCM which has a constant diameter or cross section, formed with reduced dimensions by using a spacer as a hard mask. The first contact electrode and the second contact electrode are electrically connected by a “one dimensional” layer of the PCM. The contact resistance between the one-dimensional layer of PCM and the first contact electrode at the second contact electrode is lower than the resistance of a central or intervening portion of the line.

Abstract: Abstract: A planar antenna assembly (AA) for an RF communication module, comprises i) a conductive plate having a first linear side of a first length and in which is defined a first notch (N1) of a first width and a first electrical length, equal to a quarter of a wavelength corresponding to a chosen frequency of a working frequency band, and comprises a straight part having an open end (OE1) found on the first side, and a shortened end (SE1), and ii) a first feed line (FL1) defined above the conductive plate and across the first notch (N1) and arranged to be coupled to this first notch (N1) to enable wideband operation. The first length of the first side is equal to half this wavelength. Moreover, the first notch open end (OE1) is present approximately in the middle of the first side.

Abstract: There is provided a method of operating a communications system comprising a transmitting station and a receiving station, the method in the transmitting station comprising encoding a clock signal with data to form encoded signals for transmission; transmitting the encoded signals to the receiving station; the method in the receiving station comprising decoding the encoded signals to extract the clock signal and data; processing the data under the control of the decoded clock signal. The method further comprises, when no data is required to be transmitted to the receiving station, transmitting further encoded signals to the receiving station in order for the receiving station to decode the further encoded signals and extract a clock signal.

Abstract: An apparatus (1001), system (1000) and method (800-900) are provided for improving the de-encapsulation of sections from Multi Protocol Encapsulation (MPE) (151) and Multi Protocol Encapsulation-Forward Error Correction (MPE-FEC) (152) Sections in a DVB-H transport stream. DVB-H is a standard for broadcasting services to hand-helds. Its difference from DVB-T, C, and S that is relevant for this invention is the presence of an additional layer of Forward Error Correction (FEC). Instead of restoring only correctly received sections (151) (152) the present invention also restores fragments of sections (151) (152) by using both Transport Stream packet headers (301. i.1) and section headers (151.1). As a result, entire sections (800-900) may not be erased (which can amount to up to 4080 bytes) whenever one or more fragments are received incorrectly, but only the incorrectly received fragments (which can be each up to 184 bytes) are erased.

Abstract: The invention relates to a power factor controller for use in a power factor correction circuit. The power factor controller comprises a first input (VinSense) for receiving an input voltage (Vin) of the power factor correction circuit, a second input (VoSense) for receiving an output voltage (Vout) of the power factor correction circuit, and a controllable current source (VCCI) having a control input coupled to the first input, and a current supply output coupled to the second input, wherein said controllable current source (VCCI) sources a current to the second input (VoSense) that is inversely proportional to the input voltage.

Abstract: An adaptive cruise control system and a method for controlling the speed of a vehicle are disclosed. The system generally includes a controller which determines a torque instruction associated with a limit speed of the vehicle which is less than a selected speed. The method generally includes determining a distance between the vehicle and an object detected in the path of the vehicle, determining a torque instruction which is associated with a limit speed which is less than a selected speed from at least the distance, and transmitting the torque instruction to an engine controller of the vehicle.

Abstract: The present invention relates to a switching arrangement and method of manufacturing such an arrangement, wherein first and second series-shunt diode structures (D1/D2, D3/D4) are connected to each other in a mirrored configuration to obtain a basic switching cell. This basic switching cell can be used to build a SPDT switch which in turn can be used to build a DPDT switch or switches of higher complexity. Thereby, high isolation and low power consumption can be achieved with the additional advantage of modularity.

Abstract: The invention relates to a switched mode power converter and a method of operating such a converter A switched mode power converter according to the invention includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b) and a secondary side rectifier circuit including an output filter (6, 10) coupled to the at least one secondary winding (2b), and a secondary side active switch device (S3) coupled between the at least one secondary winding and the output filter. The converter further includes primary side and secondary side control means (12, 16, 18) for regulating the switching of the primary side and secondary side switches, respectively, and configured so as to reduce the duty cycle of the primary side switch device (S1) during a lower power mode of operation of the converter, the reduction of the duty cycle of the primary side switch being determined with reference to the duty cycle of the secondary side switch (S3).

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (12) which is provided with at least one semiconductor element (E), wherein on the surface of the semiconductor body (12) a mesa-shaped semiconductor region (1) is formed, an insulating layer (2) is deposited over the mesa-shaped semiconductor region (1) having a smaller thickness on top of the mesa-shaped semiconductor region (1) than in a region (3) bordering the mesa-shaped semiconductor region (1), subsequently a part of the insulating layer (2) on top of the mesa-shaped semiconductor region (1) is removed freeing the upper side of the mesa-shaped semiconductor region (1), and subsequently a conducting layer (4) contacting the mesa-shaped semiconducting region (1) is deposited over the resulting structure. According to the invention the insulating layer (2) is deposited using a high-density plasma deposition process.

Abstract: A fin FET array includes a number of fins 12 and a switch FET 52 between fins 12. The switch FET 52 acts to divide the transistor array into first 42 and second 44 FINFET regions having first 46 and second 48 gate electrodes controllably connected through the switch FET 52. Suitable voltages applied between the gate of the switch FET and the substrate 10 can allow the fin FET array either to act as a plurality of separate FETs or as a single device. A method of making the fin FET array to reduce the number of additional steps to fabricate the switch FET 52 is also described.

Abstract: A method of packaging a semiconductor die (20). The method comprises mounting a semiconductor die (20) to a die attach pad (34) on a carrier (10) and electrically coupling an electrode (36) of the semiconductor die (20) and a contact pad (16) on the carrier (10) with a clip (54) carried by a sacrificial substrate (58). The method further comprises removing the sacrificial substrate (58) to release the clip (54). The method may be extended to accommodate a carrier (10) having multiple device regions (12, 13) each with a die attach pad (34) and a contact pad (16) for mounting multiple semiconductor die (20).

Abstract: A method of providing a region of doped semiconductor (40) which is buried below the surface of a semiconductor substrate (10) without the requirement of epitaxially deposited layers is provided. The method includes the steps of forming first and second trench portions (26,28) in a semiconductor substrate and then introducing dopant (100) into the trench portions and diffusing the dopant into the semiconductor substrate such that a region of doped semiconductor (40) is formed extending from the first trench portion to the second trench portion. A diffusion barrier, for example formed of two barrier trenches (16, 18), is provided in the substrate adjacent the doping trenches to inhibit lateral diffusion of dopant from the doping trenches so as to maintain an undoped region (30) above the region of doped semiconductor.

Abstract: A sender (702) transmits one or more frames to a receiver (704). The receiver (704) either calculates a carrier frequency difference or a time difference using the one or more frames. A clock (722) in the receiver (704) is synchronized with a clock (714) in the sender (702) using the carrier frequency difference or the time difference.