Abstract: A charging control device (D) is installed in a piece of electronic equipment (EE) comprising a rechargeable battery (B) and at least an internal application (A) requiring an application current for its operation. This device (D) comprises a charging control module (CCM) arranged to be coupled to a charger (CH), to be fed with a charge current when it is connected to mains, and coupled i) to the battery (B) to control its charge and provide it with a chosen battery current when so required and when its temperature is within a chosen interval, and ii) to the application (A) to provide it with the application current when the electronic equipment (EE) is connected to the charger (CH). The device (D) also comprises a current sensor means (SM) arranged to determine the current consumed by the application (A) and to deliver a first signal representative of this current consumption.

Abstract: The present invention relates to a battery charge circuit (100) in a charge-and-play mode capable to reliably determine the completion of a battery charging operation has been described. Such a determination takes into account the behavior of the battery charge circuit (100) with respect to the temperature, the activity of the circuitry (30) and the source current limitation. Thus, a distinction can be made between a decrease of the battery charge current ICHG below the end-of-charge current level caused by the full-charge state of the battery (20) and by the activation of temperature and current regulation circuits. Furthermore, the battery charge circuit (100) is also configured such that it can be warned both that the activity of the circuitry (30) is to be limited and, by a timer (800) measuring the time interval during which the battery charge current ICHG has been reduced to zero, that the battery (20) is being discharged.

Abstract: A method and structure manage a database. A first device that includes data is coupled to a second device that includes metadata relating to the data. The second device is removed from the first device and the metadata is modified. The second device is again coupled to the first device and the modified metadata on the second device modifies the data on the first device.

Abstract: An integrated circuit arrangement having at least one electrical conductor which, when a current flows through it, produces a magnetic field which acts on at least a further part of the circuit arrangement. The electrical conductor has a first side oriented towards the at least further part of the circuit arrangement and comprises a main line of conductive material, and, connected to its first side, at least one field shaping strip made of magnetic material. Due to the field shaping strip, the inhomogeneity of the magnetic field profile above the electrical conductor is reduced.

Abstract: The invention relates to a communication network with at least two network nodes, with transmission channels for transmitting data packets between the network nodes, and with at least one active coupler. The invention provides for coupler information to be attached to the data packets as they pass through the active coupler, and data-packet running-time information to be determined from the coupler information in a network node that receives a data packet.

Abstract: A signal receiver for use in a 60 GHz wireless area network, in which the received RF signal band (100) is converted to a plurality of intermediate frequency (IF) sub-bands (104) and then processing (LPF, AGC, ADC) in the analogue domain of the sub-bands (104) is performed in parallel. As a result, the design requirements of the analogue components are significantly relaxed and it is possible to perform gain control in respect of each sub-band (104), which improves the quality of the received signal.

Abstract: A flash analog-to-digital converter comprises a resistive string powered by a reference voltage source for providing a set of equidistant reference voltages and a set of comparators for comparing the analog input signal with the reference voltages. A set of switches are arranged and controlled to perform an algorithm for mitigating the influence of mismatches between the components. The switches are arranged between the reference voltage source and the resistive string so that switches in the reference inputs to the comparators are avoided. The resistive string is preferably circular. The converter can handle differential signals.

Abstract: In an amplifier arrangement comprising an amplifier (AO) having an output, a first feedback (Rfb) between the output and an input side of the amplifier, a load (RL) having a first terminal coupled to the output and a second terminal, and a DC-blocking capacitance (CDC) between the second terminal of the load and a reference terminal, a second feedback (Cx, Rx) is present between the second terminal of the load and the input side of the amplifier.

Abstract: The MOS transistor (1) of the invention comprises a gate electrode (10), a channel region (4), a drain contact region (6) and a drain extension region (7) mutually connecting the channel region (4) and the drain contact region (6). The MOS transistor (1) further comprises a shield layer (11) which extends over the drain extension region (7) wherein the distance between the shield layer (11) and the drain extension region (7) increases in a direction from the gate electrode (10) towards the drain contact region (6). In this way the lateral breakdown voltage of the MOS transistor (1) is increased to a level at which the MOS transistor (1) may fulfill the ruggedness requirement for broadcast applications for a supply voltage higher than that used in base station applications.

Abstract: The present invention relates to a method and circuit configuration (100) for preventing any needless battery recharge at each short battery voltage dip. Such a circuit configuration (100) comprises a detector means (200) for detecting a voltage variation (?V) of a variable value (Vbat) across a battery (BAT) dropping below a threshold value (Vref), followed by a time determination means (300) for measuring an elapsed time (te), as soon as the variable value (Vbat) decreases below the threshold value (Vref), and evaluating a duration (?) of the voltage variation (?V) relative to a reference time (W). The threshold value (Vref) is defined as the value from which a battery charge cycle, initiated by a battery charge controller (400), is deemed to be necessary. No battery charge cycle will be restarted when the elapsed time (te) is less than the reference time (W), i.e., when the battery (BAT) is submitted to short voltage dips.

Abstract: A switching regulator having first and second power switches. The first power switch has at least two transistors connected in series, the transistors having a first maximum voltage across their terminals which is less than the input voltage of the regulator. The transistors have at least a first node at the point where they are connected, and a first control circuit controls the voltage at the first node so that the voltages across the terminals of the transistors of the first power switch do not exceed the first maximum voltage. The second power switch also has at least two transistors connected in series, the transistors having a maximum voltage across their terminals that is less than the input voltage. The transistors have at least a second node at the point where they are connected, and a second control circuit controls the voltage at the second node so that the voltages across the terminals of the transistors of the second power switch do not exceed the second maximum voltage.

Abstract: A method of forming a capping layer on a copper interconnect line (14). The method comprises providing a layer (20) of Aluminium over the interconnect line (14) and the dielectric layer (10) in which it is embedded. This may be achieved by deposition or chemical exposure. The structure is then subjected to a process, such as annealing or further chemical exposure, in an environment containing, for example, Nitrogen atoms, so as to cause indiffusion of Al into the copper line (14) and nitridation to form a diffusion barrier 26 of the intermetallic compound CuAlN.

Abstract: The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path (72) is provided with a scaling by a direct feedforward coefficient (ao) greater than zero and less than one. As a result, overshoot or peaking of classical feedforward topologies can be suppressed while providing interferer immunity, anti-aliazing effects and loop stability.

Abstract: In order to provide a filter device (50, 60) as well as a method for processing input signals, in particular I[ntermediate]F[requency] input signals, for example sound signals, such as received television signals, wherein a bandpass function around the desired carriers is provided and the sound demodulation performance is not disturbed, at least one passive polyphase filter stage (50) being designed for image rejection and at least one active polyphase filter stage (60) being combined with the passive polyphase filter stage (50) and being designed for band pass as well as for contributing to the image rejection in order to relax the attenuation requirements of the passive polyphase filter stage (50) are proposed.

Abstract: In a method of producing a transponder (T1, T2, T3), a substrate (1, 91) is provided. The substrate (9, 91) comprises a first area (2), a second area (3) adjacent to the first area (2), and a first electric contact (8, 98) adjacent to the second area (3). An electric device (50, 80) is placed in or on the first area (2), preferably without touching the first electric contact (8, 98). Subsequently, a conductive glue (12) is applied on the second area (3) and on the first electric contact (8, 98) so that the conductive glue (12) electrically couples the first electric contact (8, 98) with the electric device (50, 80).

Abstract: The invention relates to a device comprising a first electric contact (8, 98) and a substrate (1, 91). The first electric contact (8, 98) comprises a first area (10, 110) with a first wettability, and the substrate (1, 91) comprises a second area (3) with a second wettability and a third area (2) with a third wettability and being adjacent to the second area (2). The first electric contact (8, 98) is attached on the substrate (1, 91) so that the first area (10, 110) of the first electric contact (8, 98) is adjacent to the second area (3), and the second area (3) is located between the first area (10, 110) and the third area (2). The first and the second wettability are higher than the third wettability. The invention also relates to a transponder (T1, T2, T3) which comprises the substrate (1, 91), an electric device (50, 80) and an antenna (7, 93).

Abstract: An asymmetric semiconductor device (10) and method of forming the same in which 25V devices can be fabricated in processes with gate oxide thicknesses designed for 2.75 or 5.5V maximum operation. The device includes: a shallow trench isolation (STI) region (12) that forms a dielectric between a drain region (18) and a gate region (20) of a unit cell to allow for high voltage operation; and an n-type well (14) and a p-type well (24) patterned within the unit cell.

Abstract: An analog-to-digital converter (ADC1) of the Sigma Delta type provides a stream of digital output samples (OUT) in response to an analog input signal (IN). The analog-to-digital converter (ADC1) comprises a quantizer (QNT) that has a dead zone. The quantizer (QNT) provides a digital output sample that has a neutral value when the quantizer (QNT) receives an input signal whose amplitude is within the dead zone. A feedback path (DAC) within the analog-to-digital converter (ADC1) provides a feedback action only in response to a digital output sample that has a value other than the neutral value.

Abstract: The present invention comprises a plurality of memory banks (102, 103) with independent power controls (110) such that any memory banks (102, 103) not actively engaged in storing partitioned data can be powered down by dynamic voltage scaling. A memory management unit (112) is used to re-map partitions so they occupy fewer banks of memory, and a re-partition processor (102) is used to compute how partitions can be packed and squeezed together to use fewer banks of memory. Overall system power dissipation is therefore reduced by limiting the number of memory banks (102, 103) being powered up.

Abstract: A bus station circuit (14) operates in an electronic system with a bus (10). The bus station determines an initial synchronization time point by detecting a synchronization signal pattern on the bus and switching to a synchronization enabled state upon detection of the synchronization signal pattern. Starting points of successive messages are determined head to tail from the end points of immediately preceding messages, when operating in the synchronization enabled state. The content of the messages is tested for validity. The bus station switches to a synchronization disabled state in response to detection of a message with invalid content. While in the synchronization disabled state, use of messages that are received is disabled in the bus station circuit. In the synchronization disabled state the bus station waits for a synchronization event to switch back to the synchronization enabled state.