Patents Assigned to RENESAS
  • Semiconductor device
    Patent number: 9184760
    Abstract: A semiconductor device using analog-to digital (AD) conversion realizes reliable control so that, at the time of AD converting reference voltage, a low-voltage transistor in a reference voltage generating circuit is not destroyed by voltage held in a sample and hold circuit. In a semiconductor device, when an instruction of detecting a reference voltage value is received, a switch control unit controlling switching of an input signal of an internal AD converter temporarily automatically couples an input node of a sample and hold circuit and a ground node and, after that, couples the input node of the sample and hold circuit and an output node of a reference voltage generating circuit.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Takaya Masuda
  • Semiconductor device
    Patent number: 9184755
    Abstract: A semiconductor device according to an aspect of the invention relates to an AD converter that converts a signal level of an analog signal into a digital value by using a comparator, and determines an amount of adjustment of an offset voltage of the comparator based on an offset determination result of the comparator obtained immediately after a least significant bit (LSB) of a digital value output as a conversion result is converted.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Keisuke Kimura, Yuichi Okuda, Hideo Nakane, Takaya Yamamoto
  • Semiconductor device and manufacturing method of the same
    Patent number: 9184142
    Abstract: To provide a semiconductor device having suspension leads with less distortion. In QFN having a plurality of external terminal portions at the periphery of the bottom surface of a sealing body, a plurality of leads is linked to a plurality of long suspension leads of the QFN at an intermediate portion thereof or at between the intermediate portion and a position near the die pad. These long suspension leads are each supported by these leads, making it possible to suppress distortion of each of the suspension leads in a wire bonding step or molding step in the fabrication of the QFN.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Atsushi Fujisawa
  • Memory control device, memory control method, data processing device, and image processing system
    Patent number: 9183131
    Abstract: A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute address serving as a common reference value in a given data transfer period; a differential address storage unit that stores plural differential addresses therein; a differential address selection unit that selects any one of the plurality of differential addresses in a given order; a memory address generation unit that combines any differential address selected by the differential address selection unit with the absolute address to generate a memory address; and a data transfer unit that inputs the memory address generated by the memory address generation unit to the external memory, reads the data from the memory address, and transfers the data to the data processing unit.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yasuyuki Ninomiya
  • Level shift circuit with automatic timing control of charging transistors, and driver circuit having the same
    Patent number: 9183808
    Abstract: A level shift circuit includes first and second NMOS transistors that are coupled between a first supply terminal, and first and second output nodes, respectively, and have respective control terminals receiving input signals of a low amplitude, third and fourth PMOS transistors which are coupled between a second supply terminal, and the first and second output nodes outputting signals of high amplitude, respectively, a fifth PMOS transistor which is coupled between a gate of the third PMOS transistor and the second output node, and has a gate coupled to the first output node, a sixth PMOS transistor which is coupled between a gate of the fourth PMOS transistor and the first output node, and has a gate coupled to the second output node, and first and second load elements which are coupled between the second supply terminal and the gates of the third and fourth PMOS transistors, respectively.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Hiroshi Tsuchi
  • Method for manufacturing a semiconductor device
    Patent number: 9184303
    Abstract: The improvement of the reliability of a semiconductor device having a split gate type MONOS memory is implemented. An ONO film and a second polysilicon film are sequentially formed so as to fill between a first polysilicon film and a dummy gate electrode. Then, the dummy gate electrode is removed. Then, the top surfaces of the first and second polysilicon films are polished, thereby to form a memory gate electrode formed of the second polysilicon film at the sidewall of a control gate electrode formed of the first polysilicon film via the ONO film. As a result, the memory gate electrode high in perpendicularity of the sidewall, and uniform in film thickness is formed.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tatsuyoshi Mihara
  • Wireless communication device
    Patent number: 9185747
    Abstract: In a wireless communication device for performing plural wireless communications with different standards using the same frequency band, degradation of communication quality and communication speed due to communication interference is prevented, while drop in throughput and occurrence of frame loss are prevented. A first wireless communication section first performs wireless communication using a first frequency band and a second wireless communication section performs second wireless communication using a second frequency band with which at least a part of the first frequency band overlaps.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroki Sugimoto, Koji Kubota
  • Motor drive control device and operating method thereof
    Patent number: 9184680
    Abstract: Motor Drive Control Device configured to properly start up various types of motors under operating conditions where motor operations are performed in a wide range of temperature and power supply voltage, includes output drive controllers that supply PWM drive output signals to an output pre-driver in such a manner as to minimize the error between a current instruction signal and a current detection digital signal. In response to a detected induced voltage generated from a voltage detector upon startup of a motor, an initial acceleration controller supplies initial acceleration output signals specifying a conducting phase for initial acceleration of the motor to the output drive controllers. The initial acceleration controller, the output drive controllers, and an output driver make a conducting phase change and perform a PWM drive to provide the initial acceleration of the motor.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Minoru Kurosawa
  • Semiconductor device and method of manufacturing the same
    Patent number: 9184126
    Abstract: In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become source wires or drain wires are formed on an interlayer insulation film of the first layer over the high voltage resistant MISFET. At this moment, when a distance from an interface between a semiconductor substrate and a gate insulation film to an upper portion of the gate electrode is defined as “a”, and a distance from the upper portion of the gate electrode to an upper portion of the interlayer insulation film on which the wires are formed is defined as “b”, a relation of a>b is established. In such a high voltage resistant MISFET structured in this manner, the wires are arranged so as not to be overlapped planarly with the gate electrode of the high voltage resistant MISFET.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: November 10, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yusuke Terada, Shigeya Toyokawa, Atsushi Maeda
  • DIFFERENTIAL AMPLIFIER AND CONTROL METHOD FOR THE SAME
    Publication number: 20150317943
    Abstract: A liquid crystal display apparatus includes a signal generating circuit configured to generate a first control signal and a second control signal; and a differential amplifier. The differential amplifier includes: a first differential pair of transistors configured to receive a differential input signal; a first constant current source connected with said first differential pair of transistors; and a first switch connected in parallel with said first constant current source and configured to increase current which flows through said first differential pair of transistors, in response to said first control signal which is active for a first time period in a level transition of said differential input signal.
    Type: Application
    Filed: July 13, 2015
    Publication date: November 5, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Hirokazu KAWAGOSHI
  • DEVICE-TO-DEVICE COMMUNICATION SETUP USING PROXIMITY SERVICES
    Publication number: 20150319595
    Abstract: A communications method for facilitating peer discovery, and thereby facilitating peer-to-peer communications in a mobile communications network, comprises: acquiring, by a user equipment capable of performing peer-to-peer, P2P, proximity services, a link-local interface identifier from a node of a network. The link-local interface identifier is unique within the network, and the method further comprises establishing a link-local domain with at least one other user equipment in the network at least partly on the basis of the acquired link-local interface identifier.
    Type: Application
    Filed: November 1, 2013
    Publication date: November 5, 2015
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Sami-Jukka HAKOLA, Samuli TURTINEN, Timo Kalevi KOSKELA
  • Semiconductor device having a fuse element
    Patent number: 9177912
    Abstract: A portion-to-be-melted of a fuse is surrounded by plates, so that heat to be generated in a meltdown portion of the fuse under current supply can be confined or accumulated in the vicinity of the meltdown portion of the fuse. This makes it possible to facilitate meltdown of the fuse. The meltdown portion of the fuse in a folded form, rather than in a single here a fuse composed of a straight-line form, is more successful in readily concentrating the heat generated in the fuse under current supply into the meltdown portion, and in further facilitating the meltdown of the fuse.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Takehiro Ueda
  • Semiconductor device having non-volatile memory with data erase scheme
    Patent number: 9177657
    Abstract: In a nonvolatile memory device (4) provided in a semiconductor device, when data is erased based on a band-to-band tunneling scheme, supply of a boosted voltage to a memory cell (MC) to be erased is ended when a condition that an output voltage (VUCP) of a charge pump circuit (52) has recovered to a predetermined reference voltage is satisfied and additionally a condition that a predetermined reference time has elapsed since start of supply of the boosted voltage (VUCP) to the memory cell (MC) to be erased is satisfied.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomoya Ogawa, Takashi Ito, Mitsuhiro Tomoeda
  • Manufacturing method of semiconductor device
    Patent number: 9177813
    Abstract: In MOSFET having SBD as a protection element, a TiW (alloy having tungsten as a main component) film is used as an aluminum-diffusion barrier metal film below an aluminum source electrode in order to secure properties of SBD. The present inventors have found that a tungsten-based barrier metal film is in the form of columnar grains having a lower barrier property than that of a titanium-based barrier metal film such as TiN so that aluminum spikes are generated relatively easily in a silicon substrate. In the present invention, when a tungsten-based barrier metal film is formed by sputtering as a barrier metal layer between an aluminum-based metal layer and a silicon-based semiconductor layer therebelow, the lower layer is formed by ionization sputtering while applying a bias to the wafer side and the upper layer is formed by sputtering without applying a bias to the wafer side.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tatsuhiko Miura
  • Computer system
    Patent number: 9176756
    Abstract: There is a need to provide a computer system capable of preventing a failure from propagating and recovering from the failure. VCPU#0 through VCPU#2 each operate different OS's. VCPU#0 operates a management OS that manages the other OS's. When notified of bus error occurrence, a virtual CPU execution portion 201 operates only VCPU#0 regardless of an execution sequence stored in schedule register A. VCPU#0 reinitializes a bus where an error occurred.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hirotaka Motai, Yasuhiro Tawara, Koji Adachi, Hitoshi Suzuki
  • Semiconductor device with high reliability and manufacturing method thereof
    Patent number: 9177857
    Abstract: A semiconductor device is provided, which includes a substrate, an insulator film formed over the substrate, and plural metal wirings with different widths containing copper as a main component and an impurity which is different from copper. The plural metal wirings includes a first metal wiring having a concentration profile where the concentration of the impurity metal increases from the center part of the stacking direction to the surface and the second metal wiring having a concentration profile where the concentration of the impurity metal decreases from the bottom surface of the stacking direction to the surface. Moreover, the width of the second metal wiring may be larger than the width of the first metal wiring.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Oshida, Toshiyuki Takewaki, Shinji Yokogawa
  • Manufacturing method of semiconductor device
    Patent number: 9171928
    Abstract: Provided is a semiconductor device with improved performance and production yield. Insulating films IL2 and IL3 are formed over a semiconductor substrate in that order to cover a gate electrode. Then, the insulating films IL3 and IL2 are etched back to form sidewall spacers including the insulating films IL2 and IL3 over sidewalls of the gate electrode. The source/drain region is formed in the semiconductor substrate by ion implantation using the gate electrode and the sidewall spacer as a mask. Then, the sidewall spacers are isotropically etched on conditions where the insulating film IL2 is less likely to be etched than the third insulating film IL3 to thereby decrease the thickness of the sidewall spacer. Thereafter, a reaction layer between the metal and the source/drain region is formed over the source/drain region.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: October 27, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tamotsu Ogata, Toshifumi Iwasaki
  • Transcoding device, transcoding method and program thereof
    Patent number: 9172995
    Abstract: A device, a method and a program to simplify transcoding of TTS (timestamped transport streams). When transcoding video data in the input TTS, the video processor unit reattaches time stamps in sequence within the applicable frame period of each video frame to each video packet within the applicable video frame after recompression. When transcoding audio data in the input TTS, the audio processor unit reattaches time stamps in sequence within the applicable video frame period of each video frame to each audio packet in the applicable video frame after recompression.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: October 27, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Mitsuhiro Matsunaga
  • USB communication apparatus and method of reducing power consumption amount thereof using a squelch signal to indicate the presence of signals on a USB bus are at a predetermined level
    Patent number: 9170973
    Abstract: A USB (Universal Serial Bus) communication apparatus includes: a driver circuit connected to a USB bus and configured to transmit a packet onto the USB bus for a packet transmission period which is determined based on a transmission request signal from another unit. A receiver control circuit generates a fixation request signal and a generation control signal in response to the transmission request signal. A receiver circuit connected to the USB bus generates a squelch signal showing that the packet is being transmitting onto the USB bus, and stops generating the squelch signal in response to the generation control signal. A line state signal control circuit is configured to output a specific line state signal based on the squelch signal to notify to another unit that the packet is been transmitting onto the USB bus, and to fix the specific line state signal in response to the fixation request signal.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: October 27, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Daisuke Sasaki
  • Method of manufacturing a semiconductor device
    Patent number: 9171727
    Abstract: After forming a first film over the main surface of a semiconductor substrate, the first film is patterned, thereby forming a control gate electrode for a non-volatile memory, a dummy gate electrode, and a first film pattern. Subsequently, a memory gate electrode for the non-volatile memory adjacent to the control gate electrode is formed. Then, the first film pattern is patterned thereby forming a gate electrode and a dummy gate electrode.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: October 27, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroshi Nishikizawa, Takuro Homma, Hiraku Chakihara, Mitsuhiro Noguchi