Abstract: A high-accuracy clock signal is generated even when the settings of the clock frequency are changed or there is a variation in power supply, temperature, or the like. A frequency-voltage conversion circuit includes a switch portion including switches, electrostatic capacitive elements, and other switches. The electrostatic capacitive elements have different absolute capacitance values, and are provided so as to cover a frequency range intended by a designer. For example, based on 4-bit frequency adjustment control signals, the other switches select the electrostatic capacitive elements having the electrostatic capacitance values thereof each weighted with 2 to perform the switching of a frequency.

Abstract: To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane from the test pad and the alignment target Am. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.

Abstract: The device includes a first inductor, a first insulating layer, a second inductor, and a third inductor. The first inductor includes a helical conductive pattern. The second inductor is located in a region overlapping the first inductor through the first insulating layer. The second inductor includes a helical conductive pattern. The third inductor is connected in series to the second inductor, and includes a helical conductive pattern.

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Abstract: A device, a method and a program to simplify transcoding of TTS (timestamped transport streams). When transcoding video data in the input TTS, the video processor unit reattaches time stamps in sequence within the applicable frame period of each video frame to each video packet within the applicable video frame after recompression. When transcoding audio data in the input TTS, the audio processor unit reattaches time stamps in sequence within the applicable video frame period of each video frame to each audio packet in the applicable video frame after recompression.

Abstract: A semiconductor device including: a semiconductor member having thereon a plurality of interconnect pads: and a mounting member having a plurality of electrode terminals electrically and mechanically connected to the respective interconnect pads for mounting the semiconductor chip on the mounting member, the electrode terminals forming a plurality of I/O cells each having part of the electrode terminals, the part of electrode terminals including signal terminals, the I/O cells forming a first group of the I/O cells and a second group of I/O cells disposed on an inner position of the mounting member with respect to the first group. The higher integration of the semiconductor device having the higher performances can be realized because the interconnect lines can be drawn to the outer periphery of the chip from the interconnect pads corresponding to each of the I/O cells when the chip is miniaturized or the number of the ball electrodes is increased.

Abstract: A semiconductor integrated circuit for selecting one from a plurality of external storage devices and loading an execution program that includes a fuse part having a plurality of internal fuse circuits, and a processing unit that loads the execution program from the external storage device selected according to a value indicated by the internal fuse circuit.

Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.

Abstract: Transmitter circuits for generating baseband signals having low receiver-band noise are disclosed. In one embodiment, the transmitter circuit comprises an active filtering-and-amplifying component comprising a first input configured to receive a first input signal, and a first output configured to output a first output signal. The transmitter circuit further comprises a passive filtering component comprising a second input connected to the first output and configured to receive the first output signal, a passive pole arrangement comprising a number of switchable resistance elements and a capacitance element connected across the plurality of switchable resistance elements, and a second output configured to output a second output signal having reduced noise as compared to the first output signal. The transmitter still further comprises a number of feedback loops connecting the passive filtering component to the first input.

Abstract: An evaluation method of a semiconductor device according to an aspect of the present invention includes MISFETs including a gate insulating film, the evaluation method including measuring an RTN of a plurality of MISFETs, and extracting at least two parameters selected from a position of a trap in the gate insulating film, an energy of the trap, an RTN time constant, and an RTN amplitude based on a measurement result of the RTN, and obtaining a correlation between these at least two parameters.

Abstract: Provided is a wireless communication system including a first radio equipment that transmits first data using first radio waves, a data transmitter that outputs a second radio wave generated by modulating the first radio wave according to second data to be transmitted, and a second radio equipment that receives the first radio wave and the second radio wave, and separates and demodulates the first data transmitted from the first radio equipment and the second data transmitted from the data transmitter contained in the received radio waves.

Abstract: A semiconductor chip is mounted on a heat sink disposed inside a through-hole of a wiring board, electrodes of the semiconductor chip and connecting terminals of the wiring board are connected by bonding wires, a sealing resin is formed to cover the semiconductor chip and the bonding wires, and solder balls are formed on the lower surface of the wiring board, thereby constituting the semiconductor device. The heat sink is thicker than the wiring board. The heat sink has a protruded portion protruding to outside from the side surface of the heat sink, the protruded portion is located on the upper surface of the wiring board outside the through-hole, and the lower surface of the protruded portion contacts to the upper surface of the wiring board. When the semiconductor device is manufactured, the heat sink is inserted from the upper surface side of the wiring board.

Abstract: A semiconductor device comprises an active region including a core circuit forming region and a buffer forming region, and a fuse element forming region arranged on a corner of the active region and to be able to be electrically fused. It is possible to arrange the fuse element without forming the fuse in the core circuit forming region by arranging the fuse element forming region at the corner of the active region.

Abstract: An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency higher than a frequency of the binary signal and controls whether to output the input level determination signal or not, based on a voltage level of the binary signal, and an AC coupling element connected between an output terminal of the input level determination circuit and an input terminal of the receiving circuit.

Abstract: An optical transmission module includes a stem, a semiconductor laser element mounted over the stem, a cap fixed to the stem and hermetically sealing the semiconductor laser element, and an optical isolator arranged on an optical path of light emitted from the semiconductor laser element. The cap includes a tubular body, one end side of which is fixed to the stem, and a light transmitting section located on the optical path while closing an opening on the other end side of the body, and fixed to the body so as to keep hermeticity with the body. The optical isolator is arranged inside an area hermetically sealed by the cap.

Abstract: A method of manufacturing a nonvolatile semiconductor storage device includes sequentially forming a charge storage film, a conductive film, and a mask film on a semiconductor substrate, sequentially removing the mask film, the conductive film, and the charge storage film at a given portion to form a groove, forming a word gate electrode to fill in the groove whose inside is covered with an insulating film, after said forming the word gate electrode, removing the mask film, after said removing the mask film, forming a spacer film to cover the conductive film and the word gate electrode, etching back the spacer film to form a spacer layer on both sides of the word gate electrode through the insulating film, removing the conductive film and the charge storage film to form a control gate electrode, and forming a source drain diffusion layer.

Abstract: A wiring placement method of placing a plurality of wirings of different lengths in parallel on a plane includes placing a longest wiring and a shortest wiring alongside each other among the plurality of wirings (a) placing a longest wiring from among remaining wires which have not been placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a shorter wiring of the wrings placed at outermost ends, (b) placing a shortest wiring from among remaining wires which have not placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a longer wiring of the wirings placed at outermost ends, and alternately repeating (a) and (b) to place the plurality of wirings.

Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.

Abstract: Occurrence of a void is suppressed when mounting semiconductor chips over a wiring substrate via a paste-like adhesive material. A die bonding step is provided which mounts semiconductor chips over a chip-mounting region of the wiring substrate via the adhesive material. The wiring substrate includes a plurality of wirings (first wirings) and dummy wirings (second wirings) formed on an upper surface of a core layer. The chip-mounting region is provided over the first wirings and the second wirings. In addition, the die bonding step includes a step of applying the adhesive material over an adhesive material application region over the chip-mounting region. Each of the second wirings is extended along a direction in which the adhesive material spreads in the die bonding step.

Abstract: A low power consumption DA converter includes a segment type DA converter and an R-2R resistance ladder DA converter. The segment type DA converter is coupled to a power source voltage VDD and outputs a current signal changing in a stepwise manner according to inputted upper bits D[7 to 5]. The R-2R resistance ladder DA converter is coupled to the segment type DA converter in series between the power source voltage VDD and a ground voltage GND, and outputs an output voltage Vout changing in a stepwise manner. The R-2R resistance ladder DA converter changes the output voltage Vout by raising or lowering a reference voltage Vref according to the lower bits D[4 to 0] and the current signal from the segment type DA converter.