Patents Assigned to RENESAS
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Patent number: 11728690Abstract: A wireless power transmitter pulses the transmit power level unresponsively to the wireless power receiver's power requests in order to perform foreign object detection (FOD). The FOD is performed by the transmitter analyzing the receiver's responses to the pulsed power. Some embodiments avoid mistaking FOD for coil misalignment. Other features are also provided.Type: GrantFiled: June 29, 2020Date of Patent: August 15, 2023Assignee: Renesas Electronics America Inc.Inventors: Nicholaus Smith, Gustavo Mehas, Tao Qi
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Patent number: 11726864Abstract: In a data processing device comprising a memory controller controlling writing/reading of data to/from the memory, a processor requesting writing/reading of data, and an error detection module requesting writing/reading of data to/from the memory controller in accordance with a request from the processor, an error detection module calculates a first error detection code of the first data having a write request from the processor, reads the second data having a read request from the processor from the memory, calculates a second error detection code from the read data, compares the first error detection code and the second error detection code, and transmits the result of the comparison to the external module.Type: GrantFiled: March 17, 2020Date of Patent: August 15, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Katsushige Matsubara, Ryoji Hashimoto, Takahiro Irita, Kenichi Shimada, Tetsuya Shibayama
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Publication number: 20230253996Abstract: A circuitry includes a first to fourth waveform synthesizers, each waveform synthesizer includes a first terminal and a second terminal to which input signals are input and a third terminal from which an output signal obtained by synthesizing the input signals is output. Frequencies of first to fourth input signals input to each waveform synthesizer are equal to each other, and phases of the second to fourth input signals are values delayed by approximately 180 degrees, delayed by approximately 90 degrees, and delayed by approximately 270 degrees, with respect to a phase of the first input signal. The output signal of each waveform synthesizer transitions from one state to the other state and transitions from the other state to the one state.Type: ApplicationFiled: February 7, 2023Publication date: August 10, 2023Applicant: Renesas Electronics CorporationInventor: Kenichi SHIBATA
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Publication number: 20230251115Abstract: A method for calibrating a linearization function for correcting the output of a position sensor providing a continuous output position signal, wherein the method optimizes the linearization function by defining optimal positions of the linearization points of the linearization function.Type: ApplicationFiled: February 9, 2023Publication date: August 10, 2023Applicant: Renesas Electronics America Inc.Inventors: Gentjan QAMA, Josef JANISCH
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Publication number: 20230251116Abstract: A method for calibrating a linearization function for correcting an output of a position sensor providing a continuous output position signal is described. The method adds a new linearization point to the linearization function by detecting the maximum error at the output of the position sensor and applying the new linearization function to the output of the position sensor and repeat the adding new linearization points until all available linearization points have been defined.Type: ApplicationFiled: February 9, 2023Publication date: August 10, 2023Applicant: Renesas Electronics America Inc.Inventors: Gentjan QAMA, Josef JANISCH
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Patent number: 11722948Abstract: A calculation accuracy of a communication quality for use in selecting a communication path is improved. A radio communication device includes: a first calculator configured to calculate a transmission quality indicator value of each of a plurality of parent candidate nodes on the basis of a transmission frame transmitted from an own device to each of the plurality of parent candidate nodes; a second calculator configured to calculate a reception quality indicator value of each of the parent candidate nodes on the basis of a reception frame transmitted from each of the plurality of parent candidate nodes and received by the own device; and a selector configured to select a parent node for use in the communication path among the plurality of parent candidate nodes on the basis of the transmission quality indicator value and the reception quality indicator value.Type: GrantFiled: April 22, 2021Date of Patent: August 8, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Hiroaki Tsuda
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Patent number: 11719525Abstract: Methods and systems for determining a position of a structure using inductive position sensing are described. In an example, a processor may receive a plurality of data points representing a plurality of voltages. The plurality of voltages may be generated by a plurality of sensor coils based on a magnetic flux field. The magnetic flux field may be generated by a plurality of driver coils, and the plurality of voltages may vary with changes in the magnetic flux field. The processor may calibrate the plurality of data points to generate a plurality of calibrated data points. The processor may filter the plurality of calibrated data points. The processor may estimate a position of the structure based on the filtered calibrated data points, where the position of the structure may indicate a size of a size changing device.Type: GrantFiled: October 20, 2021Date of Patent: August 8, 2023Assignee: Renesas Electronics America Inc.Inventors: Damla S. Acar, Pooja Agrawal, Ashley M. De Wolfe, Gustavo James Mehas, Nicholaus W. Smith
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Patent number: 11722103Abstract: An apparatus includes an amplifier circuit and a protection circuit. The amplifier circuit may be configured to generate an output signal by amplifying an input signal received at an input port. The input signal may be a radio-frequency signal. The protection circuit may be configured to (i) generate a detection signal by detecting when a level of the input signal exceeds a corresponding threshold, where the level is a power level, a voltage level or both, (ii) route the input signal away from the input port of the amplifier circuit and disable the amplifier circuit both in response to the detection signal being continuously active at least a first time duration and (iii) route the input signal to the input port of the amplifier circuit and enable the amplifier circuit both in response to the detection signal being continuously inactive at least a second time duration.Type: GrantFiled: August 12, 2022Date of Patent: August 8, 2023Assignee: Renesas Electronics America Inc.Inventors: Victor Korol, Roberto Aparicio Joo
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Patent number: 11721985Abstract: Example implementations include a charging device with a capacitor divider circuit including a plurality of battery state inputs operably coupleable to a plurality of battery devices, and a pulse width modulation (PWM) generator operable to selectively charge the battery devices, a plurality of switching transistors each operatively coupled at a gate terminal thereof to a respective PWM control output of a plurality of PWM control outputs, and a flying capacitor operatively coupled at a first terminal thereof to a first plurality of the switching transistors, operatively coupled at a second terminal thereof to a second plurality of the switching transistors.Type: GrantFiled: February 22, 2021Date of Patent: August 8, 2023Assignee: Renesas Electronics America Inc.Inventors: Yen-Mo Chen, Sungkeun Lim
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Patent number: 11718229Abstract: The image processing device acquires feature quantities (maximum value, minimum value, average value, histogram, etc.) of the entire area (GA) of the image and feature quantities of each local area (LA) of the image from the input image, and calculates a plurality of modulation gain values (gamma correction curves) for GA and each LA. Furthermore, the image processing device determines the correction intensity for each LA from the feature quantity of the GA and the feature quantity of each LA, and creates the LA correction intensity map. Finally, the image processing device finally applies the result of combining a plurality of modulation gain values based on the LA correction intensity map to the input image.Type: GrantFiled: October 21, 2020Date of Patent: August 8, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Mitsuhiro Kimura, Akihide Takahashi
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Publication number: 20230244261Abstract: Example implementations include a bandgap voltage device with a first current source operatively coupled to a bandgap input node and a bandgap output node and operable to output a first proportional-to-absolute-temperature (PTAT) current, a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror and operable to output a second PTAT current.Type: ApplicationFiled: March 31, 2023Publication date: August 3, 2023Applicant: Renesas Electronics America Inc.Inventor: Anurag KAPLISH
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Patent number: 11714106Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.Type: GrantFiled: December 16, 2021Date of Patent: August 1, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Kazuhiro Sakaguchi
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Patent number: 11714107Abstract: A voltage divider circuit includes: a first voltage divider having first and second capacitors, and an output node configured to output a divider voltage from between the first and second capacitors; a second voltage divider having third and fourth capacitors, and first to third switches, and being connected in parallel to the first voltage divider; and a fourth switch provided between the output node and a connection node of the third and fourth capacitors. In the voltage divider circuit, the switches are controlled based on controlling periods.Type: GrantFiled: February 8, 2022Date of Patent: August 1, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Noriaki Matsuno, Shingo Sakamoto
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Patent number: 11714639Abstract: A data processing device has an instruction decoder, a control logic unit, and ALU. The instruction decoder decodes instruction codes of an arithmetic instruction. The control logic unit detects the effective data width of operation data to be processed according to the decode result from the instruction decoder and determines the number of cycles for the instruction execution corresponding to the effective, data width. The ALU executes the instruction with the number of cycles of the instruction execution determined by the control logic unit.Type: GrantFiled: December 29, 2021Date of Patent: August 1, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Sugako Ohtani, Hiroyuki Kondo
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Patent number: 11715979Abstract: Apparatuses including multiple selectable circuit elements are described. In an example, an apparatus may include a power supply configured to output a voltage. The apparatus may further include a controller connected to the power supply and a transmission unit connected to the controller. The transmission unit may be configured to output power. The transmission unit may include comprising an inverter connected to the power supply. The inverter may include a high-side switching element. The transmission unit may further include a circuit element a circuit connected to the power supply. The circuit may be configured to select the circuit element. The circuit may include a switch connected between the inverter and the circuit element. The switch and the high-side switching element may be configured to be driven by the voltage outputted by power supply. The controller may be configured to control the power being outputted by the transmission unit.Type: GrantFiled: July 23, 2021Date of Patent: August 1, 2023Assignee: Renesas Electronics America, Inc.Inventors: Jiangjian Huang, Hulong Zeng
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Publication number: 20230238902Abstract: The semiconductor device includes: a current detection circuit configured to detect a current flowing through a three-phase motor by driving of a drive circuit; and a controller configured to control the drive circuit, based on the detected current. The controller is configured to control, when the three-phase motor is stationary, an energization pattern in such a way that a wave detection current sequentially flows from the drive circuit to each phase of the three-phase motor, to obtain, from the wave detection current detected by the current detection circuit, a first, a second and a third interphase current differences, each of which is a difference among wave detection currents flowing in directions opposite to one another, to determine the energization pattern based on a magnitude relationship among the first, the second and the third interphase current differences.Type: ApplicationFiled: December 27, 2022Publication date: July 27, 2023Applicant: Renesas Electronics CorporationInventors: Minoru KUROSAWA, Satoshi NARUMI, Takeshi OHTSUKI
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Publication number: 20230236821Abstract: A method for updating a sensor system, the method including: performing at an update server side the steps of: retrieving a pre-shared sensor key associated with the sensor system, calculating a server signature based on update data and the retrieved sensor key, and transmitting the update data and the calculated server signature to the sensor system; and performing at the sensor system the steps of: receiving the update data and the calculated server signature, retrieving the pre-shared sensor key stored in a register, calculating a sensor system signature based on the update data and the pre-shared sensor key, comparing the sensor system signature with the server signature and processing the update data if the sensor system signature and the server signature are identical.Type: ApplicationFiled: January 26, 2023Publication date: July 27, 2023Applicant: Renesas Electronics America Inc.Inventors: Alberto TROIA, Gentjan QAMA, Syed Khurram Zaka BUKHARI
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Patent number: 11709513Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.Type: GrantFiled: August 5, 2022Date of Patent: July 25, 2023Assignee: Renesas Electronics America Inc.Inventors: Travis Guthrie, Jim Toker, Shea Petricek
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Device and method of secure decryption by virtualization and translation of physical encryption keys
Patent number: 11709786Abstract: Example implementations include a system of secure decryption by virtualization and translation of physical encryption keys, the system having a key translation memory operable to store at least one physical mapping address corresponding to at least one virtual key address, a physical key memory operable to store at least one physical encryption key at a physical memory address thereof; and a key security engine operable generate at least one key address translation index, obtain, from the key translation memory, the physical mapping address based on the key address translation index and the virtual key address, and retrieve, from the physical key memory, the physical encryption key stored at the physical memory address.Type: GrantFiled: August 17, 2021Date of Patent: July 25, 2023Assignee: Renesas Electronic CorporationInventors: Ahmad Nasser, Eric Winder -
Patent number: 11710511Abstract: A semiconductor device includes a memory mat having: a plurality of memory cells; a sense amplifier connected to a memory cell selected from the plurality of memory cells; a first power supply wiring; a first switch connected between the sense amplifier and the first power supply wiring and made an ON state in operating the sense amplifier; and a second switch connected to the sense amplifier and made an ON state in operating the sense amplifier, a second power supply wiring arranged outside the memory mat and connected to the first power supply wiring, a third power supply wiring arranged outside the memory mat and connected to the sense amplifier via the second switch, and a short switch arranged outside the memory mat and connected between the second and third power supply wirings. Here, in operating the sense amplifier, the short switch is made an ON state.Type: GrantFiled: October 14, 2021Date of Patent: July 25, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tetsuo Fukushi, Hiroyuki Takahashi, Muneaki Matsushige